src/arm64/ti/k3-j721e-main.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for J721E SoC Family Main Domain peripherals
   4  *
   5  * Copyright (C) 2016-2019 Texas Instruments Incorporated - http://www.ti.com/
   6  */
   7
   8 &cbass_main {
   9         msmc_ram: sram@70000000 {
  10                 compatible = "mmio-sram";
  11                 reg = <0x0 0x70000000 0x0 0x800000>;
  12                 #address-cells = <1>;
  13                 #size-cells = <1>;
  14                 ranges = <0x0 0x0 0x70000000 0x800000>;
  15
  16                 atf-sram@0 {
  17                         reg = <0x0 0x20000>;
  18                 };
  19         };
  20
  21         gic500: interrupt-controller@1800000 {
  22                 compatible = "arm,gic-v3";
  23                 #address-cells = <2>;
  24                 #size-cells = <2>;
  25                 ranges;
  26                 #interrupt-cells = <3>;
  27                 interrupt-controller;
  28                 reg = <0x00 0x01800000 0x00 0x10000>,   /* GICD */
  29                       <0x00 0x01900000 0x00 0x100000>;  /* GICR */
  30
  31                 /* vcpumntirq: virtual CPU interface maintenance interrupt */
  32                 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
  33
  34                 gic_its: gic-its@1820000 {
  35                         compatible = "arm,gic-v3-its";
  36                         reg = <0x00 0x01820000 0x00 0x10000>;
  37                         socionext,synquacer-pre-its = <0x1000000 0x400000>;
  38                         msi-controller;
  39                         #msi-cells = <1>;
  40                 };
  41         };
  42
  43         smmu0: smmu@36600000 {
  44                 compatible = "arm,smmu-v3";
  45                 reg = <0x0 0x36600000 0x0 0x100000>;
  46                 interrupt-parent = <&gic500>;
  47                 interrupts = <GIC_SPI 772 IRQ_TYPE_EDGE_RISING>,
  48                              <GIC_SPI 768 IRQ_TYPE_EDGE_RISING>;
  49                 interrupt-names = "eventq", "gerror";
  50                 #iommu-cells = <1>;
  51         };
  52
  53         main_gpio_intr: interrupt-controller0 {
  54                 compatible = "ti,sci-intr";
  55                 ti,intr-trigger-type = <1>;
  56                 interrupt-controller;
  57                 interrupt-parent = <&gic500>;
  58                 #interrupt-cells = <2>;
  59                 ti,sci = <&dmsc>;
  60                 ti,sci-dst-id = <14>;
  61                 ti,sci-rm-range-girq = <0x1>;
  62         };
  63
  64         cbass_main_navss: interconnect0 {
  65                 compatible = "simple-bus";
  66                 #address-cells = <2>;
  67                 #size-cells = <2>;
  68                 ranges;
  69
  70                 main_navss_intr: interrupt-controller1 {
  71                         compatible = "ti,sci-intr";
  72                         ti,intr-trigger-type = <4>;
  73                         interrupt-controller;
  74                         interrupt-parent = <&gic500>;
  75                         #interrupt-cells = <2>;
  76                         ti,sci = <&dmsc>;
  77                         ti,sci-dst-id = <14>;
  78                         ti,sci-rm-range-girq = <0>, <2>;
  79                 };
  80
  81                 main_udmass_inta: interrupt-controller@33d00000 {
  82                         compatible = "ti,sci-inta";
  83                         reg = <0x0 0x33d00000 0x0 0x100000>;
  84                         interrupt-controller;
  85                         interrupt-parent = <&main_navss_intr>;
  86                         msi-controller;
  87                         ti,sci = <&dmsc>;
  88                         ti,sci-dev-id = <209>;
  89                         ti,sci-rm-range-vint = <0xa>;
  90                         ti,sci-rm-range-global-event = <0xd>;
  91                 };
  92
  93                 hwspinlock: spinlock@30e00000 {
  94                         compatible = "ti,am654-hwspinlock";
  95                         reg = <0x00 0x30e00000 0x00 0x1000>;
  96                         #hwlock-cells = <1>;
  97                 };
  98         };
  99
 100         secure_proxy_main: mailbox@32c00000 {
 101                 compatible = "ti,am654-secure-proxy";
 102                 #mbox-cells = <1>;
 103                 reg-names = "target_data", "rt", "scfg";
 104                 reg = <0x00 0x32c00000 0x00 0x100000>,
 105                       <0x00 0x32400000 0x00 0x100000>,
 106                       <0x00 0x32800000 0x00 0x100000>;
 107                 interrupt-names = "rx_011";
 108                 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
 109         };
 110
 111         main_pmx0: pinmux@11c000 {
 112                 compatible = "pinctrl-single";
 113                 /* Proxy 0 addressing */
 114                 reg = <0x0 0x11c000 0x0 0x2b4>;
 115                 #pinctrl-cells = <1>;
 116                 pinctrl-single,register-width = <32>;
 117                 pinctrl-single,function-mask = <0xffffffff>;
 118         };
 119
 120         main_uart0: serial@2800000 {
 121                 compatible = "ti,j721e-uart", "ti,am654-uart";
 122                 reg = <0x00 0x02800000 0x00 0x100>;
 123                 reg-shift = <2>;
 124                 reg-io-width = <4>;
 125                 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
 126                 clock-frequency = <48000000>;
 127                 current-speed = <115200>;
 128                 power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
 129                 clocks = <&k3_clks 146 0>;
 130                 clock-names = "fclk";
 131         };
 132
 133         main_uart1: serial@2810000 {
 134                 compatible = "ti,j721e-uart", "ti,am654-uart";
 135                 reg = <0x00 0x02810000 0x00 0x100>;
 136                 reg-shift = <2>;
 137                 reg-io-width = <4>;
 138                 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
 139                 clock-frequency = <48000000>;
 140                 current-speed = <115200>;
 141                 power-domains = <&k3_pds 278 TI_SCI_PD_EXCLUSIVE>;
 142                 clocks = <&k3_clks 278 0>;
 143                 clock-names = "fclk";
 144         };
 145
 146         main_uart2: serial@2820000 {
 147                 compatible = "ti,j721e-uart", "ti,am654-uart";
 148                 reg = <0x00 0x02820000 0x00 0x100>;
 149                 reg-shift = <2>;
 150                 reg-io-width = <4>;
 151                 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
 152                 clock-frequency = <48000000>;
 153                 current-speed = <115200>;
 154                 power-domains = <&k3_pds 279 TI_SCI_PD_EXCLUSIVE>;
 155                 clocks = <&k3_clks 279 0>;
 156                 clock-names = "fclk";
 157         };
 158
 159         main_uart3: serial@2830000 {
 160                 compatible = "ti,j721e-uart", "ti,am654-uart";
 161                 reg = <0x00 0x02830000 0x00 0x100>;
 162                 reg-shift = <2>;
 163                 reg-io-width = <4>;
 164                 interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
 165                 clock-frequency = <48000000>;
 166                 current-speed = <115200>;
 167                 power-domains = <&k3_pds 280 TI_SCI_PD_EXCLUSIVE>;
 168                 clocks = <&k3_clks 280 0>;
 169                 clock-names = "fclk";
 170         };
 171
 172         main_uart4: serial@2840000 {
 173                 compatible = "ti,j721e-uart", "ti,am654-uart";
 174                 reg = <0x00 0x02840000 0x00 0x100>;
 175                 reg-shift = <2>;
 176                 reg-io-width = <4>;
 177                 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>;
 178                 clock-frequency = <48000000>;
 179                 current-speed = <115200>;
 180                 power-domains = <&k3_pds 281 TI_SCI_PD_EXCLUSIVE>;
 181                 clocks = <&k3_clks 281 0>;
 182                 clock-names = "fclk";
 183         };
 184
 185         main_uart5: serial@2850000 {
 186                 compatible = "ti,j721e-uart", "ti,am654-uart";
 187                 reg = <0x00 0x02850000 0x00 0x100>;
 188                 reg-shift = <2>;
 189                 reg-io-width = <4>;
 190                 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
 191                 clock-frequency = <48000000>;
 192                 current-speed = <115200>;
 193                 power-domains = <&k3_pds 282 TI_SCI_PD_EXCLUSIVE>;
 194                 clocks = <&k3_clks 282 0>;
 195                 clock-names = "fclk";
 196         };
 197
 198         main_uart6: serial@2860000 {
 199                 compatible = "ti,j721e-uart", "ti,am654-uart";
 200                 reg = <0x00 0x02860000 0x00 0x100>;
 201                 reg-shift = <2>;
 202                 reg-io-width = <4>;
 203                 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>;
 204                 clock-frequency = <48000000>;
 205                 current-speed = <115200>;
 206                 power-domains = <&k3_pds 283 TI_SCI_PD_EXCLUSIVE>;
 207                 clocks = <&k3_clks 283 0>;
 208                 clock-names = "fclk";
 209         };
 210
 211         main_uart7: serial@2870000 {
 212                 compatible = "ti,j721e-uart", "ti,am654-uart";
 213                 reg = <0x00 0x02870000 0x00 0x100>;
 214                 reg-shift = <2>;
 215                 reg-io-width = <4>;
 216                 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
 217                 clock-frequency = <48000000>;
 218                 current-speed = <115200>;
 219                 power-domains = <&k3_pds 284 TI_SCI_PD_EXCLUSIVE>;
 220                 clocks = <&k3_clks 284 0>;
 221                 clock-names = "fclk";
 222         };
 223
 224         main_uart8: serial@2880000 {
 225                 compatible = "ti,j721e-uart", "ti,am654-uart";
 226                 reg = <0x00 0x02880000 0x00 0x100>;
 227                 reg-shift = <2>;
 228                 reg-io-width = <4>;
 229                 interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>;
 230                 clock-frequency = <48000000>;
 231                 current-speed = <115200>;
 232                 power-domains = <&k3_pds 285 TI_SCI_PD_EXCLUSIVE>;
 233                 clocks = <&k3_clks 285 0>;
 234                 clock-names = "fclk";
 235         };
 236
 237         main_uart9: serial@2890000 {
 238                 compatible = "ti,j721e-uart", "ti,am654-uart";
 239                 reg = <0x00 0x02890000 0x00 0x100>;
 240                 reg-shift = <2>;
 241                 reg-io-width = <4>;
 242                 interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>;
 243                 clock-frequency = <48000000>;
 244                 current-speed = <115200>;
 245                 power-domains = <&k3_pds 286 TI_SCI_PD_EXCLUSIVE>;
 246                 clocks = <&k3_clks 286 0>;
 247                 clock-names = "fclk";
 248         };
 249
 250         main_gpio0: gpio@600000 {
 251                 compatible = "ti,j721e-gpio", "ti,keystone-gpio";
 252                 reg = <0x0 0x00600000 0x0 0x100>;
 253                 gpio-controller;
 254                 #gpio-cells = <2>;
 255                 interrupt-parent = <&main_gpio_intr>;
 256                 interrupts = <105 0>, <105 1>, <105 2>, <105 3>,
 257                              <105 4>, <105 5>, <105 6>, <105 7>;
 258                 interrupt-controller;
 259                 #interrupt-cells = <2>;
 260                 ti,ngpio = <128>;
 261                 ti,davinci-gpio-unbanked = <0>;
 262                 power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
 263                 clocks = <&k3_clks 105 0>;
 264                 clock-names = "gpio";
 265         };
 266
 267         main_gpio1: gpio@601000 {
 268                 compatible = "ti,j721e-gpio", "ti,keystone-gpio";
 269                 reg = <0x0 0x00601000 0x0 0x100>;
 270                 gpio-controller;
 271                 #gpio-cells = <2>;
 272                 interrupt-parent = <&main_gpio_intr>;
 273                 interrupts = <106 0>, <106 1>, <106 2>;
 274                 interrupt-controller;
 275                 #interrupt-cells = <2>;
 276                 ti,ngpio = <36>;
 277                 ti,davinci-gpio-unbanked = <0>;
 278                 power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>;
 279                 clocks = <&k3_clks 106 0>;
 280                 clock-names = "gpio";
 281         };
 282
 283         main_gpio2: gpio@610000 {
 284                 compatible = "ti,j721e-gpio", "ti,keystone-gpio";
 285                 reg = <0x0 0x00610000 0x0 0x100>;
 286                 gpio-controller;
 287                 #gpio-cells = <2>;
 288                 interrupt-parent = <&main_gpio_intr>;
 289                 interrupts = <107 0>, <107 1>, <107 2>, <107 3>,
 290                              <107 4>, <107 5>, <107 6>, <107 7>;
 291                 interrupt-controller;
 292                 #interrupt-cells = <2>;
 293                 ti,ngpio = <128>;
 294                 ti,davinci-gpio-unbanked = <0>;
 295                 power-domains = <&k3_pds 107 TI_SCI_PD_EXCLUSIVE>;
 296                 clocks = <&k3_clks 107 0>;
 297                 clock-names = "gpio";
 298         };
 299
 300         main_gpio3: gpio@611000 {
 301                 compatible = "ti,j721e-gpio", "ti,keystone-gpio";
 302                 reg = <0x0 0x00611000 0x0 0x100>;
 303                 gpio-controller;
 304                 #gpio-cells = <2>;
 305                 interrupt-parent = <&main_gpio_intr>;
 306                 interrupts = <108 0>, <108 1>, <108 2>;
 307                 interrupt-controller;
 308                 #interrupt-cells = <2>;
 309                 ti,ngpio = <36>;
 310                 ti,davinci-gpio-unbanked = <0>;
 311                 power-domains = <&k3_pds 108 TI_SCI_PD_EXCLUSIVE>;
 312                 clocks = <&k3_clks 108 0>;
 313                 clock-names = "gpio";
 314         };
 315
 316         main_gpio4: gpio@620000 {
 317                 compatible = "ti,j721e-gpio", "ti,keystone-gpio";
 318                 reg = <0x0 0x00620000 0x0 0x100>;
 319                 gpio-controller;
 320                 #gpio-cells = <2>;
 321                 interrupt-parent = <&main_gpio_intr>;
 322                 interrupts = <109 0>, <109 1>, <109 2>, <109 3>,
 323                              <109 4>, <109 5>, <109 6>, <109 7>;
 324                 interrupt-controller;
 325                 #interrupt-cells = <2>;
 326                 ti,ngpio = <128>;
 327                 ti,davinci-gpio-unbanked = <0>;
 328                 power-domains = <&k3_pds 109 TI_SCI_PD_EXCLUSIVE>;
 329                 clocks = <&k3_clks 109 0>;
 330                 clock-names = "gpio";
 331         };
 332
 333         main_gpio5: gpio@621000 {
 334                 compatible = "ti,j721e-gpio", "ti,keystone-gpio";
 335                 reg = <0x0 0x00621000 0x0 0x100>;
 336                 gpio-controller;
 337                 #gpio-cells = <2>;
 338                 interrupt-parent = <&main_gpio_intr>;
 339                 interrupts = <110 0>, <110 1>, <110 2>;
 340                 interrupt-controller;
 341                 #interrupt-cells = <2>;
 342                 ti,ngpio = <36>;
 343                 ti,davinci-gpio-unbanked = <0>;
 344                 power-domains = <&k3_pds 110 TI_SCI_PD_EXCLUSIVE>;
 345                 clocks = <&k3_clks 110 0>;
 346                 clock-names = "gpio";
 347         };
 348
 349         main_gpio6: gpio@630000 {
 350                 compatible = "ti,j721e-gpio", "ti,keystone-gpio";
 351                 reg = <0x0 0x00630000 0x0 0x100>;
 352                 gpio-controller;
 353                 #gpio-cells = <2>;
 354                 interrupt-parent = <&main_gpio_intr>;
 355                 interrupts = <111 0>, <111 1>, <111 2>, <111 3>,
 356                              <111 4>, <111 5>, <111 6>, <111 7>;
 357                 interrupt-controller;
 358                 #interrupt-cells = <2>;
 359                 ti,ngpio = <128>;
 360                 ti,davinci-gpio-unbanked = <0>;
 361                 power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>;
 362                 clocks = <&k3_clks 111 0>;
 363                 clock-names = "gpio";
 364         };
 365
 366         main_gpio7: gpio@631000 {
 367                 compatible = "ti,j721e-gpio", "ti,keystone-gpio";
 368                 reg = <0x0 0x00631000 0x0 0x100>;
 369                 gpio-controller;
 370                 #gpio-cells = <2>;
 371                 interrupt-parent = <&main_gpio_intr>;
 372                 interrupts = <112 0>, <112 1>, <112 2>;
 373                 interrupt-controller;
 374                 #interrupt-cells = <2>;
 375                 ti,ngpio = <36>;
 376                 ti,davinci-gpio-unbanked = <0>;
 377                 power-domains = <&k3_pds 112 TI_SCI_PD_EXCLUSIVE>;
 378                 clocks = <&k3_clks 112 0>;
 379                 clock-names = "gpio";
 380         };
 381 };