2 * Copyright (c) 2008 ARM Ltd
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37 #define magic1(REG) "#0x01010101"
38 #define magic2(REG) "#0x80808080"
40 #define magic1(REG) #REG
41 #define magic2(REG) #REG ", lsl #7"
44 char* __attribute__((naked))
45 strcpy (char* dst, const char* src)
48 #if !(defined(__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED) || \
49 (defined (__thumb__) && !defined (__thumb2__)))
59 "str r5, [sp, #-4]!\n\t"
61 "orr r5, r5, r5, lsl #8\n\t"
62 "orr r5, r5, r5, lsl #16\n\t"
65 "str r4, [sp, #-4]!\n\t"
67 "ldr r3, [r1], #4\n\t"
69 "sub r2, r3, "magic1(r5)"\n\t"
71 "tst r2, "magic2(r5)"\n\t"
73 "streq r3, [ip], #4\n\t"
74 "ldreq r3, [r1], #4\n"
76 /* Inner loop. We now know that r1 is 64-bit aligned, so we
77 can safely fetch up to two words. This allows us to avoid
82 "ldr r4, [r1], #4\n\t"
83 "sub r2, r3, "magic1(r5)"\n\t"
85 "tst r2, "magic2(r5)"\n\t"
86 "sub r2, r4, "magic1(r5)"\n\t"
88 "str r3, [ip], #4\n\t"
90 "tst r2, "magic2(r5)"\n\t"
92 "ldreq r3, [r1], #4\n\t"
93 "streq r4, [ip], #4\n\t"
98 "rors r3, r3, #24\n\t"
100 "strb r3, [ip], #1\n\t"
106 "ldr r4, [sp], #4\n\t"
108 "ldr r5, [sp], #4\n\t"
112 /* Strings have the same offset from word alignment, but it's
117 "ldrb r2, [r1], #1\n\t"
118 "strb r2, [ip], #1\n\t"
125 "ldrh r2, [r1], #2\n\t"
127 "tst r2, #0xff00\n\t"
129 "strneh r2, [ip], #2\n\t"
130 "lsreq r2, r2, #8\n\t"
131 "streqb r2, [ip]\n\t"
132 "tstne r2, #0xff\n\t"
136 "strneh r2, [ip], #2\n\t"
137 "streqb r2, [ip]\n\t"
138 "tstne r2, #0xff00\n\t"
143 /* src and dst do not have a common word-alignement. Fall back to
146 "ldrb r2, [r1], #1\n\t"
147 "strb r2, [ip], #1\n\t"
152 #elif !defined (__thumb__) || defined (__thumb2__)
155 "ldrb r2, [r1], #1\n\t"
156 "strb r2, [r3], #1\n\t"
173 /* For GLIBC: libc_hidden_builtin_def (strcpy) */