2 * Copyright (c) 2014 The FreeBSD Foundation
5 * This software was developed by Semihalf under
6 * the sponsorship of the FreeBSD Foundation.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
32 #include <sys/param.h>
34 #include <machine/armreg.h>
42 get_dcache_line_size(void)
45 unsigned int dcl_size;
47 /* Accessible from all security levels */
48 ctr = READ_SPECIALREG(ctr_el0);
51 * Relevant field [19:16] is LOG2
52 * of the number of words in DCache line
54 dcl_size = CTR_DLINE_SIZE(ctr);
56 /* Size of word shifted by cache line size */
57 return (sizeof(int) << dcl_size);
61 cpu_flush_dcache(const void *ptr, size_t len)
65 vm_offset_t addr, end;
67 cl_size = get_dcache_line_size();
69 /* Calculate end address to clean */
70 end = (vm_offset_t)ptr + (vm_offset_t)len;
71 /* Align start address to cache line */
72 addr = (vm_offset_t)ptr;
73 addr = rounddown2(addr, cl_size);
75 for (; addr < end; addr += cl_size)
76 __asm __volatile("dc civac, %0" : : "r" (addr) : "memory");
78 __asm __volatile("dsb sy" : : : "memory");
82 cpu_inval_icache(const void *ptr, size_t len)
85 /* NULL ptr or 0 len means all */
86 if (ptr == NULL || len == 0) {
94 /* TODO: Other cache ranges if necessary */