2 * __mtag_tag_zero_region - tag memory and fill it with zero bytes
4 * Copyright (c) 2021, Arm Limited.
5 * SPDX-License-Identifier: MIT
10 * ARMv8-a, AArch64, MTE, LP64 ABI.
13 * Address is 16 byte aligned and size is multiple of 16.
14 * Returns the passed pointer.
15 * The memory region may remain untagged if tagging is not enabled.
18 #include "../asmdefs.h"
20 #if __ARM_FEATURE_MEMORY_TAGGING
29 ENTRY (__mtag_tag_zero_region)
33 add dstend, dstin, count
38 tbnz count, 6, L(set96)
40 /* Set 0, 16, 32, or 48 bytes. */
42 add tmp, dstin, tmp, lsl 4
46 stzg dstin, [dstend, -16]
51 /* Set 64..96 bytes. Write 64 bytes from the start and
52 32 bytes from the end. */
55 stz2g dstin, [dstin, 32]
56 stz2g dstin, [dstend, -32]
60 /* Size is > 96 bytes. */
65 #ifndef SKIP_ZVA_CHECK
66 mrs zva_val, dczid_el0
67 and zva_val, zva_val, 31
68 cmp zva_val, 4 /* ZVA size is 64 bytes. */
72 stz2g dstin, [dstin, 32]
74 sub count, dstend, dst /* Count is now 64 too large. */
75 sub count, count, 128 /* Adjust count and bias for loop. */
83 stz2g dstin, [dstend, -64]
84 stz2g dstin, [dstend, -32]
88 sub dst, dstin, 32 /* Dst is biased by -32. */
89 sub count, count, 64 /* Adjust count for loop. */
91 stz2g dstin, [dst, 32]
92 stz2g dstin, [dst, 64]!
95 stz2g dstin, [dstend, -64]
96 stz2g dstin, [dstend, -32]
99 END (__mtag_tag_zero_region)