2 * Copyright (c) 1998 Doug Rabson
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
30 * All rights reserved.
32 * Author: Chris G. Demetriou
34 * Permission to use, copy, modify and distribute this software and
35 * its documentation is hereby granted, provided that both the copyright
36 * notice and this permission notice appear in all copies of the
37 * software, derivative works or modified versions, and any portions
38 * thereof, and that both notices appear in supporting documentation.
40 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
41 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
42 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
44 * Carnegie Mellon requests users of this software to return to
46 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
47 * School of Computer Science
48 * Carnegie Mellon University
49 * Pittsburgh PA 15213-3890
51 * any improvements or extensions that they make and grant Carnegie the
52 * rights to redistribute these changes.
55 #include <machine/asm.h>
56 #include <sys/syscall.h>
59 #ifndef EVCNT_COUNTERS
61 #include <machine/intrcnt.h>
65 * PTmap is recursive pagemap at top of virtual address space.
66 * Within PTmap, the lev1 and lev0 page tables can be found.
68 .globl PTmap,PTlev2,PTlev1,PTlev1pte
70 .equ PTlev2,PTmap + (PTLEV1I << ALPHA_L2SHIFT)
71 .equ PTlev1,PTlev2 + (PTLEV1I << ALPHA_L3SHIFT)
72 .equ PTlev1pte,PTlev1 + (PTLEV1I * PTESIZE)
75 * Perform actions necessary to switch to a new context. The
76 * hwpcb should be in a0.
78 #define SWITCH_CONTEXT \
79 /* Make a note of the context we're running on. */ \
82 /* Swap in the new context. */ \
83 call_pal PAL_OSF1_swpctx
87 NESTED(locorestart, 1, 0, ra, 0, 0)
92 /* Load KGP with current GP. */
93 or a0,zero,s0 /* save pfn */
95 call_pal PAL_OSF1_wrkgp /* clobbers a0, t0, t8-t11 */
96 or s0,zero,a0 /* restore pfn */
99 * Call alpha_init() to do pre-main initialization.
100 * alpha_init() gets the arguments we were called with,
101 * which are already in a0, a1, a2, a3, and a4.
105 /* Set up the virtual page table pointer. */
107 call_pal PAL_OSF1_wrvptptr /* clobbers a0, t0, t8-t11 */
110 * Switch to proc0's PCB, which is at U_PCB off of proc0paddr.
112 lda t0,proc0 /* get phys addr of pcb */
113 ldq a0,P_MD_PCBPADDR(t0)
117 * We've switched to a new page table base, so invalidate the TLB
118 * and I-stream. This happens automatically everywhere but here.
120 ldiq a0, -2 /* TBIA */
121 call_pal PAL_OSF1_tbi
125 * Construct a fake trap frame, so execve() can work normally.
126 * Note that setregs() is responsible for setting its contents
127 * to 'reasonable' values.
129 lda sp,-(FRAME_SIZE * 8)(sp) /* space for struct trapframe */
130 mov sp, a0 /* arg is frame ptr */
131 CALL(mi_startup) /* go to mi_startup()! */
134 * Call exception_return, to simulate return from (fake)
135 * exception to user-land, running process 1, init!
137 jmp zero, exception_return /* "And that's all she wrote." */
141 /**************************************************************************/
144 * Signal "trampoline" code. Invoked from RTE setup by sendsig().
146 * On entry, stack & registers look like:
149 * a1 pointer to siginfo_t
150 * a2 pointer to signal context frame (scp)
151 * a3 address of handler
152 * sp+0 saved hardware state
155 * scp+0 beginning of signal context frame
158 NESTED(sigcode,0,0,ra,0,0)
159 lda sp, -16(sp) /* save the sigcontext pointer */
161 jsr ra, (t12) /* call the signal handler (t12==pv) */
162 ldq a0, 0(sp) /* get the sigcontext pointer */
164 CALLSYS_NOERROR(sigreturn) /* and call sigreturn() with it. */
165 mov v0, a0 /* if that failed, get error code */
166 CALLSYS_NOERROR(exit) /* and call exit() with it. */
172 .quad esigcode-sigcode
175 /**************************************************************************/
178 * savefpstate: Save a process's floating point state.
181 * a0 'struct fpstate *' to save into
186 /* save all of the FP registers */
187 lda t1, FPREG_FPR_REGS(a0) /* get address of FP reg. save area */
188 stt $f0, (0 * 8)(t1) /* save first register, using hw name */
189 stt $f1, (1 * 8)(t1) /* etc. */
198 stt $f10, (10 * 8)(t1)
199 stt $f11, (11 * 8)(t1)
200 stt $f12, (12 * 8)(t1)
201 stt $f13, (13 * 8)(t1)
202 stt $f14, (14 * 8)(t1)
203 stt $f15, (15 * 8)(t1)
204 stt $f16, (16 * 8)(t1)
205 stt $f17, (17 * 8)(t1)
206 stt $f18, (18 * 8)(t1)
207 stt $f19, (19 * 8)(t1)
208 stt $f20, (20 * 8)(t1)
209 stt $f21, (21 * 8)(t1)
210 stt $f22, (22 * 8)(t1)
211 stt $f23, (23 * 8)(t1)
212 stt $f24, (24 * 8)(t1)
213 stt $f25, (25 * 8)(t1)
214 stt $f26, (26 * 8)(t1)
215 stt $f27, (27 * 8)(t1)
217 stt $f28, (28 * 8)(t1)
219 stt $f29, (29 * 8)(t1)
220 stt $f30, (30 * 8)(t1)
223 * Then save the FPCR; note that the necessary 'trapb's are taken
224 * care of on kernel entry and exit.
227 stt ft0, FPREG_FPR_CR(a0) /* store to FPCR save area */
232 /**************************************************************************/
235 * restorefpstate: Restore a process's floating point state.
238 * a0 'struct fpstate *' to restore from
241 LEAF(restorefpstate, 1)
244 * Restore the FPCR; note that the necessary 'trapb's are taken care of
245 * on kernel entry and exit.
247 ldt ft0, FPREG_FPR_CR(a0) /* load from FPCR save area */
250 /* Restore all of the FP registers. */
251 lda t1, FPREG_FPR_REGS(a0) /* get address of FP reg. save area */
252 ldt $f0, (0 * 8)(t1) /* restore first reg., using hw name */
253 ldt $f1, (1 * 8)(t1) /* etc. */
262 ldt $f10, (10 * 8)(t1)
263 ldt $f11, (11 * 8)(t1)
264 ldt $f12, (12 * 8)(t1)
265 ldt $f13, (13 * 8)(t1)
266 ldt $f14, (14 * 8)(t1)
267 ldt $f15, (15 * 8)(t1)
268 ldt $f16, (16 * 8)(t1)
269 ldt $f17, (17 * 8)(t1)
270 ldt $f18, (18 * 8)(t1)
271 ldt $f19, (19 * 8)(t1)
272 ldt $f20, (20 * 8)(t1)
273 ldt $f21, (21 * 8)(t1)
274 ldt $f22, (22 * 8)(t1)
275 ldt $f23, (23 * 8)(t1)
276 ldt $f24, (24 * 8)(t1)
277 ldt $f25, (25 * 8)(t1)
278 ldt $f26, (26 * 8)(t1)
279 ldt $f27, (27 * 8)(t1)
280 ldt $f28, (28 * 8)(t1)
281 ldt $f29, (29 * 8)(t1)
282 ldt $f30, (30 * 8)(t1)
288 * When starting init, call this to configure the process for user
289 * mode. This will be inherited by other processes.
291 LEAF_NOPROFILE(prepare_usermode, 0)
293 END(prepare_usermode)
301 /* XXX: make systat/vmstat happy */
308 .byte intr_n / 10 + '0, intr_n % 10 + '0
309 .asciz " " # space for platform-specific rewrite
315 .fill INTRCNT_COUNT + 1, 8, 0