2 * Copyright (c) 1999 Michael Smith <msmith@freebsd.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
30 #include <sys/param.h>
31 #include <sys/kernel.h>
32 #include <sys/systm.h>
33 #include <sys/malloc.h>
34 #include <sys/memrange.h>
36 #include <sys/sysctl.h>
38 #include <machine/md_var.h>
39 #include <machine/specialreg.h>
42 * amd64 memory range operations
44 * This code will probably be impenetrable without reference to the
45 * Intel Pentium Pro documentation or x86-64 programmers manual vol 2.
48 static char *mem_owner_bios = "BIOS";
50 #define MR686_FIXMTRR (1<<0)
52 #define mrwithin(mr, a) \
53 (((a) >= (mr)->mr_base) && ((a) < ((mr)->mr_base + (mr)->mr_len)))
54 #define mroverlap(mra, mrb) \
55 (mrwithin(mra, mrb->mr_base) || mrwithin(mrb, mra->mr_base))
57 #define mrvalid(base, len) \
58 ((!(base & ((1 << 12) - 1))) && /* base is multiple of 4k */ \
59 ((len) >= (1 << 12)) && /* length is >= 4k */ \
60 powerof2((len)) && /* ... and power of two */ \
61 !((base) & ((len) - 1))) /* range is not discontiuous */
63 #define mrcopyflags(curr, new) (((curr) & ~MDF_ATTRMASK) | ((new) & MDF_ATTRMASK))
65 static int mtrrs_disabled;
66 TUNABLE_INT("machdep.disable_mtrrs", &mtrrs_disabled);
67 SYSCTL_INT(_machdep, OID_AUTO, disable_mtrrs, CTLFLAG_RDTUN,
68 &mtrrs_disabled, 0, "Disable amd64 MTRRs.");
70 static void amd64_mrinit(struct mem_range_softc *sc);
71 static int amd64_mrset(struct mem_range_softc *sc,
72 struct mem_range_desc *mrd,
74 static void amd64_mrAPinit(struct mem_range_softc *sc);
76 static struct mem_range_ops amd64_mrops = {
82 /* XXX for AP startup hook */
83 static u_int64_t mtrrcap, mtrrdef;
85 static struct mem_range_desc *mem_range_match(struct mem_range_softc *sc,
86 struct mem_range_desc *mrd);
87 static void amd64_mrfetch(struct mem_range_softc *sc);
88 static int amd64_mtrrtype(int flags);
89 static int amd64_mrt2mtrr(int flags, int oldval);
90 static int amd64_mtrrconflict(int flag1, int flag2);
91 static void amd64_mrstore(struct mem_range_softc *sc);
92 static void amd64_mrstoreone(void *arg);
93 static struct mem_range_desc *amd64_mtrrfixsearch(struct mem_range_softc *sc,
95 static int amd64_mrsetlow(struct mem_range_softc *sc,
96 struct mem_range_desc *mrd,
98 static int amd64_mrsetvariable(struct mem_range_softc *sc,
99 struct mem_range_desc *mrd,
102 /* amd64 MTRR type to memory range type conversion */
103 static int amd64_mtrrtomrt[] = {
113 #define MTRRTOMRTLEN (sizeof(amd64_mtrrtomrt) / sizeof(amd64_mtrrtomrt[0]))
116 * Used in /dev/mem drivers and elsewhere
118 MALLOC_DEFINE(M_MEMDESC, "memdesc", "memory range descriptors");
121 amd64_mtrr2mrt(int val)
123 if (val < 0 || val >= MTRRTOMRTLEN)
125 return amd64_mtrrtomrt[val];
129 * amd64 MTRR conflicts. Writeback and uncachable may overlap.
132 amd64_mtrrconflict(int flag1, int flag2)
134 flag1 &= MDF_ATTRMASK;
135 flag2 &= MDF_ATTRMASK;
136 if ((flag1 & MDF_UNKNOWN) || (flag2 & MDF_UNKNOWN))
138 if (flag1 == flag2 ||
139 (flag1 == MDF_WRITEBACK && flag2 == MDF_UNCACHEABLE) ||
140 (flag2 == MDF_WRITEBACK && flag1 == MDF_UNCACHEABLE))
146 * Look for an exactly-matching range.
148 static struct mem_range_desc *
149 mem_range_match(struct mem_range_softc *sc, struct mem_range_desc *mrd)
151 struct mem_range_desc *cand;
154 for (i = 0, cand = sc->mr_desc; i < sc->mr_ndesc; i++, cand++)
155 if ((cand->mr_base == mrd->mr_base) &&
156 (cand->mr_len == mrd->mr_len))
162 * Fetch the current mtrr settings from the current CPU (assumed to all
163 * be in sync in the SMP case). Note that if we are here, we assume
164 * that MTRRs are enabled, and we may or may not have fixed MTRRs.
167 amd64_mrfetch(struct mem_range_softc *sc)
169 struct mem_range_desc *mrd;
175 /* Get fixed-range MTRRs */
176 if (sc->mr_cap & MR686_FIXMTRR) {
177 msr = MSR_MTRR64kBase;
178 for (i = 0; i < (MTRR_N64K / 8); i++, msr++) {
180 for (j = 0; j < 8; j++, mrd++) {
181 mrd->mr_flags = (mrd->mr_flags & ~MDF_ATTRMASK) |
182 amd64_mtrr2mrt(msrv & 0xff) |
184 if (mrd->mr_owner[0] == 0)
185 strcpy(mrd->mr_owner, mem_owner_bios);
189 msr = MSR_MTRR16kBase;
190 for (i = 0; i < (MTRR_N16K / 8); i++, msr++) {
192 for (j = 0; j < 8; j++, mrd++) {
193 mrd->mr_flags = (mrd->mr_flags & ~MDF_ATTRMASK) |
194 amd64_mtrr2mrt(msrv & 0xff) |
196 if (mrd->mr_owner[0] == 0)
197 strcpy(mrd->mr_owner, mem_owner_bios);
201 msr = MSR_MTRR4kBase;
202 for (i = 0; i < (MTRR_N4K / 8); i++, msr++) {
204 for (j = 0; j < 8; j++, mrd++) {
205 mrd->mr_flags = (mrd->mr_flags & ~MDF_ATTRMASK) |
206 amd64_mtrr2mrt(msrv & 0xff) |
208 if (mrd->mr_owner[0] == 0)
209 strcpy(mrd->mr_owner, mem_owner_bios);
215 /* Get remainder which must be variable MTRRs */
216 msr = MSR_MTRRVarBase;
217 for (; (mrd - sc->mr_desc) < sc->mr_ndesc; msr += 2, mrd++) {
219 mrd->mr_flags = (mrd->mr_flags & ~MDF_ATTRMASK) |
220 amd64_mtrr2mrt(msrv & 0xff);
221 mrd->mr_base = msrv & 0x000000fffffff000L;
222 msrv = rdmsr(msr + 1);
223 mrd->mr_flags = (msrv & 0x800) ?
224 (mrd->mr_flags | MDF_ACTIVE) :
225 (mrd->mr_flags & ~MDF_ACTIVE);
226 /* Compute the range from the mask. Ick. */
227 mrd->mr_len = (~(msrv & 0x000000fffffff000L) & 0x000000ffffffffffL) + 1;
228 if (!mrvalid(mrd->mr_base, mrd->mr_len))
229 mrd->mr_flags |= MDF_BOGUS;
230 /* If unclaimed and active, must be the BIOS */
231 if ((mrd->mr_flags & MDF_ACTIVE) && (mrd->mr_owner[0] == 0))
232 strcpy(mrd->mr_owner, mem_owner_bios);
237 * Return the MTRR memory type matching a region's flags
240 amd64_mtrrtype(int flags)
244 flags &= MDF_ATTRMASK;
246 for (i = 0; i < MTRRTOMRTLEN; i++) {
247 if (amd64_mtrrtomrt[i] == MDF_UNKNOWN)
249 if (flags == amd64_mtrrtomrt[i])
256 amd64_mrt2mtrr(int flags, int oldval)
260 if ((val = amd64_mtrrtype(flags)) == -1)
261 return oldval & 0xff;
266 * Update running CPU(s) MTRRs to match the ranges in the descriptor
269 * XXX Must be called with interrupts enabled.
272 amd64_mrstore(struct mem_range_softc *sc)
276 * We should use ipi_all_but_self() to call other CPUs into a
277 * locking gate, then call a target function to do this work.
278 * The "proper" solution involves a generalised locking gate
279 * implementation, not ready yet.
281 smp_rendezvous(NULL, amd64_mrstoreone, NULL, (void *)sc);
283 disable_intr(); /* disable interrupts */
284 amd64_mrstoreone((void *)sc);
290 * Update the current CPU's MTRRs with those represented in the
291 * descriptor list. Note that we do this wholesale rather than
292 * just stuffing one entry; this is simpler (but slower, of course).
295 amd64_mrstoreone(void *arg)
297 struct mem_range_softc *sc = (struct mem_range_softc *)arg;
298 struct mem_range_desc *mrd;
299 u_int64_t omsrv, msrv;
305 cr4save = rcr4(); /* save cr4 */
306 if (cr4save & CR4_PGE)
307 load_cr4(cr4save & ~CR4_PGE);
308 load_cr0((rcr0() & ~CR0_NW) | CR0_CD); /* disable caches (CD = 1, NW = 0) */
309 wbinvd(); /* flush caches, TLBs */
310 wrmsr(MSR_MTRRdefType, rdmsr(MSR_MTRRdefType) & ~0x800); /* disable MTRRs (E = 0) */
312 /* Set fixed-range MTRRs */
313 if (sc->mr_cap & MR686_FIXMTRR) {
314 msr = MSR_MTRR64kBase;
315 for (i = 0; i < (MTRR_N64K / 8); i++, msr++) {
318 for (j = 7; j >= 0; j--) {
320 msrv |= amd64_mrt2mtrr((mrd + j)->mr_flags, omsrv >> (j*8));
325 msr = MSR_MTRR16kBase;
326 for (i = 0; i < (MTRR_N16K / 8); i++, msr++) {
329 for (j = 7; j >= 0; j--) {
331 msrv |= amd64_mrt2mtrr((mrd + j)->mr_flags, omsrv >> (j*8));
336 msr = MSR_MTRR4kBase;
337 for (i = 0; i < (MTRR_N4K / 8); i++, msr++) {
340 for (j = 7; j >= 0; j--) {
342 msrv |= amd64_mrt2mtrr((mrd + j)->mr_flags, omsrv >> (j*8));
349 /* Set remainder which must be variable MTRRs */
350 msr = MSR_MTRRVarBase;
351 for (; (mrd - sc->mr_desc) < sc->mr_ndesc; msr += 2, mrd++) {
352 /* base/type register */
354 if (mrd->mr_flags & MDF_ACTIVE) {
355 msrv = mrd->mr_base & 0x000000fffffff000L;
356 msrv |= amd64_mrt2mtrr(mrd->mr_flags, omsrv);
362 /* mask/active register */
363 if (mrd->mr_flags & MDF_ACTIVE) {
364 msrv = 0x800 | (~(mrd->mr_len - 1) & 0x000000fffffff000L);
368 wrmsr(msr + 1, msrv);
370 wbinvd(); /* flush caches, TLBs */
371 wrmsr(MSR_MTRRdefType, rdmsr(MSR_MTRRdefType) | 0x800); /* restore MTRR state */
372 load_cr0(rcr0() & ~(CR0_CD | CR0_NW)); /* enable caches CD = 0 and NW = 0 */
373 load_cr4(cr4save); /* restore cr4 */
377 * Hunt for the fixed MTRR referencing (addr)
379 static struct mem_range_desc *
380 amd64_mtrrfixsearch(struct mem_range_softc *sc, u_int64_t addr)
382 struct mem_range_desc *mrd;
385 for (i = 0, mrd = sc->mr_desc; i < (MTRR_N64K + MTRR_N16K + MTRR_N4K); i++, mrd++)
386 if ((addr >= mrd->mr_base) && (addr < (mrd->mr_base + mrd->mr_len)))
392 * Try to satisfy the given range request by manipulating the fixed MTRRs that
395 * Note that we try to be generous here; we'll bloat the range out to the
396 * next higher/lower boundary to avoid the consumer having to know too much
397 * about the mechanisms here.
399 * XXX note that this will have to be updated when we start supporting "busy" ranges.
402 amd64_mrsetlow(struct mem_range_softc *sc, struct mem_range_desc *mrd, int *arg)
404 struct mem_range_desc *first_md, *last_md, *curr_md;
407 if (((first_md = amd64_mtrrfixsearch(sc, mrd->mr_base)) == NULL) ||
408 ((last_md = amd64_mtrrfixsearch(sc, mrd->mr_base + mrd->mr_len - 1)) == NULL))
411 /* check we aren't doing something risky */
412 if (!(mrd->mr_flags & MDF_FORCE))
413 for (curr_md = first_md; curr_md <= last_md; curr_md++) {
414 if ((curr_md->mr_flags & MDF_ATTRMASK) == MDF_UNKNOWN)
418 /* set flags, clear set-by-firmware flag */
419 for (curr_md = first_md; curr_md <= last_md; curr_md++) {
420 curr_md->mr_flags = mrcopyflags(curr_md->mr_flags & ~MDF_FIRMWARE, mrd->mr_flags);
421 bcopy(mrd->mr_owner, curr_md->mr_owner, sizeof(mrd->mr_owner));
429 * Modify/add a variable MTRR to satisfy the request.
431 * XXX needs to be updated to properly support "busy" ranges.
434 amd64_mrsetvariable(struct mem_range_softc *sc, struct mem_range_desc *mrd, int *arg)
436 struct mem_range_desc *curr_md, *free_md;
440 * Scan the currently active variable descriptors, look for
441 * one we exactly match (straight takeover) and for possible
442 * accidental overlaps.
443 * Keep track of the first empty variable descriptor in case we
444 * can't perform a takeover.
446 i = (sc->mr_cap & MR686_FIXMTRR) ? MTRR_N64K + MTRR_N16K + MTRR_N4K : 0;
447 curr_md = sc->mr_desc + i;
449 for (; i < sc->mr_ndesc; i++, curr_md++) {
450 if (curr_md->mr_flags & MDF_ACTIVE) {
452 if ((curr_md->mr_base == mrd->mr_base) &&
453 (curr_md->mr_len == mrd->mr_len)) {
454 /* whoops, owned by someone */
455 if (curr_md->mr_flags & MDF_BUSY)
457 /* check we aren't doing something risky */
458 if (!(mrd->mr_flags & MDF_FORCE) &&
459 ((curr_md->mr_flags & MDF_ATTRMASK) == MDF_UNKNOWN))
461 /* Ok, just hijack this entry */
465 /* non-exact overlap ? */
466 if (mroverlap(curr_md, mrd)) {
467 /* between conflicting region types? */
468 if (amd64_mtrrconflict(curr_md->mr_flags, mrd->mr_flags))
471 } else if (free_md == NULL) {
475 /* got somewhere to put it? */
479 /* Set up new descriptor */
480 free_md->mr_base = mrd->mr_base;
481 free_md->mr_len = mrd->mr_len;
482 free_md->mr_flags = mrcopyflags(MDF_ACTIVE, mrd->mr_flags);
483 bcopy(mrd->mr_owner, free_md->mr_owner, sizeof(mrd->mr_owner));
488 * Handle requests to set memory range attributes by manipulating MTRRs.
492 amd64_mrset(struct mem_range_softc *sc, struct mem_range_desc *mrd, int *arg)
494 struct mem_range_desc *targ;
498 case MEMRANGE_SET_UPDATE:
499 /* make sure that what's being asked for is even possible at all */
500 if (!mrvalid(mrd->mr_base, mrd->mr_len) ||
501 amd64_mtrrtype(mrd->mr_flags) == -1)
504 #define FIXTOP ((MTRR_N64K * 0x10000) + (MTRR_N16K * 0x4000) + (MTRR_N4K * 0x1000))
506 /* are the "low memory" conditions applicable? */
507 if ((sc->mr_cap & MR686_FIXMTRR) &&
508 ((mrd->mr_base + mrd->mr_len) <= FIXTOP)) {
509 if ((error = amd64_mrsetlow(sc, mrd, arg)) != 0)
512 /* it's time to play with variable MTRRs */
513 if ((error = amd64_mrsetvariable(sc, mrd, arg)) != 0)
518 case MEMRANGE_SET_REMOVE:
519 if ((targ = mem_range_match(sc, mrd)) == NULL)
521 if (targ->mr_flags & MDF_FIXACTIVE)
523 if (targ->mr_flags & MDF_BUSY)
525 targ->mr_flags &= ~MDF_ACTIVE;
526 targ->mr_owner[0] = 0;
533 /* update the hardware */
535 amd64_mrfetch(sc); /* refetch to see where we're at */
540 * Work out how many ranges we support, initialise storage for them,
541 * fetch the initial settings.
544 amd64_mrinit(struct mem_range_softc *sc)
546 struct mem_range_desc *mrd;
550 mtrrcap = rdmsr(MSR_MTRRcap);
551 mtrrdef = rdmsr(MSR_MTRRdefType);
553 /* For now, bail out if MTRRs are not enabled */
554 if (!(mtrrdef & 0x800)) {
556 printf("CPU supports MTRRs but not enabled\n");
559 nmdesc = mtrrcap & 0xff;
561 /* If fixed MTRRs supported and enabled */
562 if ((mtrrcap & 0x100) && (mtrrdef & 0x400)) {
563 sc->mr_cap = MR686_FIXMTRR;
564 nmdesc += MTRR_N64K + MTRR_N16K + MTRR_N4K;
568 (struct mem_range_desc *)malloc(nmdesc * sizeof(struct mem_range_desc),
569 M_MEMDESC, M_WAITOK | M_ZERO);
570 sc->mr_ndesc = nmdesc;
574 /* Populate the fixed MTRR entries' base/length */
575 if (sc->mr_cap & MR686_FIXMTRR) {
576 for (i = 0; i < MTRR_N64K; i++, mrd++) {
577 mrd->mr_base = i * 0x10000;
578 mrd->mr_len = 0x10000;
579 mrd->mr_flags = MDF_FIXBASE | MDF_FIXLEN | MDF_FIXACTIVE;
581 for (i = 0; i < MTRR_N16K; i++, mrd++) {
582 mrd->mr_base = i * 0x4000 + 0x80000;
583 mrd->mr_len = 0x4000;
584 mrd->mr_flags = MDF_FIXBASE | MDF_FIXLEN | MDF_FIXACTIVE;
586 for (i = 0; i < MTRR_N4K; i++, mrd++) {
587 mrd->mr_base = i * 0x1000 + 0xc0000;
588 mrd->mr_len = 0x1000;
589 mrd->mr_flags = MDF_FIXBASE | MDF_FIXLEN | MDF_FIXACTIVE;
594 * Get current settings, anything set now is considered to have
595 * been set by the firmware. (XXX has something already played here?)
599 for (i = 0; i < sc->mr_ndesc; i++, mrd++) {
600 if (mrd->mr_flags & MDF_ACTIVE)
601 mrd->mr_flags |= MDF_FIRMWARE;
606 * Initialise MTRRs on an AP after the BSP has run the init code.
609 amd64_mrAPinit(struct mem_range_softc *sc)
611 amd64_mrstoreone((void *)sc); /* set MTRRs to match BSP */
612 wrmsr(MSR_MTRRdefType, mtrrdef); /* set MTRR behaviour to match BSP */
616 amd64_mem_drvinit(void *unused)
620 if (!(cpu_feature & CPUID_MTRR))
622 if ((cpu_id & 0xf00) != 0x600 && (cpu_id & 0xf00) != 0xf00)
624 if ((strcmp(cpu_vendor, "GenuineIntel") != 0) &&
625 (strcmp(cpu_vendor, "AuthenticAMD") != 0))
627 mem_range_softc.mr_op = &amd64_mrops;
630 SYSINIT(amd64memdev,SI_SUB_DRIVERS,SI_ORDER_FIRST,amd64_mem_drvinit,NULL)