2 * Copyright (c) 1989, 1990 William F. Jolitz.
3 * Copyright (c) 1990 The Regents of the University of California.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 4. Neither the name of the University nor the names of its contributors
15 * may be used to endorse or promote products derived from this software
16 * without specific prior written permission.
18 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * from: vector.s, 386BSD 0.1 unknown origin
35 * Interrupt entry points for external interrupts triggered by I/O APICs
36 * as well as IPI handlers.
41 #include <machine/asmacros.h>
42 #include <x86/apicreg.h>
53 * I/O Interrupt Entry Point. Rather than having one entry point for
54 * each interrupt source, we use one entry point for each 32-bit word
55 * in the ISR. The handler determines the highest bit set in the ISR,
56 * translates that into a vector, and passes the vector to the
57 * lapic_handle_intr() function.
59 #define ISR_VEC(index, vec_name) \
64 FAKE_MCOUNT(TF_RIP(%rsp)) ; \
65 movq lapic, %rdx ; /* pointer to local APIC */ \
66 movl LA_ISR + 16 * (index)(%rdx), %eax ; /* load ISR */ \
67 bsrl %eax, %eax ; /* index of highest set bit in ISR */ \
69 addl $(32 * index),%eax ; \
71 movl %eax, %edi ; /* pass the IRQ */ \
72 call lapic_handle_intr ; \
78 * Handle "spurious INTerrupts".
80 * This is different than the "spurious INTerrupt" generated by an
81 * 8259 PIC for missing INTs. See the APIC documentation for details.
82 * This routine should NOT do an 'EOI' cycle.
88 /* No EOI cycle used here */
101 * Local APIC periodic timer handler.
107 FAKE_MCOUNT(TF_RIP(%rsp))
109 call lapic_handle_timer
114 * Local APIC CMCI handler.
120 FAKE_MCOUNT(TF_RIP(%rsp))
121 call lapic_handle_cmc
126 * Local APIC error interrupt handler.
132 FAKE_MCOUNT(TF_RIP(%rsp))
133 call lapic_handle_error
139 * Xen event channel upcall interrupt handler.
140 * Only used when the hypervisor supports direct vector callbacks.
144 IDTVEC(xen_intr_upcall)
146 FAKE_MCOUNT(TF_RIP(%rsp))
148 call xen_intr_handle_upcall
155 * This is the Hyper-V vmbus channel direct callback interrupt.
156 * Only used when it is running on Hyper-V.
160 IDTVEC(hv_vmbus_callback)
162 FAKE_MCOUNT(TF_RIP(%rsp))
164 call hv_vector_handler
171 * Global address space TLB shootdown.
178 movl $0, LA_EOI(%rax) /* End Of Interrupt to APIC */
186 call invltlb_pcid_handler
198 * Single page TLB shootdown
205 call invlpg_pcid_handler
216 * Page range TLB shootdown.
234 call invlcache_handler
238 * Handler for IPIs sent via the per-cpu IPI bitmap.
242 IDTVEC(ipi_intr_bitmap_handler)
246 movl $0, LA_EOI(%rdx) /* End Of Interrupt to APIC */
248 FAKE_MCOUNT(TF_RIP(%rsp))
250 call ipi_bitmap_handler
255 * Executed by a CPU when it receives an IPI_STOP from another CPU.
263 movl $0, LA_EOI(%rax) /* End Of Interrupt to APIC */
269 * Executed by a CPU when it receives an IPI_SUSPEND from another CPU.
276 call cpususpend_handler
278 movl $0, LA_EOI(%rax) /* End Of Interrupt to APIC */
282 * Executed by a CPU when it receives a RENDEZVOUS IPI from another CPU.
284 * - Calls the generic rendezvous action function.
291 movl PCPU(CPUID), %eax
292 movq ipi_rendezvous_counts(,%rax,8), %rax
295 call smp_rendezvous_action
297 movl $0, LA_EOI(%rax) /* End Of Interrupt to APIC */