2 * SPDX-License-Identifier: BSD-3-Clause
4 * Copyright (C) 2002-2003 NetGroup, Politecnico di Torino (Italy)
5 * Copyright (C) 2005-2016 Jung-uk Kim <jkim@FreeBSD.org>
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. Neither the name of the Politecnico di Torino nor the names of its
18 * contributors may be used to endorse or promote products derived from
19 * this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 #ifndef _BPF_JIT_MACHDEP_H_
37 #define _BPF_JIT_MACHDEP_H_
90 /* Optimization flags */
91 #define BPF_JIT_FRET 0x01
92 #define BPF_JIT_FPKT 0x02
93 #define BPF_JIT_FMEM 0x04
94 #define BPF_JIT_FJMP 0x08
95 #define BPF_JIT_FLEN 0x10
97 #define BPF_JIT_FLAG_ALL \
98 (BPF_JIT_FPKT | BPF_JIT_FMEM | BPF_JIT_FJMP | BPF_JIT_FLEN)
100 /* A stream of native binary code */
101 typedef struct bpf_bin_stream {
102 /* Current native instruction pointer. */
106 * Current BPF instruction pointer, i.e. position in
107 * the BPF program reached by the jitter.
111 /* Instruction buffer, contains the generated native code. */
114 /* Jumps reference table. */
119 * Prototype of the emit functions.
121 * Different emit functions are used to create the reference table and
122 * to generate the actual filtering code. This allows to have simpler
123 * instruction macros.
124 * The first parameter is the stream that will receive the data.
125 * The second one is a variable containing the data.
126 * The third one is the length, that can be 1, 2, or 4 since it is possible
127 * to emit a byte, a short, or a word at a time.
129 typedef void (*emit_func)(bpf_bin_stream *stream, u_int value, u_int n);
132 * Native instruction macros
136 #define MOVid(i32, r32) do { \
137 emitm(&stream, (11 << 4) | (1 << 3) | (r32 & 0x7), 1); \
138 emitm(&stream, i32, 4); \
142 #define MOViq(i64, r64) do { \
143 emitm(&stream, 0x48, 1); \
144 emitm(&stream, (11 << 4) | (1 << 3) | (r64 & 0x7), 1); \
145 emitm(&stream, i64, 4); \
146 emitm(&stream, (i64 >> 32), 4); \
150 #define MOVrd(sr32, dr32) do { \
151 emitm(&stream, 0x89, 1); \
153 (3 << 6) | ((sr32 & 0x7) << 3) | (dr32 & 0x7), 1); \
156 /* movl sr32,dr32 (dr32 = %r8-15d) */
157 #define MOVrd2(sr32, dr32) do { \
158 emitm(&stream, 0x8941, 2); \
160 (3 << 6) | ((sr32 & 0x7) << 3) | (dr32 & 0x7), 1); \
163 /* movl sr32,dr32 (sr32 = %r8-15d) */
164 #define MOVrd3(sr32, dr32) do { \
165 emitm(&stream, 0x8944, 2); \
167 (3 << 6) | ((sr32 & 0x7) << 3) | (dr32 & 0x7), 1); \
171 #define MOVrq(sr64, dr64) do { \
172 emitm(&stream, 0x8948, 2); \
174 (3 << 6) | ((sr64 & 0x7) << 3) | (dr64 & 0x7), 1); \
177 /* movq sr64,dr64 (dr64 = %r8-15) */
178 #define MOVrq2(sr64, dr64) do { \
179 emitm(&stream, 0x8949, 2); \
181 (3 << 6) | ((sr64 & 0x7) << 3) | (dr64 & 0x7), 1); \
184 /* movq sr64,dr64 (sr64 = %r8-15) */
185 #define MOVrq3(sr64, dr64) do { \
186 emitm(&stream, 0x894c, 2); \
188 (3 << 6) | ((sr64 & 0x7) << 3) | (dr64 & 0x7), 1); \
191 /* movl (sr64,or64,1),dr32 */
192 #define MOVobd(sr64, or64, dr32) do { \
193 emitm(&stream, 0x8b, 1); \
194 emitm(&stream, ((dr32 & 0x7) << 3) | 4, 1); \
195 emitm(&stream, ((or64 & 0x7) << 3) | (sr64 & 0x7), 1); \
198 /* movw (sr64,or64,1),dr16 */
199 #define MOVobw(sr64, or64, dr16) do { \
200 emitm(&stream, 0x8b66, 2); \
201 emitm(&stream, ((dr16 & 0x7) << 3) | 4, 1); \
202 emitm(&stream, ((or64 & 0x7) << 3) | (sr64 & 0x7), 1); \
205 /* movb (sr64,or64,1),dr8 */
206 #define MOVobb(sr64, or64, dr8) do { \
207 emitm(&stream, 0x8a, 1); \
208 emitm(&stream, ((dr8 & 0x7) << 3) | 4, 1); \
209 emitm(&stream, ((or64 & 0x7) << 3) | (sr64 & 0x7), 1); \
212 /* movl sr32,(dr64,or64,1) */
213 #define MOVomd(sr32, dr64, or64) do { \
214 emitm(&stream, 0x89, 1); \
215 emitm(&stream, ((sr32 & 0x7) << 3) | 4, 1); \
216 emitm(&stream, ((or64 & 0x7) << 3) | (dr64 & 0x7), 1); \
220 #define BSWAP(dr32) do { \
221 emitm(&stream, 0xf, 1); \
222 emitm(&stream, (0x19 << 3) | dr32, 1); \
226 #define SWAP_AX() do { \
227 emitm(&stream, 0xc486, 2); \
231 #define PUSH(r64) do { \
232 emitm(&stream, (5 << 4) | (0 << 3) | (r64 & 0x7), 1); \
236 #define LEAVE() do { \
237 emitm(&stream, 0xc9, 1); \
242 emitm(&stream, 0xc3, 1); \
246 #define ADDrd(sr32, dr32) do { \
247 emitm(&stream, 0x01, 1); \
249 (3 << 6) | ((sr32 & 0x7) << 3) | (dr32 & 0x7), 1); \
253 #define ADD_EAXi(i32) do { \
254 emitm(&stream, 0x05, 1); \
255 emitm(&stream, i32, 4); \
259 #define ADDib(i8, r32) do { \
260 emitm(&stream, 0x83, 1); \
261 emitm(&stream, (24 << 3) | r32, 1); \
262 emitm(&stream, i8, 1); \
266 #define SUBrd(sr32, dr32) do { \
267 emitm(&stream, 0x29, 1); \
269 (3 << 6) | ((sr32 & 0x7) << 3) | (dr32 & 0x7), 1); \
273 #define SUB_EAXi(i32) do { \
274 emitm(&stream, 0x2d, 1); \
275 emitm(&stream, i32, 4); \
279 #define SUBib(i8, r64) do { \
280 emitm(&stream, 0x8348, 2); \
281 emitm(&stream, (29 << 3) | (r64 & 0x7), 1); \
282 emitm(&stream, i8, 1); \
286 #define MULrd(r32) do { \
287 emitm(&stream, 0xf7, 1); \
288 emitm(&stream, (7 << 5) | (r32 & 0x7), 1); \
292 #define DIVrd(r32) do { \
293 emitm(&stream, 0xf7, 1); \
294 emitm(&stream, (15 << 4) | (r32 & 0x7), 1); \
298 #define ANDib(i8, r8) do { \
300 emitm(&stream, 0x24, 1); \
302 emitm(&stream, 0x80, 1); \
303 emitm(&stream, (7 << 5) | r8, 1); \
305 emitm(&stream, i8, 1); \
309 #define ANDid(i32, r32) do { \
311 emitm(&stream, 0x25, 1); \
313 emitm(&stream, 0x81, 1); \
314 emitm(&stream, (7 << 5) | r32, 1); \
316 emitm(&stream, i32, 4); \
320 #define ANDrd(sr32, dr32) do { \
321 emitm(&stream, 0x21, 1); \
323 (3 << 6) | ((sr32 & 0x7) << 3) | (dr32 & 0x7), 1); \
327 #define TESTid(i32, r32) do { \
329 emitm(&stream, 0xa9, 1); \
331 emitm(&stream, 0xf7, 1); \
332 emitm(&stream, (3 << 6) | r32, 1); \
334 emitm(&stream, i32, 4); \
337 /* testl sr32,dr32 */
338 #define TESTrd(sr32, dr32) do { \
339 emitm(&stream, 0x85, 1); \
341 (3 << 6) | ((sr32 & 0x7) << 3) | (dr32 & 0x7), 1); \
345 #define ORrd(sr32, dr32) do { \
346 emitm(&stream, 0x09, 1); \
348 (3 << 6) | ((sr32 & 0x7) << 3) | (dr32 & 0x7), 1); \
352 #define ORid(i32, r32) do { \
354 emitm(&stream, 0x0d, 1); \
356 emitm(&stream, 0x81, 1); \
357 emitm(&stream, (25 << 3) | r32, 1); \
359 emitm(&stream, i32, 4); \
363 #define XORrd(sr32, dr32) do { \
364 emitm(&stream, 0x31, 1); \
366 (3 << 6) | ((sr32 & 0x7) << 3) | (dr32 & 0x7), 1); \
370 #define XORid(i32, r32) do { \
372 emitm(&stream, 0x35, 1); \
374 emitm(&stream, 0x81, 1); \
375 emitm(&stream, (25 << 3) | r32, 1); \
377 emitm(&stream, i32, 4); \
381 #define SHLib(i8, r32) do { \
382 emitm(&stream, 0xc1, 1); \
383 emitm(&stream, (7 << 5) | (r32 & 0x7), 1); \
384 emitm(&stream, i8, 1); \
388 #define SHL_CLrb(dr32) do { \
389 emitm(&stream, 0xd3, 1); \
390 emitm(&stream, (7 << 5) | (dr32 & 0x7), 1); \
394 #define SHRib(i8, r32) do { \
395 emitm(&stream, 0xc1, 1); \
396 emitm(&stream, (29 << 3) | (r32 & 0x7), 1); \
397 emitm(&stream, i8, 1); \
401 #define SHR_CLrb(dr32) do { \
402 emitm(&stream, 0xd3, 1); \
403 emitm(&stream, (29 << 3) | (dr32 & 0x7), 1); \
407 #define NEGd(r32) do { \
408 emitm(&stream, 0xf7, 1); \
409 emitm(&stream, (27 << 3) | (r32 & 0x7), 1); \
413 #define CMPrd(sr32, dr32) do { \
414 emitm(&stream, 0x39, 1); \
416 (3 << 6) | ((sr32 & 0x7) << 3) | (dr32 & 0x7), 1); \
420 #define CMPid(i32, dr32) do { \
422 emitm(&stream, 0x3d, 1); \
423 emitm(&stream, i32, 4); \
425 emitm(&stream, 0x81, 1); \
426 emitm(&stream, (0x1f << 3) | (dr32 & 0x7), 1); \
427 emitm(&stream, i32, 4); \
432 #define JBb(off8) do { \
433 emitm(&stream, 0x72, 1); \
434 emitm(&stream, off8, 1); \
438 #define JAEb(off8) do { \
439 emitm(&stream, 0x73, 1); \
440 emitm(&stream, off8, 1); \
444 #define JNEb(off8) do { \
445 emitm(&stream, 0x75, 1); \
446 emitm(&stream, off8, 1); \
450 #define JAb(off8) do { \
451 emitm(&stream, 0x77, 1); \
452 emitm(&stream, off8, 1); \
456 #define JMP(off32) do { \
457 emitm(&stream, 0xe9, 1); \
458 emitm(&stream, off32, 4); \
462 #define ZEROrd(r32) do { \
463 emitm(&stream, 0x31, 1); \
464 emitm(&stream, (3 << 6) | ((r32 & 0x7) << 3) | (r32 & 0x7), 1); \
468 * Conditional long jumps
477 #define JCC(t, f) do { \
478 if (ins->jt != 0 && ins->jf != 0) { \
479 /* 5 is the size of the following jmp */ \
480 emitm(&stream, ((t) << 8) | 0x0f, 2); \
481 emitm(&stream, stream.refs[stream.bpf_pc + ins->jt] - \
482 stream.refs[stream.bpf_pc] + 5, 4); \
483 JMP(stream.refs[stream.bpf_pc + ins->jf] - \
484 stream.refs[stream.bpf_pc]); \
485 } else if (ins->jt != 0) { \
486 emitm(&stream, ((t) << 8) | 0x0f, 2); \
487 emitm(&stream, stream.refs[stream.bpf_pc + ins->jt] - \
488 stream.refs[stream.bpf_pc], 4); \
490 emitm(&stream, ((f) << 8) | 0x0f, 2); \
491 emitm(&stream, stream.refs[stream.bpf_pc + ins->jf] - \
492 stream.refs[stream.bpf_pc], 4); \
496 #define JUMP(off) do { \
498 JMP(stream.refs[stream.bpf_pc + (off)] - \
499 stream.refs[stream.bpf_pc]); \
502 #endif /* _BPF_JIT_MACHDEP_H_ */