2 * Copyright (c) 2003 Peter Wemm.
3 * Copyright (c) 1990 The Regents of the University of California.
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 4. Neither the name of the University nor the names of its contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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36 #include <machine/asmacros.h>
37 #include <machine/specialreg.h>
40 #include "opt_sched.h"
42 /*****************************************************************************/
44 /*****************************************************************************/
54 #if defined(SCHED_ULE) && defined(SMP)
63 * This is the second half of cpu_switch(). It is used when the current
64 * thread is either a dummy or slated to die, and we no longer care
65 * about its state. This is only a slight optimization and is probably
66 * not worth it anymore. Note that we need to clear the pm_active bits so
67 * we do need the old proc if it still exists.
79 * cpu_switch(old, new, mtx)
81 * Save the current thread state, then select the next thread to run
88 /* Switch to new thread. First, save context. */
91 movq (%rsp),%rax /* Hardware registers */
92 movq %r15,PCB_R15(%r8)
93 movq %r14,PCB_R14(%r8)
94 movq %r13,PCB_R13(%r8)
95 movq %r12,PCB_R12(%r8)
96 movq %rbp,PCB_RBP(%r8)
97 movq %rsp,PCB_RSP(%r8)
98 movq %rbx,PCB_RBX(%r8)
99 movq %rax,PCB_RIP(%r8)
101 testl $PCB_FULL_IRET,PCB_FLAGS(%r8)
103 orl $PCB_FULL_IRET,PCB_FLAGS(%r8)
104 testl $TDP_KTHREAD,TD_PFLAGS(%rdi)
106 testb $CPUID_STDEXT_FSGSBASE,cpu_stdext_feature(%rip)
112 movq %rax,PCB_FSBASE(%r8)
117 movl $MSR_KGSBASE,%ecx /* Read user gs base */
121 movq %rax,PCB_GSBASE(%r8)
125 testl $PCB_DBREGS,PCB_FLAGS(%r8)
126 jnz store_dr /* static predict not taken */
129 /* have we used fp, and need a save? */
130 cmpq %rdi,PCPU(FPCURTHREAD)
132 movq PCB_SAVEFPU(%r8),%r8
140 movl xsave_mask+4,%edx
141 .globl ctx_switch_xsave
143 /* This is patched to xsaveopt if supported, see fpuinit_bsp1() */
150 movq %rax,PCPU(FPCURTHREAD)
152 /* Save is done. Now fire up new thread. Leave old vmspace. */
157 callq pmap_activate_sw
158 SETLK %r15,TD_LOCK(%r13) /* Release the old thread */
160 movq TD_PCB(%r12),%r8
161 #if defined(SCHED_ULE) && defined(SMP)
162 /* Wait for the new thread to become unblocked */
163 movq $blocked_lock, %rdx
165 movq TD_LOCK(%r12),%rcx
171 * At this point, we've switched address spaces and are ready
172 * to load up the rest of the next context.
175 /* Skip loading LDT and user fsbase/gsbase for kthreads */
176 testl $TDP_KTHREAD,TD_PFLAGS(%r12)
182 movq TD_PROC(%r12),%rcx
183 cmpq $0, P_MD+MD_LDT(%rcx)
188 /* Restore fs base in GDT */
189 movl PCB_FSBASE(%r8),%eax
190 movq PCPU(FS32P),%rdx
197 /* Restore gs base in GDT */
198 movl PCB_GSBASE(%r8),%eax
199 movq PCPU(GS32P),%rdx
207 /* Do we need to reload tss ? */
209 movq PCB_TSSP(%r8),%rdx
211 cmovzq PCPU(COMMONTSSP),%rdx
216 movq %r8,PCPU(CURPCB)
217 /* Update the TSS_RSP0 pointer for the next interrupt */
218 movq %r8,COMMON_TSS_RSP0(%rdx)
219 movq %r12,PCPU(CURTHREAD) /* into next thread */
221 /* Test if debug registers should be restored. */
222 testl $PCB_DBREGS,PCB_FLAGS(%r8)
223 jnz load_dr /* static predict not taken */
226 /* Restore context. */
227 movq PCB_R15(%r8),%r15
228 movq PCB_R14(%r8),%r14
229 movq PCB_R13(%r8),%r13
230 movq PCB_R12(%r8),%r12
231 movq PCB_RBP(%r8),%rbp
232 movq PCB_RSP(%r8),%rsp
233 movq PCB_RBX(%r8),%rbx
234 movq PCB_RIP(%r8),%rax
239 * We order these strangely for several reasons.
240 * 1: I wanted to use static branch prediction hints
241 * 2: Most athlon64/opteron cpus don't have them. They define
242 * a forward branch as 'predict not taken'. Intel cores have
243 * the 'rep' prefix to invert this.
244 * So, to make it work on both forms of cpu we do the detour.
245 * We use jumps rather than call in order to avoid the stack.
249 movq %dr7,%rax /* yes, do the save */
255 movq %r15,PCB_DR0(%r8)
256 movq %r14,PCB_DR1(%r8)
257 movq %r13,PCB_DR2(%r8)
258 movq %r12,PCB_DR3(%r8)
259 movq %r11,PCB_DR6(%r8)
260 movq %rax,PCB_DR7(%r8)
261 andq $0x0000fc00, %rax /* disable all watchpoints */
267 movq PCB_DR0(%r8),%r15
268 movq PCB_DR1(%r8),%r14
269 movq PCB_DR2(%r8),%r13
270 movq PCB_DR3(%r8),%r12
271 movq PCB_DR6(%r8),%r11
272 movq PCB_DR7(%r8),%rcx
275 /* Preserve reserved bits in %dr7 */
276 andq $0x0000fc00,%rax
277 andq $~0x0000fc00,%rcx
285 do_tss: movq %rdx,PCPU(TSSP)
295 movb $0x89,5(%rax) /* unset busy */
300 do_ldt: movq PCPU(LDT),%rax
301 movq P_MD+MD_LDT_SD(%rcx),%rdx
303 movq P_MD+MD_LDT_SD+8(%rcx),%rdx
311 * Update pcb, saving current processor state.
314 /* Save caller's return address. */
316 movq %rax,PCB_RIP(%rdi)
318 movq %rbx,PCB_RBX(%rdi)
319 movq %rsp,PCB_RSP(%rdi)
320 movq %rbp,PCB_RBP(%rdi)
321 movq %r12,PCB_R12(%rdi)
322 movq %r13,PCB_R13(%rdi)
323 movq %r14,PCB_R14(%rdi)
324 movq %r15,PCB_R15(%rdi)
327 movq %rax,PCB_CR0(%rdi)
329 movq %rax,PCB_CR2(%rdi)
331 movq %rax,PCB_CR3(%rdi)
333 movq %rax,PCB_CR4(%rdi)
336 movq %rax,PCB_DR0(%rdi)
338 movq %rax,PCB_DR1(%rdi)
340 movq %rax,PCB_DR2(%rdi)
342 movq %rax,PCB_DR3(%rdi)
344 movq %rax,PCB_DR6(%rdi)
346 movq %rax,PCB_DR7(%rdi)
348 movl $MSR_FSBASE,%ecx
350 movl %eax,PCB_FSBASE(%rdi)
351 movl %edx,PCB_FSBASE+4(%rdi)
352 movl $MSR_GSBASE,%ecx
354 movl %eax,PCB_GSBASE(%rdi)
355 movl %edx,PCB_GSBASE+4(%rdi)
356 movl $MSR_KGSBASE,%ecx
358 movl %eax,PCB_KGSBASE(%rdi)
359 movl %edx,PCB_KGSBASE+4(%rdi)
362 movl %eax,PCB_EFER(%rdi)
363 movl %edx,PCB_EFER+4(%rdi)
366 movl %eax,PCB_STAR(%rdi)
367 movl %edx,PCB_STAR+4(%rdi)
370 movl %eax,PCB_LSTAR(%rdi)
371 movl %edx,PCB_LSTAR+4(%rdi)
374 movl %eax,PCB_CSTAR(%rdi)
375 movl %edx,PCB_CSTAR+4(%rdi)
376 movl $MSR_SF_MASK,%ecx
378 movl %eax,PCB_SFMASK(%rdi)
379 movl %edx,PCB_SFMASK+4(%rdi)
392 * Resuming processor state from pcb.
395 /* Switch to KPML4phys. */
399 /* Force kernel segment registers. */
409 movl $MSR_FSBASE,%ecx
410 movl PCB_FSBASE(%rdi),%eax
411 movl 4 + PCB_FSBASE(%rdi),%edx
413 movl $MSR_GSBASE,%ecx
414 movl PCB_GSBASE(%rdi),%eax
415 movl 4 + PCB_GSBASE(%rdi),%edx
417 movl $MSR_KGSBASE,%ecx
418 movl PCB_KGSBASE(%rdi),%eax
419 movl 4 + PCB_KGSBASE(%rdi),%edx
422 /* Restore EFER one more time. */
424 movl PCB_EFER(%rdi),%eax
427 /* Restore fast syscall stuff. */
429 movl PCB_STAR(%rdi),%eax
430 movl 4 + PCB_STAR(%rdi),%edx
433 movl PCB_LSTAR(%rdi),%eax
434 movl 4 + PCB_LSTAR(%rdi),%edx
437 movl PCB_CSTAR(%rdi),%eax
438 movl 4 + PCB_CSTAR(%rdi),%edx
440 movl $MSR_SF_MASK,%ecx
441 movl PCB_SFMASK(%rdi),%eax
444 /* Restore CR0, CR2, CR4 and CR3. */
445 movq PCB_CR0(%rdi),%rax
447 movq PCB_CR2(%rdi),%rax
449 movq PCB_CR4(%rdi),%rax
451 movq PCB_CR3(%rdi),%rax
454 /* Restore descriptor tables. */
459 #define SDT_SYSBSY 11
461 /* Clear "task busy" bit and reload TR. */
463 andb $(~SDT_SYSBSY | SDT_SYSTSS),5(%rax)
464 movw PCB_TR(%rdi),%ax
470 /* Restore debug registers. */
471 movq PCB_DR0(%rdi),%rax
473 movq PCB_DR1(%rdi),%rax
475 movq PCB_DR2(%rdi),%rax
477 movq PCB_DR3(%rdi),%rax
479 movq PCB_DR6(%rdi),%rax
481 movq PCB_DR7(%rdi),%rax
484 /* Restore other callee saved registers. */
485 movq PCB_R15(%rdi),%r15
486 movq PCB_R14(%rdi),%r14
487 movq PCB_R13(%rdi),%r13
488 movq PCB_R12(%rdi),%r12
489 movq PCB_RBP(%rdi),%rbp
490 movq PCB_RSP(%rdi),%rsp
491 movq PCB_RBX(%rdi),%rbx
493 /* Restore return address. */
494 movq PCB_RIP(%rdi),%rax