2 * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. Neither the name of the author nor the names of any co-contributors
14 * may be used to endorse or promote products derived from this software
15 * without specific prior written permission.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * Machine dependent interrupt code for amd64. For amd64, we have to
34 * deal with different PICs. Thus, we use the passed in vector to lookup
35 * an interrupt source associated with that vector. The interrupt source
36 * describes which PIC the source belongs to and includes methods to handle
40 #include "opt_atpic.h"
43 #include <sys/param.h>
45 #include <sys/interrupt.h>
47 #include <sys/kernel.h>
49 #include <sys/mutex.h>
52 #include <sys/syslog.h>
53 #include <sys/systm.h>
55 #include <machine/clock.h>
56 #include <machine/intr_machdep.h>
57 #include <machine/smp.h>
63 #include <machine/segments.h>
64 #include <machine/frame.h>
65 #include <dev/ic/i8259.h>
66 #include <amd64/isa/icu.h>
67 #include <amd64/isa/isa.h>
70 #define MAX_STRAY_LOG 5
72 typedef void (*mask_fn)(void *);
74 static int intrcnt_index;
75 static struct intsrc *interrupt_sources[NUM_IO_INTS];
76 static struct sx intr_table_lock;
77 static struct mtx intrcnt_lock;
78 static STAILQ_HEAD(, pic) pics;
81 static int assign_cpu;
83 static void intr_assign_next_cpu(struct intsrc *isrc);
86 static int intr_assign_cpu(void *arg, u_char cpu);
87 static void intr_disable_src(void *arg);
88 static void intr_init(void *__dummy);
89 static int intr_pic_registered(struct pic *pic);
90 static void intrcnt_setname(const char *name, int index);
91 static void intrcnt_updatename(struct intsrc *is);
92 static void intrcnt_register(struct intsrc *is);
95 intr_pic_registered(struct pic *pic)
99 STAILQ_FOREACH(p, &pics, pics) {
107 * Register a new interrupt controller (PIC). This is to support suspend
108 * and resume where we suspend/resume controllers rather than individual
109 * sources. This also allows controllers with no active sources (such as
110 * 8259As in a system using the APICs) to participate in suspend and resume.
113 intr_register_pic(struct pic *pic)
117 sx_xlock(&intr_table_lock);
118 if (intr_pic_registered(pic))
121 STAILQ_INSERT_TAIL(&pics, pic, pics);
124 sx_xunlock(&intr_table_lock);
129 * Register a new interrupt source with the global interrupt system.
130 * The global interrupts need to be disabled when this function is
134 intr_register_source(struct intsrc *isrc)
138 KASSERT(intr_pic_registered(isrc->is_pic), ("unregistered PIC"));
139 vector = isrc->is_pic->pic_vector(isrc);
140 if (interrupt_sources[vector] != NULL)
142 error = intr_event_create(&isrc->is_event, isrc, 0, vector,
143 intr_disable_src, (mask_fn)isrc->is_pic->pic_enable_source,
144 (mask_fn)isrc->is_pic->pic_eoi_source, intr_assign_cpu, "irq%d:",
148 sx_xlock(&intr_table_lock);
149 if (interrupt_sources[vector] != NULL) {
150 sx_xunlock(&intr_table_lock);
151 intr_event_destroy(isrc->is_event);
154 intrcnt_register(isrc);
155 interrupt_sources[vector] = isrc;
156 isrc->is_handlers = 0;
157 sx_xunlock(&intr_table_lock);
162 intr_lookup_source(int vector)
165 return (interrupt_sources[vector]);
169 intr_add_handler(const char *name, int vector, driver_filter_t filter,
170 driver_intr_t handler, void *arg, enum intr_type flags, void **cookiep)
175 isrc = intr_lookup_source(vector);
178 error = intr_event_add_handler(isrc->is_event, name, filter, handler,
179 arg, intr_priority(flags), flags, cookiep);
181 sx_xlock(&intr_table_lock);
182 intrcnt_updatename(isrc);
184 if (isrc->is_handlers == 1) {
187 intr_assign_next_cpu(isrc);
189 isrc->is_pic->pic_enable_intr(isrc);
190 isrc->is_pic->pic_enable_source(isrc);
192 sx_xunlock(&intr_table_lock);
198 intr_remove_handler(void *cookie)
203 isrc = intr_handler_source(cookie);
204 error = intr_event_remove_handler(cookie);
206 sx_xlock(&intr_table_lock);
208 if (isrc->is_handlers == 0) {
209 isrc->is_pic->pic_disable_source(isrc, PIC_NO_EOI);
210 isrc->is_pic->pic_disable_intr(isrc);
212 intrcnt_updatename(isrc);
213 sx_xunlock(&intr_table_lock);
219 intr_config_intr(int vector, enum intr_trigger trig, enum intr_polarity pol)
223 isrc = intr_lookup_source(vector);
226 return (isrc->is_pic->pic_config_intr(isrc, trig, pol));
230 intr_disable_src(void *arg)
235 isrc->is_pic->pic_disable_source(isrc, PIC_EOI);
239 intr_execute_handlers(struct intsrc *isrc, struct trapframe *frame)
241 struct intr_event *ie;
248 * We count software interrupts when we process them. The
249 * code here follows previous practice, but there's an
250 * argument for counting hardware interrupts when they're
254 PCPU_INC(cnt.v_intr);
259 * XXX: We assume that IRQ 0 is only used for the ISA timer
262 vector = isrc->is_pic->pic_vector(isrc);
267 * For stray interrupts, mask and EOI the source, bump the
268 * stray count, and log the condition.
270 if (intr_event_handle(ie, frame) != 0) {
271 isrc->is_pic->pic_disable_source(isrc, PIC_EOI);
272 (*isrc->is_straycount)++;
273 if (*isrc->is_straycount < MAX_STRAY_LOG)
274 log(LOG_ERR, "stray irq%d\n", vector);
275 else if (*isrc->is_straycount == MAX_STRAY_LOG)
277 "too many stray irq %d's: not logging anymore\n",
290 sx_xlock(&intr_table_lock);
291 STAILQ_FOREACH(pic, &pics, pics) {
292 if (pic->pic_resume != NULL)
293 pic->pic_resume(pic);
295 sx_xunlock(&intr_table_lock);
303 sx_xlock(&intr_table_lock);
304 STAILQ_FOREACH(pic, &pics, pics) {
305 if (pic->pic_suspend != NULL)
306 pic->pic_suspend(pic);
308 sx_xunlock(&intr_table_lock);
312 intr_assign_cpu(void *arg, u_char cpu)
318 * Don't do anything during early boot. We will pick up the
319 * assignment once the APs are started.
321 if (assign_cpu && cpu != NOCPU) {
323 sx_xlock(&intr_table_lock);
324 isrc->is_pic->pic_assign_cpu(isrc, cpu_apic_ids[cpu]);
325 sx_xunlock(&intr_table_lock);
334 intrcnt_setname(const char *name, int index)
337 snprintf(intrnames + (MAXCOMLEN + 1) * index, MAXCOMLEN + 1, "%-*s",
342 intrcnt_updatename(struct intsrc *is)
345 intrcnt_setname(is->is_event->ie_fullname, is->is_index);
349 intrcnt_register(struct intsrc *is)
351 char straystr[MAXCOMLEN + 1];
353 KASSERT(is->is_event != NULL, ("%s: isrc with no event", __func__));
354 mtx_lock_spin(&intrcnt_lock);
355 is->is_index = intrcnt_index;
357 snprintf(straystr, MAXCOMLEN + 1, "stray irq%d",
358 is->is_pic->pic_vector(is));
359 intrcnt_updatename(is);
360 is->is_count = &intrcnt[is->is_index];
361 intrcnt_setname(straystr, is->is_index + 1);
362 is->is_straycount = &intrcnt[is->is_index + 1];
363 mtx_unlock_spin(&intrcnt_lock);
367 intrcnt_add(const char *name, u_long **countp)
370 mtx_lock_spin(&intrcnt_lock);
371 *countp = &intrcnt[intrcnt_index];
372 intrcnt_setname(name, intrcnt_index);
374 mtx_unlock_spin(&intrcnt_lock);
378 intr_init(void *dummy __unused)
381 intrcnt_setname("???", 0);
384 sx_init(&intr_table_lock, "intr sources");
385 mtx_init(&intrcnt_lock, "intrcnt", NULL, MTX_SPIN);
387 SYSINIT(intr_init, SI_SUB_INTR, SI_ORDER_FIRST, intr_init, NULL);
390 /* Initialize the two 8259A's to a known-good shutdown state. */
395 outb(IO_ICU1, ICW1_RESET | ICW1_IC4);
396 outb(IO_ICU1 + ICU_IMR_OFFSET, IDT_IO_INTS);
397 outb(IO_ICU1 + ICU_IMR_OFFSET, 1 << 2);
398 outb(IO_ICU1 + ICU_IMR_OFFSET, ICW4_8086);
399 outb(IO_ICU1 + ICU_IMR_OFFSET, 0xff);
400 outb(IO_ICU1, OCW3_SEL | OCW3_RR);
402 outb(IO_ICU2, ICW1_RESET | ICW1_IC4);
403 outb(IO_ICU2 + ICU_IMR_OFFSET, IDT_IO_INTS + 8);
404 outb(IO_ICU2 + ICU_IMR_OFFSET, 2);
405 outb(IO_ICU2 + ICU_IMR_OFFSET, ICW4_8086);
406 outb(IO_ICU2 + ICU_IMR_OFFSET, 0xff);
407 outb(IO_ICU2, OCW3_SEL | OCW3_RR);
413 * Dump data about interrupt handlers
415 DB_SHOW_COMMAND(irqs, db_show_irqs)
417 struct intsrc **isrc;
420 if (strcmp(modif, "v") == 0)
424 isrc = interrupt_sources;
425 for (i = 0; i < NUM_IO_INTS && !db_pager_quit; i++, isrc++)
427 db_dump_intr_event((*isrc)->is_event, verbose);
433 * Support for balancing interrupt sources across CPUs. For now we just
434 * allocate CPUs round-robin.
437 /* The BSP is always a valid target. */
438 static cpumask_t intr_cpus = (1 << 0);
439 static int current_cpu;
442 intr_assign_next_cpu(struct intsrc *isrc)
446 * Assign this source to a local APIC in a round-robin fashion.
448 isrc->is_pic->pic_assign_cpu(isrc, cpu_apic_ids[current_cpu]);
451 if (current_cpu > mp_maxid)
453 } while (!(intr_cpus & (1 << current_cpu)));
456 /* Attempt to bind the specified IRQ to the specified CPU. */
458 intr_bind(u_int vector, u_char cpu)
462 isrc = intr_lookup_source(vector);
465 return (intr_event_bind(isrc->is_event, cpu));
469 * Add a CPU to our mask of valid CPUs that can be destinations of
473 intr_add_cpu(u_int cpu)
477 panic("%s: Invalid CPU ID", __func__);
479 printf("INTR: Adding local APIC %d as a target\n",
482 intr_cpus |= (1 << cpu);
486 * Distribute all the interrupt sources among the available CPUs once the
487 * AP's have been launched.
490 intr_shuffle_irqs(void *arg __unused)
495 /* Don't bother on UP. */
499 /* Round-robin assign a CPU to each enabled source. */
500 sx_xlock(&intr_table_lock);
502 for (i = 0; i < NUM_IO_INTS; i++) {
503 isrc = interrupt_sources[i];
504 if (isrc != NULL && isrc->is_handlers > 0) {
506 * If this event is already bound to a CPU,
507 * then assign the source to that CPU instead
508 * of picking one via round-robin.
510 if (isrc->is_event->ie_cpu != NOCPU)
511 isrc->is_pic->pic_assign_cpu(isrc,
512 cpu_apic_ids[isrc->is_event->ie_cpu]);
514 intr_assign_next_cpu(isrc);
517 sx_xunlock(&intr_table_lock);
519 SYSINIT(intr_shuffle_irqs, SI_SUB_SMP, SI_ORDER_SECOND, intr_shuffle_irqs,