2 * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. Neither the name of the author nor the names of any co-contributors
14 * may be used to endorse or promote products derived from this software
15 * without specific prior written permission.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * Machine dependent interrupt code for amd64. For amd64, we have to
34 * deal with different PICs. Thus, we use the passed in vector to lookup
35 * an interrupt source associated with that vector. The interrupt source
36 * describes which PIC the source belongs to and includes methods to handle
40 #include "opt_atpic.h"
43 #include <sys/param.h>
45 #include <sys/interrupt.h>
47 #include <sys/kernel.h>
49 #include <sys/mutex.h>
52 #include <sys/syslog.h>
53 #include <sys/systm.h>
54 #include <machine/clock.h>
55 #include <machine/intr_machdep.h>
56 #include <machine/smp.h>
62 #include <machine/segments.h>
63 #include <machine/frame.h>
64 #include <dev/ic/i8259.h>
65 #include <amd64/isa/icu.h>
66 #include <amd64/isa/isa.h>
69 #define MAX_STRAY_LOG 5
71 typedef void (*mask_fn)(void *);
73 static int intrcnt_index;
74 static struct intsrc *interrupt_sources[NUM_IO_INTS];
75 static struct mtx intr_table_lock;
76 static struct mtx intrcnt_lock;
77 static STAILQ_HEAD(, pic) pics;
80 static int assign_cpu;
83 static int intr_assign_cpu(void *arg, u_char cpu);
84 static void intr_disable_src(void *arg);
85 static void intr_init(void *__dummy);
86 static int intr_pic_registered(struct pic *pic);
87 static void intrcnt_setname(const char *name, int index);
88 static void intrcnt_updatename(struct intsrc *is);
89 static void intrcnt_register(struct intsrc *is);
92 intr_pic_registered(struct pic *pic)
96 STAILQ_FOREACH(p, &pics, pics) {
104 * Register a new interrupt controller (PIC). This is to support suspend
105 * and resume where we suspend/resume controllers rather than individual
106 * sources. This also allows controllers with no active sources (such as
107 * 8259As in a system using the APICs) to participate in suspend and resume.
110 intr_register_pic(struct pic *pic)
114 mtx_lock(&intr_table_lock);
115 if (intr_pic_registered(pic))
118 STAILQ_INSERT_TAIL(&pics, pic, pics);
121 mtx_unlock(&intr_table_lock);
126 * Register a new interrupt source with the global interrupt system.
127 * The global interrupts need to be disabled when this function is
131 intr_register_source(struct intsrc *isrc)
135 KASSERT(intr_pic_registered(isrc->is_pic), ("unregistered PIC"));
136 vector = isrc->is_pic->pic_vector(isrc);
137 if (interrupt_sources[vector] != NULL)
139 error = intr_event_create(&isrc->is_event, isrc, 0, vector,
140 intr_disable_src, (mask_fn)isrc->is_pic->pic_enable_source,
141 (mask_fn)isrc->is_pic->pic_eoi_source, intr_assign_cpu, "irq%d:",
145 mtx_lock(&intr_table_lock);
146 if (interrupt_sources[vector] != NULL) {
147 mtx_unlock(&intr_table_lock);
148 intr_event_destroy(isrc->is_event);
151 intrcnt_register(isrc);
152 interrupt_sources[vector] = isrc;
153 isrc->is_handlers = 0;
154 mtx_unlock(&intr_table_lock);
159 intr_lookup_source(int vector)
162 return (interrupt_sources[vector]);
166 intr_add_handler(const char *name, int vector, driver_filter_t filter,
167 driver_intr_t handler, void *arg, enum intr_type flags, void **cookiep)
172 isrc = intr_lookup_source(vector);
175 error = intr_event_add_handler(isrc->is_event, name, filter, handler,
176 arg, intr_priority(flags), flags, cookiep);
178 mtx_lock(&intr_table_lock);
179 intrcnt_updatename(isrc);
181 if (isrc->is_handlers == 1) {
182 isrc->is_pic->pic_enable_intr(isrc);
183 isrc->is_pic->pic_enable_source(isrc);
185 mtx_unlock(&intr_table_lock);
191 intr_remove_handler(void *cookie)
196 isrc = intr_handler_source(cookie);
197 error = intr_event_remove_handler(cookie);
199 mtx_lock(&intr_table_lock);
201 if (isrc->is_handlers == 0) {
202 isrc->is_pic->pic_disable_source(isrc, PIC_NO_EOI);
203 isrc->is_pic->pic_disable_intr(isrc);
205 intrcnt_updatename(isrc);
206 mtx_unlock(&intr_table_lock);
212 intr_config_intr(int vector, enum intr_trigger trig, enum intr_polarity pol)
216 isrc = intr_lookup_source(vector);
219 return (isrc->is_pic->pic_config_intr(isrc, trig, pol));
223 intr_disable_src(void *arg)
228 isrc->is_pic->pic_disable_source(isrc, PIC_EOI);
232 intr_execute_handlers(struct intsrc *isrc, struct trapframe *frame)
234 struct intr_event *ie;
238 * We count software interrupts when we process them. The
239 * code here follows previous practice, but there's an
240 * argument for counting hardware interrupts when they're
244 PCPU_INC(cnt.v_intr);
249 * XXX: We assume that IRQ 0 is only used for the ISA timer
252 vector = isrc->is_pic->pic_vector(isrc);
257 * For stray interrupts, mask and EOI the source, bump the
258 * stray count, and log the condition.
260 if (intr_event_handle(ie, frame) != 0) {
261 isrc->is_pic->pic_disable_source(isrc, PIC_EOI);
262 (*isrc->is_straycount)++;
263 if (*isrc->is_straycount < MAX_STRAY_LOG)
264 log(LOG_ERR, "stray irq%d\n", vector);
265 else if (*isrc->is_straycount == MAX_STRAY_LOG)
267 "too many stray irq %d's: not logging anymore\n",
280 mtx_lock(&intr_table_lock);
281 STAILQ_FOREACH(pic, &pics, pics) {
282 if (pic->pic_resume != NULL)
283 pic->pic_resume(pic);
285 mtx_unlock(&intr_table_lock);
293 mtx_lock(&intr_table_lock);
294 STAILQ_FOREACH(pic, &pics, pics) {
295 if (pic->pic_suspend != NULL)
296 pic->pic_suspend(pic);
298 mtx_unlock(&intr_table_lock);
302 intr_assign_cpu(void *arg, u_char cpu)
309 * Don't do anything during early boot. We will pick up the
310 * assignment once the APs are started.
312 if (assign_cpu && cpu != NOCPU) {
314 mtx_lock(&intr_table_lock);
315 error = isrc->is_pic->pic_assign_cpu(isrc, cpu_apic_ids[cpu]);
316 mtx_unlock(&intr_table_lock);
326 intrcnt_setname(const char *name, int index)
329 snprintf(intrnames + (MAXCOMLEN + 1) * index, MAXCOMLEN + 1, "%-*s",
334 intrcnt_updatename(struct intsrc *is)
337 intrcnt_setname(is->is_event->ie_fullname, is->is_index);
341 intrcnt_register(struct intsrc *is)
343 char straystr[MAXCOMLEN + 1];
345 KASSERT(is->is_event != NULL, ("%s: isrc with no event", __func__));
346 mtx_lock_spin(&intrcnt_lock);
347 is->is_index = intrcnt_index;
349 snprintf(straystr, MAXCOMLEN + 1, "stray irq%d",
350 is->is_pic->pic_vector(is));
351 intrcnt_updatename(is);
352 is->is_count = &intrcnt[is->is_index];
353 intrcnt_setname(straystr, is->is_index + 1);
354 is->is_straycount = &intrcnt[is->is_index + 1];
355 mtx_unlock_spin(&intrcnt_lock);
359 intrcnt_add(const char *name, u_long **countp)
362 mtx_lock_spin(&intrcnt_lock);
363 *countp = &intrcnt[intrcnt_index];
364 intrcnt_setname(name, intrcnt_index);
366 mtx_unlock_spin(&intrcnt_lock);
370 intr_init(void *dummy __unused)
373 intrcnt_setname("???", 0);
376 mtx_init(&intr_table_lock, "intr sources", NULL, MTX_DEF);
377 mtx_init(&intrcnt_lock, "intrcnt", NULL, MTX_SPIN);
379 SYSINIT(intr_init, SI_SUB_INTR, SI_ORDER_FIRST, intr_init, NULL);
382 /* Initialize the two 8259A's to a known-good shutdown state. */
387 outb(IO_ICU1, ICW1_RESET | ICW1_IC4);
388 outb(IO_ICU1 + ICU_IMR_OFFSET, IDT_IO_INTS);
389 outb(IO_ICU1 + ICU_IMR_OFFSET, 1 << 2);
390 outb(IO_ICU1 + ICU_IMR_OFFSET, ICW4_8086);
391 outb(IO_ICU1 + ICU_IMR_OFFSET, 0xff);
392 outb(IO_ICU1, OCW3_SEL | OCW3_RR);
394 outb(IO_ICU2, ICW1_RESET | ICW1_IC4);
395 outb(IO_ICU2 + ICU_IMR_OFFSET, IDT_IO_INTS + 8);
396 outb(IO_ICU2 + ICU_IMR_OFFSET, 2);
397 outb(IO_ICU2 + ICU_IMR_OFFSET, ICW4_8086);
398 outb(IO_ICU2 + ICU_IMR_OFFSET, 0xff);
399 outb(IO_ICU2, OCW3_SEL | OCW3_RR);
403 /* Add a description to an active interrupt handler. */
405 intr_describe(u_int vector, void *ih, const char *descr)
410 isrc = intr_lookup_source(vector);
413 error = intr_event_describe_handler(isrc->is_event, ih, descr);
416 intrcnt_updatename(isrc);
422 * Dump data about interrupt handlers
424 DB_SHOW_COMMAND(irqs, db_show_irqs)
426 struct intsrc **isrc;
429 if (strcmp(modif, "v") == 0)
433 isrc = interrupt_sources;
434 for (i = 0; i < NUM_IO_INTS && !db_pager_quit; i++, isrc++)
436 db_dump_intr_event((*isrc)->is_event, verbose);
442 * Support for balancing interrupt sources across CPUs. For now we just
443 * allocate CPUs round-robin.
446 /* The BSP is always a valid target. */
447 static cpumask_t intr_cpus = (1 << 0);
448 static int current_cpu;
451 * Return the CPU that the next interrupt source should use. For now
452 * this just returns the next local APIC according to round-robin.
459 /* Leave all interrupts on the BSP during boot. */
461 return (PCPU_GET(apic_id));
463 mtx_lock_spin(&icu_lock);
464 apic_id = cpu_apic_ids[current_cpu];
467 if (current_cpu > mp_maxid)
469 } while (!(intr_cpus & (1 << current_cpu)));
470 mtx_unlock_spin(&icu_lock);
474 /* Attempt to bind the specified IRQ to the specified CPU. */
476 intr_bind(u_int vector, u_char cpu)
480 isrc = intr_lookup_source(vector);
483 return (intr_event_bind(isrc->is_event, cpu));
487 * Add a CPU to our mask of valid CPUs that can be destinations of
491 intr_add_cpu(u_int cpu)
495 panic("%s: Invalid CPU ID", __func__);
497 printf("INTR: Adding local APIC %d as a target\n",
500 intr_cpus |= (1 << cpu);
504 * Distribute all the interrupt sources among the available CPUs once the
505 * AP's have been launched.
508 intr_shuffle_irqs(void *arg __unused)
513 /* Don't bother on UP. */
517 /* Round-robin assign a CPU to each enabled source. */
518 mtx_lock(&intr_table_lock);
520 for (i = 0; i < NUM_IO_INTS; i++) {
521 isrc = interrupt_sources[i];
522 if (isrc != NULL && isrc->is_handlers > 0) {
524 * If this event is already bound to a CPU,
525 * then assign the source to that CPU instead
526 * of picking one via round-robin. Note that
527 * this is careful to only advance the
528 * round-robin if the CPU assignment succeeds.
530 if (isrc->is_event->ie_cpu != NOCPU)
531 (void)isrc->is_pic->pic_assign_cpu(isrc,
532 cpu_apic_ids[isrc->is_event->ie_cpu]);
533 else if (isrc->is_pic->pic_assign_cpu(isrc,
534 cpu_apic_ids[current_cpu]) == 0)
535 (void)intr_next_cpu();
539 mtx_unlock(&intr_table_lock);
541 SYSINIT(intr_shuffle_irqs, SI_SUB_SMP, SI_ORDER_SECOND, intr_shuffle_irqs,
545 * Always route interrupts to the current processor in the UP case.
551 return (PCPU_GET(apic_id));