2 * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. Neither the name of the author nor the names of any co-contributors
14 * may be used to endorse or promote products derived from this software
15 * without specific prior written permission.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * Machine dependent interrupt code for amd64. For amd64, we have to
34 * deal with different PICs. Thus, we use the passed in vector to lookup
35 * an interrupt source associated with that vector. The interrupt source
36 * describes which PIC the source belongs to and includes methods to handle
40 #include "opt_atpic.h"
43 #include <sys/param.h>
45 #include <sys/interrupt.h>
47 #include <sys/kernel.h>
49 #include <sys/mutex.h>
52 #include <sys/syslog.h>
53 #include <sys/systm.h>
55 #include <machine/clock.h>
56 #include <machine/intr_machdep.h>
57 #include <machine/smp.h>
63 #include <machine/segments.h>
64 #include <machine/frame.h>
65 #include <dev/ic/i8259.h>
66 #include <amd64/isa/icu.h>
67 #include <amd64/isa/isa.h>
70 #define MAX_STRAY_LOG 5
72 typedef void (*mask_fn)(void *);
74 static int intrcnt_index;
75 static struct intsrc *interrupt_sources[NUM_IO_INTS];
76 static struct sx intr_table_lock;
77 static struct mtx intrcnt_lock;
78 static STAILQ_HEAD(, pic) pics;
81 static int assign_cpu;
83 static void intr_assign_next_cpu(struct intsrc *isrc);
86 static int intr_assign_cpu(void *arg, u_char cpu);
87 static void intr_disable_src(void *arg);
89 static void intr_event_stray(void *cookie);
91 static void intr_init(void *__dummy);
92 static int intr_pic_registered(struct pic *pic);
93 static void intrcnt_setname(const char *name, int index);
94 static void intrcnt_updatename(struct intsrc *is);
95 static void intrcnt_register(struct intsrc *is);
98 intr_pic_registered(struct pic *pic)
102 STAILQ_FOREACH(p, &pics, pics) {
110 * Register a new interrupt controller (PIC). This is to support suspend
111 * and resume where we suspend/resume controllers rather than individual
112 * sources. This also allows controllers with no active sources (such as
113 * 8259As in a system using the APICs) to participate in suspend and resume.
116 intr_register_pic(struct pic *pic)
120 sx_xlock(&intr_table_lock);
121 if (intr_pic_registered(pic))
124 STAILQ_INSERT_TAIL(&pics, pic, pics);
127 sx_xunlock(&intr_table_lock);
132 * Register a new interrupt source with the global interrupt system.
133 * The global interrupts need to be disabled when this function is
137 intr_register_source(struct intsrc *isrc)
141 KASSERT(intr_pic_registered(isrc->is_pic), ("unregistered PIC"));
142 vector = isrc->is_pic->pic_vector(isrc);
143 if (interrupt_sources[vector] != NULL)
145 error = intr_event_create(&isrc->is_event, isrc, 0,
146 intr_disable_src, (mask_fn)isrc->is_pic->pic_enable_source,
147 (mask_fn)isrc->is_pic->pic_eoi_source, intr_assign_cpu, "irq%d:",
151 sx_xlock(&intr_table_lock);
152 if (interrupt_sources[vector] != NULL) {
153 sx_xunlock(&intr_table_lock);
154 intr_event_destroy(isrc->is_event);
157 intrcnt_register(isrc);
158 interrupt_sources[vector] = isrc;
159 isrc->is_handlers = 0;
160 sx_xunlock(&intr_table_lock);
165 intr_lookup_source(int vector)
168 return (interrupt_sources[vector]);
172 intr_add_handler(const char *name, int vector, driver_filter_t filter,
173 driver_intr_t handler, void *arg, enum intr_type flags, void **cookiep)
178 isrc = intr_lookup_source(vector);
181 error = intr_event_add_handler(isrc->is_event, name, filter, handler,
182 arg, intr_priority(flags), flags, cookiep);
184 sx_xlock(&intr_table_lock);
185 intrcnt_updatename(isrc);
187 if (isrc->is_handlers == 1) {
190 intr_assign_next_cpu(isrc);
192 isrc->is_pic->pic_enable_intr(isrc);
193 isrc->is_pic->pic_enable_source(isrc);
195 sx_xunlock(&intr_table_lock);
201 intr_remove_handler(void *cookie)
206 isrc = intr_handler_source(cookie);
207 error = intr_event_remove_handler(cookie);
209 sx_xlock(&intr_table_lock);
211 if (isrc->is_handlers == 0) {
212 isrc->is_pic->pic_disable_source(isrc, PIC_NO_EOI);
213 isrc->is_pic->pic_disable_intr(isrc);
215 intrcnt_updatename(isrc);
216 sx_xunlock(&intr_table_lock);
222 intr_config_intr(int vector, enum intr_trigger trig, enum intr_polarity pol)
226 isrc = intr_lookup_source(vector);
229 return (isrc->is_pic->pic_config_intr(isrc, trig, pol));
233 intr_disable_src(void *arg)
238 isrc->is_pic->pic_disable_source(isrc, PIC_EOI);
243 intr_execute_handlers(struct intsrc *isrc, struct trapframe *frame)
246 struct intr_event *ie;
252 * We count software interrupts when we process them. The
253 * code here follows previous practice, but there's an
254 * argument for counting hardware interrupts when they're
258 PCPU_INC(cnt.v_intr);
263 * XXX: We assume that IRQ 0 is only used for the ISA timer
266 vector = isrc->is_pic->pic_vector(isrc);
270 if (intr_event_handle(ie, frame) != 0)
271 intr_event_stray(isrc);
275 intr_event_stray(void *cookie)
281 * For stray interrupts, mask and EOI the source, bump the
282 * stray count, and log the condition.
284 isrc->is_pic->pic_disable_source(isrc, PIC_EOI);
285 (*isrc->is_straycount)++;
286 if (*isrc->is_straycount < MAX_STRAY_LOG)
287 log(LOG_ERR, "stray irq%d\n", isrc->is_pic->pic_vector(isrc));
288 else if (*isrc->is_straycount == MAX_STRAY_LOG)
290 "too many stray irq %d's: not logging anymore\n",
291 isrc->is_pic->pic_vector(isrc));
295 intr_execute_handlers(struct intsrc *isrc, struct trapframe *frame)
298 struct intr_event *ie;
299 struct intr_handler *ih;
300 int error, vector, thread, ret;
305 * We count software interrupts when we process them. The
306 * code here follows previous practice, but there's an
307 * argument for counting hardware interrupts when they're
311 PCPU_INC(cnt.v_intr);
316 * XXX: We assume that IRQ 0 is only used for the ISA timer
319 vector = isrc->is_pic->pic_vector(isrc);
324 * For stray interrupts, mask and EOI the source, bump the
325 * stray count, and log the condition.
327 if (ie == NULL || TAILQ_EMPTY(&ie->ie_handlers)) {
328 isrc->is_pic->pic_disable_source(isrc, PIC_EOI);
329 (*isrc->is_straycount)++;
330 if (*isrc->is_straycount < MAX_STRAY_LOG)
331 log(LOG_ERR, "stray irq%d\n", vector);
332 else if (*isrc->is_straycount == MAX_STRAY_LOG)
334 "too many stray irq %d's: not logging anymore\n",
340 * Execute fast interrupt handlers directly.
341 * To support clock handlers, if a handler registers
342 * with a NULL argument, then we pass it a pointer to
343 * a trapframe as its argument.
345 td->td_intr_nesting_level++;
349 TAILQ_FOREACH(ih, &ie->ie_handlers, ih_next) {
350 if (ih->ih_filter == NULL) {
354 CTR4(KTR_INTR, "%s: exec %p(%p) for %s", __func__,
355 ih->ih_filter, ih->ih_argument == NULL ? frame :
356 ih->ih_argument, ih->ih_name);
357 if (ih->ih_argument == NULL)
358 ret = ih->ih_filter(frame);
360 ret = ih->ih_filter(ih->ih_argument);
362 * Wrapper handler special case: see
363 * i386/intr_machdep.c::intr_execute_handlers()
366 if (ret == FILTER_SCHEDULE_THREAD)
372 * If there are any threaded handlers that need to run,
373 * mask the source as well as sending it an EOI. Otherwise,
374 * just send it an EOI but leave it unmasked.
377 isrc->is_pic->pic_disable_source(isrc, PIC_EOI);
379 isrc->is_pic->pic_eoi_source(isrc);
381 /* Schedule the ithread if needed. */
383 error = intr_event_schedule_thread(ie);
384 KASSERT(error == 0, ("bad stray interrupt"));
387 td->td_intr_nesting_level--;
399 sx_xlock(&intr_table_lock);
400 STAILQ_FOREACH(pic, &pics, pics) {
401 if (pic->pic_resume != NULL)
402 pic->pic_resume(pic);
404 sx_xunlock(&intr_table_lock);
412 sx_xlock(&intr_table_lock);
413 STAILQ_FOREACH(pic, &pics, pics) {
414 if (pic->pic_suspend != NULL)
415 pic->pic_suspend(pic);
417 sx_xunlock(&intr_table_lock);
421 intr_assign_cpu(void *arg, u_char cpu)
427 * Don't do anything during early boot. We will pick up the
428 * assignment once the APs are started.
430 if (assign_cpu && cpu != NOCPU) {
432 sx_xlock(&intr_table_lock);
433 isrc->is_pic->pic_assign_cpu(isrc, cpu_apic_ids[cpu]);
434 sx_xunlock(&intr_table_lock);
443 intrcnt_setname(const char *name, int index)
446 snprintf(intrnames + (MAXCOMLEN + 1) * index, MAXCOMLEN + 1, "%-*s",
451 intrcnt_updatename(struct intsrc *is)
454 intrcnt_setname(is->is_event->ie_fullname, is->is_index);
458 intrcnt_register(struct intsrc *is)
460 char straystr[MAXCOMLEN + 1];
462 KASSERT(is->is_event != NULL, ("%s: isrc with no event", __func__));
463 mtx_lock_spin(&intrcnt_lock);
464 is->is_index = intrcnt_index;
466 snprintf(straystr, MAXCOMLEN + 1, "stray irq%d",
467 is->is_pic->pic_vector(is));
468 intrcnt_updatename(is);
469 is->is_count = &intrcnt[is->is_index];
470 intrcnt_setname(straystr, is->is_index + 1);
471 is->is_straycount = &intrcnt[is->is_index + 1];
472 mtx_unlock_spin(&intrcnt_lock);
476 intrcnt_add(const char *name, u_long **countp)
479 mtx_lock_spin(&intrcnt_lock);
480 *countp = &intrcnt[intrcnt_index];
481 intrcnt_setname(name, intrcnt_index);
483 mtx_unlock_spin(&intrcnt_lock);
487 intr_init(void *dummy __unused)
490 intrcnt_setname("???", 0);
493 sx_init(&intr_table_lock, "intr sources");
494 mtx_init(&intrcnt_lock, "intrcnt", NULL, MTX_SPIN);
496 SYSINIT(intr_init, SI_SUB_INTR, SI_ORDER_FIRST, intr_init, NULL);
499 /* Initialize the two 8259A's to a known-good shutdown state. */
504 outb(IO_ICU1, ICW1_RESET | ICW1_IC4);
505 outb(IO_ICU1 + ICU_IMR_OFFSET, IDT_IO_INTS);
506 outb(IO_ICU1 + ICU_IMR_OFFSET, 1 << 2);
507 outb(IO_ICU1 + ICU_IMR_OFFSET, ICW4_8086);
508 outb(IO_ICU1 + ICU_IMR_OFFSET, 0xff);
509 outb(IO_ICU1, OCW3_SEL | OCW3_RR);
511 outb(IO_ICU2, ICW1_RESET | ICW1_IC4);
512 outb(IO_ICU2 + ICU_IMR_OFFSET, IDT_IO_INTS + 8);
513 outb(IO_ICU2 + ICU_IMR_OFFSET, 2);
514 outb(IO_ICU2 + ICU_IMR_OFFSET, ICW4_8086);
515 outb(IO_ICU2 + ICU_IMR_OFFSET, 0xff);
516 outb(IO_ICU2, OCW3_SEL | OCW3_RR);
522 * Dump data about interrupt handlers
524 DB_SHOW_COMMAND(irqs, db_show_irqs)
526 struct intsrc **isrc;
529 if (strcmp(modif, "v") == 0)
533 isrc = interrupt_sources;
534 for (i = 0; i < NUM_IO_INTS && !db_pager_quit; i++, isrc++)
536 db_dump_intr_event((*isrc)->is_event, verbose);
542 * Support for balancing interrupt sources across CPUs. For now we just
543 * allocate CPUs round-robin.
546 /* The BSP is always a valid target. */
547 static cpumask_t intr_cpus = (1 << 0);
548 static int current_cpu;
551 intr_assign_next_cpu(struct intsrc *isrc)
555 * Assign this source to a local APIC in a round-robin fashion.
557 isrc->is_pic->pic_assign_cpu(isrc, cpu_apic_ids[current_cpu]);
560 if (current_cpu > mp_maxid)
562 } while (!(intr_cpus & (1 << current_cpu)));
565 /* Attempt to bind the specified IRQ to the specified CPU. */
567 intr_bind(u_int vector, u_char cpu)
571 isrc = intr_lookup_source(vector);
574 return (intr_event_bind(isrc->is_event, cpu));
578 * Add a CPU to our mask of valid CPUs that can be destinations of
582 intr_add_cpu(u_int cpu)
586 panic("%s: Invalid CPU ID", __func__);
588 printf("INTR: Adding local APIC %d as a target\n",
591 intr_cpus |= (1 << cpu);
595 * Distribute all the interrupt sources among the available CPUs once the
596 * AP's have been launched.
599 intr_shuffle_irqs(void *arg __unused)
604 /* Don't bother on UP. */
608 /* Round-robin assign a CPU to each enabled source. */
609 sx_xlock(&intr_table_lock);
611 for (i = 0; i < NUM_IO_INTS; i++) {
612 isrc = interrupt_sources[i];
613 if (isrc != NULL && isrc->is_handlers > 0) {
615 * If this event is already bound to a CPU,
616 * then assign the source to that CPU instead
617 * of picking one via round-robin.
619 if (isrc->is_event->ie_cpu != NOCPU)
620 isrc->is_pic->pic_assign_cpu(isrc,
621 cpu_apic_ids[isrc->is_event->ie_cpu]);
623 intr_assign_next_cpu(isrc);
626 sx_xunlock(&intr_table_lock);
628 SYSINIT(intr_shuffle_irqs, SI_SUB_SMP, SI_ORDER_SECOND, intr_shuffle_irqs,