2 * Copyright (c) 2003 Peter Wemm.
3 * Copyright (c) 1992 Terrence R. Lambert.
4 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
7 * This code is derived from software contributed to Berkeley by
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the University of
21 * California, Berkeley and its contributors.
22 * 4. Neither the name of the University nor the names of its contributors
23 * may be used to endorse or promote products derived from this software
24 * without specific prior written permission.
26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
41 #include <sys/cdefs.h>
42 __FBSDID("$FreeBSD$");
44 #include "opt_atpic.h"
45 #include "opt_compat.h"
50 #include "opt_kstack_pages.h"
51 #include "opt_maxmem.h"
52 #include "opt_mp_watchdog.h"
53 #include "opt_perfmon.h"
54 #include "opt_platform.h"
55 #include "opt_sched.h"
57 #include <sys/param.h>
59 #include <sys/systm.h>
63 #include <sys/callout.h>
67 #include <sys/eventhandler.h>
69 #include <sys/imgact.h>
71 #include <sys/kernel.h>
73 #include <sys/linker.h>
75 #include <sys/malloc.h>
76 #include <sys/memrange.h>
77 #include <sys/msgbuf.h>
78 #include <sys/mutex.h>
80 #include <sys/ptrace.h>
81 #include <sys/reboot.h>
82 #include <sys/rwlock.h>
83 #include <sys/sched.h>
84 #include <sys/signalvar.h>
88 #include <sys/syscallsubr.h>
89 #include <sys/sysctl.h>
90 #include <sys/sysent.h>
91 #include <sys/sysproto.h>
92 #include <sys/ucontext.h>
93 #include <sys/vmmeter.h>
96 #include <vm/vm_extern.h>
97 #include <vm/vm_kern.h>
98 #include <vm/vm_page.h>
99 #include <vm/vm_map.h>
100 #include <vm/vm_object.h>
101 #include <vm/vm_pager.h>
102 #include <vm/vm_param.h>
103 #include <vm/vm_phys.h>
107 #error KDB must be enabled in order for DDB to work!
110 #include <ddb/db_sym.h>
113 #include <net/netisr.h>
115 #include <machine/clock.h>
116 #include <machine/cpu.h>
117 #include <machine/cputypes.h>
118 #include <machine/frame.h>
119 #include <machine/intr_machdep.h>
121 #include <machine/md_var.h>
122 #include <machine/metadata.h>
123 #include <machine/mp_watchdog.h>
124 #include <machine/pc/bios.h>
125 #include <machine/pcb.h>
126 #include <machine/proc.h>
127 #include <machine/reg.h>
128 #include <machine/sigframe.h>
129 #include <machine/specialreg.h>
131 #include <machine/perfmon.h>
133 #include <machine/tss.h>
134 #include <x86/ucode.h>
136 #include <machine/smp.h>
143 #include <x86/isa/icu.h>
145 #include <x86/apicvar.h>
148 #include <isa/isareg.h>
150 #include <x86/init.h>
152 /* Sanity check for __curthread() */
153 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
156 * The PTI trampoline stack needs enough space for a hardware trapframe and a
157 * couple of scratch registers, as well as the trapframe left behind after an
160 CTASSERT(PC_PTI_STACK_SZ * sizeof(register_t) >= 2 * sizeof(struct pti_frame) -
161 offsetof(struct pti_frame, pti_rip));
163 extern u_int64_t hammer_time(u_int64_t, u_int64_t);
165 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
166 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
168 static void cpu_startup(void *);
169 static void get_fpcontext(struct thread *td, mcontext_t *mcp,
170 char *xfpusave, size_t xfpusave_len);
171 static int set_fpcontext(struct thread *td, mcontext_t *mcp,
172 char *xfpustate, size_t xfpustate_len);
173 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
175 /* Preload data parse function */
176 static caddr_t native_parse_preload_data(u_int64_t);
178 /* Native function to fetch and parse the e820 map */
179 static void native_parse_memmap(caddr_t, vm_paddr_t *, int *);
181 /* Default init_ops implementation. */
182 struct init_ops init_ops = {
183 .parse_preload_data = native_parse_preload_data,
184 .early_clock_source_init = i8254_init,
185 .early_delay = i8254_delay,
186 .parse_memmap = native_parse_memmap,
188 .mp_bootaddress = mp_bootaddress,
189 .start_all_aps = native_start_all_aps,
191 .msi_init = msi_init,
194 struct msgbuf *msgbufp;
197 * Physical address of the EFI System Table. Stashed from the metadata hints
198 * passed into the kernel and used by the EFI code to call runtime services.
200 vm_paddr_t efi_systbl_phys;
202 /* Intel ICH registers */
203 #define ICH_PMBASE 0x400
204 #define ICH_SMI_EN ICH_PMBASE + 0x30
206 int _udatasel, _ucodesel, _ucode32sel, _ufssel, _ugssel;
214 * The number of PHYSMAP entries must be one less than the number of
215 * PHYSSEG entries because the PHYSMAP entry that spans the largest
216 * physical address that is accessible by ISA DMA is split into two
219 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
221 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
222 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
224 /* must be 2 less so 0 0 can signal end of chunks */
225 #define PHYS_AVAIL_ARRAY_END (nitems(phys_avail) - 2)
226 #define DUMP_AVAIL_ARRAY_END (nitems(dump_avail) - 2)
228 struct kva_md_info kmi;
230 static struct trapframe proc0_tf;
231 struct region_descriptor r_gdt, r_idt;
233 struct pcpu __pcpu[MAXCPU];
237 struct mem_range_softc mem_range_softc;
239 struct mtx dt_lock; /* lock for GDT and LDT */
241 void (*vmm_resume_p)(void);
251 * On MacBooks, we need to disallow the legacy USB circuit to
252 * generate an SMI# because this can cause several problems,
253 * namely: incorrect CPU frequency detection and failure to
255 * We do this by disabling a bit in the SMI_EN (SMI Control and
256 * Enable register) of the Intel ICH LPC Interface Bridge.
258 sysenv = kern_getenv("smbios.system.product");
259 if (sysenv != NULL) {
260 if (strncmp(sysenv, "MacBook1,1", 10) == 0 ||
261 strncmp(sysenv, "MacBook3,1", 10) == 0 ||
262 strncmp(sysenv, "MacBook4,1", 10) == 0 ||
263 strncmp(sysenv, "MacBookPro1,1", 13) == 0 ||
264 strncmp(sysenv, "MacBookPro1,2", 13) == 0 ||
265 strncmp(sysenv, "MacBookPro3,1", 13) == 0 ||
266 strncmp(sysenv, "MacBookPro4,1", 13) == 0 ||
267 strncmp(sysenv, "Macmini1,1", 10) == 0) {
269 printf("Disabling LEGACY_USB_EN bit on "
271 outl(ICH_SMI_EN, inl(ICH_SMI_EN) & ~0x8);
277 * Good {morning,afternoon,evening,night}.
286 * Display physical memory if SMBIOS reports reasonable amount.
289 sysenv = kern_getenv("smbios.memory.enabled");
290 if (sysenv != NULL) {
291 memsize = (uintmax_t)strtoul(sysenv, (char **)NULL, 10) << 10;
294 if (memsize < ptoa((uintmax_t)vm_cnt.v_free_count))
295 memsize = ptoa((uintmax_t)Maxmem);
296 printf("real memory = %ju (%ju MB)\n", memsize, memsize >> 20);
297 realmem = atop(memsize);
300 * Display any holes after the first chunk of extended memory.
305 printf("Physical memory chunk(s):\n");
306 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
309 size = phys_avail[indx + 1] - phys_avail[indx];
311 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n",
312 (uintmax_t)phys_avail[indx],
313 (uintmax_t)phys_avail[indx + 1] - 1,
314 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
318 vm_ksubmap_init(&kmi);
320 printf("avail memory = %ju (%ju MB)\n",
321 ptoa((uintmax_t)vm_cnt.v_free_count),
322 ptoa((uintmax_t)vm_cnt.v_free_count) / 1048576);
325 * Set up buffers, so they can be used to read disk labels.
328 vm_pager_bufferinit();
334 * Send an interrupt to process.
336 * Stack is set up to allow sigcode stored
337 * at top to call routine, followed by call
338 * to sigreturn routine below. After sigreturn
339 * resets the signal mask, the stack, and the
340 * frame pointer, it returns to the user
344 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
346 struct sigframe sf, *sfp;
352 struct trapframe *regs;
361 PROC_LOCK_ASSERT(p, MA_OWNED);
362 sig = ksi->ksi_signo;
364 mtx_assert(&psp->ps_mtx, MA_OWNED);
366 oonstack = sigonstack(regs->tf_rsp);
368 if (cpu_max_ext_state_size > sizeof(struct savefpu) && use_xsave) {
369 xfpusave_len = cpu_max_ext_state_size - sizeof(struct savefpu);
370 xfpusave = __builtin_alloca(xfpusave_len);
376 /* Save user context. */
377 bzero(&sf, sizeof(sf));
378 sf.sf_uc.uc_sigmask = *mask;
379 sf.sf_uc.uc_stack = td->td_sigstk;
380 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
381 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
382 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
383 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(*regs));
384 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */
385 get_fpcontext(td, &sf.sf_uc.uc_mcontext, xfpusave, xfpusave_len);
387 update_pcb_bases(pcb);
388 sf.sf_uc.uc_mcontext.mc_fsbase = pcb->pcb_fsbase;
389 sf.sf_uc.uc_mcontext.mc_gsbase = pcb->pcb_gsbase;
390 bzero(sf.sf_uc.uc_mcontext.mc_spare,
391 sizeof(sf.sf_uc.uc_mcontext.mc_spare));
392 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__));
394 /* Allocate space for the signal handler context. */
395 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
396 SIGISMEMBER(psp->ps_sigonstack, sig)) {
397 sp = (char *)td->td_sigstk.ss_sp + td->td_sigstk.ss_size;
398 #if defined(COMPAT_43)
399 td->td_sigstk.ss_flags |= SS_ONSTACK;
402 sp = (char *)regs->tf_rsp - 128;
403 if (xfpusave != NULL) {
405 sp = (char *)((unsigned long)sp & ~0x3Ful);
406 sf.sf_uc.uc_mcontext.mc_xfpustate = (register_t)sp;
408 sp -= sizeof(struct sigframe);
409 /* Align to 16 bytes. */
410 sfp = (struct sigframe *)((unsigned long)sp & ~0xFul);
412 /* Build the argument list for the signal handler. */
413 regs->tf_rdi = sig; /* arg 1 in %rdi */
414 regs->tf_rdx = (register_t)&sfp->sf_uc; /* arg 3 in %rdx */
415 bzero(&sf.sf_si, sizeof(sf.sf_si));
416 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
417 /* Signal handler installed with SA_SIGINFO. */
418 regs->tf_rsi = (register_t)&sfp->sf_si; /* arg 2 in %rsi */
419 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
421 /* Fill in POSIX parts */
422 sf.sf_si = ksi->ksi_info;
423 sf.sf_si.si_signo = sig; /* maybe a translated signal */
424 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */
426 /* Old FreeBSD-style arguments. */
427 regs->tf_rsi = ksi->ksi_code; /* arg 2 in %rsi */
428 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */
429 sf.sf_ahu.sf_handler = catcher;
431 mtx_unlock(&psp->ps_mtx);
435 * Copy the sigframe out to the user's stack.
437 if (copyout(&sf, sfp, sizeof(*sfp)) != 0 ||
438 (xfpusave != NULL && copyout(xfpusave,
439 (void *)sf.sf_uc.uc_mcontext.mc_xfpustate, xfpusave_len)
442 printf("process %ld has trashed its stack\n", (long)p->p_pid);
448 regs->tf_rsp = (long)sfp;
449 regs->tf_rip = p->p_sysent->sv_sigcode_base;
450 regs->tf_rflags &= ~(PSL_T | PSL_D);
451 regs->tf_cs = _ucodesel;
452 regs->tf_ds = _udatasel;
453 regs->tf_ss = _udatasel;
454 regs->tf_es = _udatasel;
455 regs->tf_fs = _ufssel;
456 regs->tf_gs = _ugssel;
457 regs->tf_flags = TF_HASSEGS;
459 mtx_lock(&psp->ps_mtx);
463 * System call to cleanup state after a signal
464 * has been taken. Reset signal mask and
465 * stack state from context left by sendsig (above).
466 * Return to previous pc and psl as specified by
467 * context left by sendsig. Check carefully to
468 * make sure that the user has not modified the
469 * state to gain improper privileges.
474 sys_sigreturn(td, uap)
476 struct sigreturn_args /* {
477 const struct __ucontext *sigcntxp;
483 struct trapframe *regs;
486 size_t xfpustate_len;
494 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
496 uprintf("pid %d (%s): sigreturn copyin failed\n",
497 p->p_pid, td->td_name);
501 if ((ucp->uc_mcontext.mc_flags & ~_MC_FLAG_MASK) != 0) {
502 uprintf("pid %d (%s): sigreturn mc_flags %x\n", p->p_pid,
503 td->td_name, ucp->uc_mcontext.mc_flags);
507 rflags = ucp->uc_mcontext.mc_rflags;
509 * Don't allow users to change privileged or reserved flags.
511 if (!EFL_SECURE(rflags, regs->tf_rflags)) {
512 uprintf("pid %d (%s): sigreturn rflags = 0x%lx\n", p->p_pid,
513 td->td_name, rflags);
518 * Don't allow users to load a valid privileged %cs. Let the
519 * hardware check for invalid selectors, excess privilege in
520 * other selectors, invalid %eip's and invalid %esp's.
522 cs = ucp->uc_mcontext.mc_cs;
523 if (!CS_SECURE(cs)) {
524 uprintf("pid %d (%s): sigreturn cs = 0x%x\n", p->p_pid,
526 ksiginfo_init_trap(&ksi);
527 ksi.ksi_signo = SIGBUS;
528 ksi.ksi_code = BUS_OBJERR;
529 ksi.ksi_trapno = T_PROTFLT;
530 ksi.ksi_addr = (void *)regs->tf_rip;
531 trapsignal(td, &ksi);
535 if ((uc.uc_mcontext.mc_flags & _MC_HASFPXSTATE) != 0) {
536 xfpustate_len = uc.uc_mcontext.mc_xfpustate_len;
537 if (xfpustate_len > cpu_max_ext_state_size -
538 sizeof(struct savefpu)) {
539 uprintf("pid %d (%s): sigreturn xfpusave_len = 0x%zx\n",
540 p->p_pid, td->td_name, xfpustate_len);
543 xfpustate = __builtin_alloca(xfpustate_len);
544 error = copyin((const void *)uc.uc_mcontext.mc_xfpustate,
545 xfpustate, xfpustate_len);
548 "pid %d (%s): sigreturn copying xfpustate failed\n",
549 p->p_pid, td->td_name);
556 ret = set_fpcontext(td, &ucp->uc_mcontext, xfpustate, xfpustate_len);
558 uprintf("pid %d (%s): sigreturn set_fpcontext err %d\n",
559 p->p_pid, td->td_name, ret);
562 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(*regs));
563 update_pcb_bases(pcb);
564 pcb->pcb_fsbase = ucp->uc_mcontext.mc_fsbase;
565 pcb->pcb_gsbase = ucp->uc_mcontext.mc_gsbase;
567 #if defined(COMPAT_43)
568 if (ucp->uc_mcontext.mc_onstack & 1)
569 td->td_sigstk.ss_flags |= SS_ONSTACK;
571 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
574 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
575 return (EJUSTRETURN);
578 #ifdef COMPAT_FREEBSD4
580 freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap)
583 return sys_sigreturn(td, (struct sigreturn_args *)uap);
588 * Reset registers to default values on exec.
591 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
593 struct trapframe *regs;
595 register_t saved_rflags;
601 if (td->td_proc->p_md.md_ldt != NULL)
604 mtx_unlock(&dt_lock);
606 update_pcb_bases(pcb);
609 clear_pcb_flags(pcb, PCB_32BIT);
610 pcb->pcb_initial_fpucw = __INITIAL_FPUCW__;
612 saved_rflags = regs->tf_rflags & PSL_T;
613 bzero((char *)regs, sizeof(struct trapframe));
614 regs->tf_rip = imgp->entry_addr;
615 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8;
616 regs->tf_rdi = stack; /* argv */
617 regs->tf_rflags = PSL_USER | saved_rflags;
618 regs->tf_ss = _udatasel;
619 regs->tf_cs = _ucodesel;
620 regs->tf_ds = _udatasel;
621 regs->tf_es = _udatasel;
622 regs->tf_fs = _ufssel;
623 regs->tf_gs = _ugssel;
624 regs->tf_flags = TF_HASSEGS;
625 td->td_retval[1] = 0;
628 * Reset the hardware debug registers if they were in use.
629 * They won't have any meaning for the newly exec'd process.
631 if (pcb->pcb_flags & PCB_DBREGS) {
640 * Clear the debug registers on the running
641 * CPU, otherwise they will end up affecting
642 * the next process we switch to.
646 clear_pcb_flags(pcb, PCB_DBREGS);
650 * Drop the FP state if we hold it, so that the process gets a
651 * clean FP state if it uses the FPU again.
663 * CR0_MP, CR0_NE and CR0_TS are also set by npx_probe() for the
664 * BSP. See the comments there about why we set them.
666 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM;
671 * Initialize amd64 and configure to run kernel
675 * Initialize segments & interrupt table
678 struct user_segment_descriptor gdt[NGDT * MAXCPU];/* global descriptor tables */
679 static struct gate_descriptor idt0[NIDT];
680 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
682 static char dblfault_stack[PAGE_SIZE] __aligned(16);
683 static char mce0_stack[PAGE_SIZE] __aligned(16);
684 static char nmi0_stack[PAGE_SIZE] __aligned(16);
685 static char dbg0_stack[PAGE_SIZE] __aligned(16);
686 CTASSERT(sizeof(struct nmi_pcpu) == 16);
688 struct amd64tss common_tss[MAXCPU];
691 * Software prototypes -- in more palatable form.
693 * Keep GUFS32, GUGS32, GUCODE32 and GUDATA at the same
694 * slots as corresponding segments for i386 kernel.
696 struct soft_segment_descriptor gdt_segs[] = {
697 /* GNULL_SEL 0 Null Descriptor */
706 /* GNULL2_SEL 1 Null Descriptor */
715 /* GUFS32_SEL 2 32 bit %gs Descriptor for user */
717 .ssd_limit = 0xfffff,
718 .ssd_type = SDT_MEMRWA,
724 /* GUGS32_SEL 3 32 bit %fs Descriptor for user */
726 .ssd_limit = 0xfffff,
727 .ssd_type = SDT_MEMRWA,
733 /* GCODE_SEL 4 Code Descriptor for kernel */
735 .ssd_limit = 0xfffff,
736 .ssd_type = SDT_MEMERA,
742 /* GDATA_SEL 5 Data Descriptor for kernel */
744 .ssd_limit = 0xfffff,
745 .ssd_type = SDT_MEMRWA,
751 /* GUCODE32_SEL 6 32 bit Code Descriptor for user */
753 .ssd_limit = 0xfffff,
754 .ssd_type = SDT_MEMERA,
760 /* GUDATA_SEL 7 32/64 bit Data Descriptor for user */
762 .ssd_limit = 0xfffff,
763 .ssd_type = SDT_MEMRWA,
769 /* GUCODE_SEL 8 64 bit Code Descriptor for user */
771 .ssd_limit = 0xfffff,
772 .ssd_type = SDT_MEMERA,
778 /* GPROC0_SEL 9 Proc 0 Tss Descriptor */
780 .ssd_limit = sizeof(struct amd64tss) + IOPERM_BITMAP_SIZE - 1,
781 .ssd_type = SDT_SYSTSS,
787 /* Actually, the TSS is a system descriptor which is double size */
796 /* GUSERLDT_SEL 11 LDT Descriptor */
805 /* GUSERLDT_SEL 12 LDT Descriptor, double size */
817 setidt(int idx, inthand_t *func, int typ, int dpl, int ist)
819 struct gate_descriptor *ip;
822 ip->gd_looffset = (uintptr_t)func;
823 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL);
829 ip->gd_hioffset = ((uintptr_t)func)>>16 ;
833 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
834 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
835 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
836 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
837 IDTVEC(xmm), IDTVEC(dblfault),
838 IDTVEC(div_pti), IDTVEC(bpt_pti),
839 IDTVEC(ofl_pti), IDTVEC(bnd_pti), IDTVEC(ill_pti), IDTVEC(dna_pti),
840 IDTVEC(fpusegm_pti), IDTVEC(tss_pti), IDTVEC(missing_pti),
841 IDTVEC(stk_pti), IDTVEC(prot_pti), IDTVEC(page_pti),
842 IDTVEC(rsvd_pti), IDTVEC(fpu_pti), IDTVEC(align_pti),
845 IDTVEC(dtrace_ret), IDTVEC(dtrace_ret_pti),
848 IDTVEC(xen_intr_upcall), IDTVEC(xen_intr_upcall_pti),
850 IDTVEC(fast_syscall), IDTVEC(fast_syscall32),
851 IDTVEC(fast_syscall_pti);
855 * Display the index and function name of any IDT entries that don't use
856 * the default 'rsvd' entry point.
858 DB_SHOW_COMMAND(idt, db_show_idt)
860 struct gate_descriptor *ip;
865 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) {
866 func = ((long)ip->gd_hioffset << 16 | ip->gd_looffset);
867 if (func != (uintptr_t)&IDTVEC(rsvd)) {
868 db_printf("%3d\t", idx);
869 db_printsym(func, DB_STGY_PROC);
876 /* Show privileged registers. */
877 DB_SHOW_COMMAND(sysregs, db_show_sysregs)
882 } __packed idtr, gdtr;
885 __asm __volatile("sidt %0" : "=m" (idtr));
886 db_printf("idtr\t0x%016lx/%04x\n",
887 (u_long)idtr.base, (u_int)idtr.limit);
888 __asm __volatile("sgdt %0" : "=m" (gdtr));
889 db_printf("gdtr\t0x%016lx/%04x\n",
890 (u_long)gdtr.base, (u_int)gdtr.limit);
891 __asm __volatile("sldt %0" : "=r" (ldt));
892 db_printf("ldtr\t0x%04x\n", ldt);
893 __asm __volatile("str %0" : "=r" (tr));
894 db_printf("tr\t0x%04x\n", tr);
895 db_printf("cr0\t0x%016lx\n", rcr0());
896 db_printf("cr2\t0x%016lx\n", rcr2());
897 db_printf("cr3\t0x%016lx\n", rcr3());
898 db_printf("cr4\t0x%016lx\n", rcr4());
899 if (rcr4() & CR4_XSAVE)
900 db_printf("xcr0\t0x%016lx\n", rxcr(0));
901 db_printf("EFER\t0x%016lx\n", rdmsr(MSR_EFER));
902 if (cpu_feature2 & (CPUID2_VMX | CPUID2_SMX))
903 db_printf("FEATURES_CTL\t%016lx\n",
904 rdmsr(MSR_IA32_FEATURE_CONTROL));
905 db_printf("DEBUG_CTL\t0x%016lx\n", rdmsr(MSR_DEBUGCTLMSR));
906 db_printf("PAT\t0x%016lx\n", rdmsr(MSR_PAT));
907 db_printf("GSBASE\t0x%016lx\n", rdmsr(MSR_GSBASE));
910 DB_SHOW_COMMAND(dbregs, db_show_dbregs)
913 db_printf("dr0\t0x%016lx\n", rdr0());
914 db_printf("dr1\t0x%016lx\n", rdr1());
915 db_printf("dr2\t0x%016lx\n", rdr2());
916 db_printf("dr3\t0x%016lx\n", rdr3());
917 db_printf("dr6\t0x%016lx\n", rdr6());
918 db_printf("dr7\t0x%016lx\n", rdr7());
924 struct user_segment_descriptor *sd;
925 struct soft_segment_descriptor *ssd;
928 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
929 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
930 ssd->ssd_type = sd->sd_type;
931 ssd->ssd_dpl = sd->sd_dpl;
932 ssd->ssd_p = sd->sd_p;
933 ssd->ssd_long = sd->sd_long;
934 ssd->ssd_def32 = sd->sd_def32;
935 ssd->ssd_gran = sd->sd_gran;
940 struct soft_segment_descriptor *ssd;
941 struct user_segment_descriptor *sd;
944 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
945 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff;
946 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
947 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
948 sd->sd_type = ssd->ssd_type;
949 sd->sd_dpl = ssd->ssd_dpl;
950 sd->sd_p = ssd->ssd_p;
951 sd->sd_long = ssd->ssd_long;
952 sd->sd_def32 = ssd->ssd_def32;
953 sd->sd_gran = ssd->ssd_gran;
958 struct soft_segment_descriptor *ssd;
959 struct system_segment_descriptor *sd;
962 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
963 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful;
964 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
965 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
966 sd->sd_type = ssd->ssd_type;
967 sd->sd_dpl = ssd->ssd_dpl;
968 sd->sd_p = ssd->ssd_p;
969 sd->sd_gran = ssd->ssd_gran;
972 #if !defined(DEV_ATPIC) && defined(DEV_ISA)
973 #include <isa/isavar.h>
974 #include <isa/isareg.h>
976 * Return a bitmap of the current interrupt requests. This is 8259-specific
977 * and is only suitable for use at probe time.
978 * This is only here to pacify sio. It is NOT FATAL if this doesn't work.
979 * It shouldn't be here. There should probably be an APIC centric
980 * implementation in the apic driver code, if at all.
983 isa_irq_pending(void)
990 return ((irr2 << 8) | irr1);
997 add_physmap_entry(uint64_t base, uint64_t length, vm_paddr_t *physmap,
1000 int i, insert_idx, physmap_idx;
1002 physmap_idx = *physmap_idxp;
1008 * Find insertion point while checking for overlap. Start off by
1009 * assuming the new entry will be added to the end.
1011 * NB: physmap_idx points to the next free slot.
1013 insert_idx = physmap_idx;
1014 for (i = 0; i <= physmap_idx; i += 2) {
1015 if (base < physmap[i + 1]) {
1016 if (base + length <= physmap[i]) {
1020 if (boothowto & RB_VERBOSE)
1022 "Overlapping memory regions, ignoring second region\n");
1027 /* See if we can prepend to the next entry. */
1028 if (insert_idx <= physmap_idx && base + length == physmap[insert_idx]) {
1029 physmap[insert_idx] = base;
1033 /* See if we can append to the previous entry. */
1034 if (insert_idx > 0 && base == physmap[insert_idx - 1]) {
1035 physmap[insert_idx - 1] += length;
1040 *physmap_idxp = physmap_idx;
1041 if (physmap_idx == PHYSMAP_SIZE) {
1043 "Too many segments in the physical address map, giving up\n");
1048 * Move the last 'N' entries down to make room for the new
1051 for (i = (physmap_idx - 2); i > insert_idx; i -= 2) {
1052 physmap[i] = physmap[i - 2];
1053 physmap[i + 1] = physmap[i - 1];
1056 /* Insert the new entry. */
1057 physmap[insert_idx] = base;
1058 physmap[insert_idx + 1] = base + length;
1063 bios_add_smap_entries(struct bios_smap *smapbase, u_int32_t smapsize,
1064 vm_paddr_t *physmap, int *physmap_idx)
1066 struct bios_smap *smap, *smapend;
1068 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
1070 for (smap = smapbase; smap < smapend; smap++) {
1071 if (boothowto & RB_VERBOSE)
1072 printf("SMAP type=%02x base=%016lx len=%016lx\n",
1073 smap->type, smap->base, smap->length);
1075 if (smap->type != SMAP_TYPE_MEMORY)
1078 if (!add_physmap_entry(smap->base, smap->length, physmap,
1085 add_efi_map_entries(struct efi_map_header *efihdr, vm_paddr_t *physmap,
1088 struct efi_md *map, *p;
1093 static const char *types[] = {
1099 "RuntimeServicesCode",
1100 "RuntimeServicesData",
1101 "ConventionalMemory",
1103 "ACPIReclaimMemory",
1106 "MemoryMappedIOPortSpace",
1112 * Memory map data provided by UEFI via the GetMemoryMap
1113 * Boot Services API.
1115 efisz = (sizeof(struct efi_map_header) + 0xf) & ~0xf;
1116 map = (struct efi_md *)((uint8_t *)efihdr + efisz);
1118 if (efihdr->descriptor_size == 0)
1120 ndesc = efihdr->memory_size / efihdr->descriptor_size;
1122 if (boothowto & RB_VERBOSE)
1123 printf("%23s %12s %12s %8s %4s\n",
1124 "Type", "Physical", "Virtual", "#Pages", "Attr");
1126 for (i = 0, p = map; i < ndesc; i++,
1127 p = efi_next_descriptor(p, efihdr->descriptor_size)) {
1128 if (boothowto & RB_VERBOSE) {
1129 if (p->md_type < nitems(types))
1130 type = types[p->md_type];
1133 printf("%23s %012lx %12p %08lx ", type, p->md_phys,
1134 p->md_virt, p->md_pages);
1135 if (p->md_attr & EFI_MD_ATTR_UC)
1137 if (p->md_attr & EFI_MD_ATTR_WC)
1139 if (p->md_attr & EFI_MD_ATTR_WT)
1141 if (p->md_attr & EFI_MD_ATTR_WB)
1143 if (p->md_attr & EFI_MD_ATTR_UCE)
1145 if (p->md_attr & EFI_MD_ATTR_WP)
1147 if (p->md_attr & EFI_MD_ATTR_RP)
1149 if (p->md_attr & EFI_MD_ATTR_XP)
1151 if (p->md_attr & EFI_MD_ATTR_NV)
1153 if (p->md_attr & EFI_MD_ATTR_MORE_RELIABLE)
1154 printf("MORE_RELIABLE ");
1155 if (p->md_attr & EFI_MD_ATTR_RO)
1157 if (p->md_attr & EFI_MD_ATTR_RT)
1162 switch (p->md_type) {
1163 case EFI_MD_TYPE_CODE:
1164 case EFI_MD_TYPE_DATA:
1165 case EFI_MD_TYPE_BS_CODE:
1166 case EFI_MD_TYPE_BS_DATA:
1167 case EFI_MD_TYPE_FREE:
1169 * We're allowed to use any entry with these types.
1176 if (!add_physmap_entry(p->md_phys, (p->md_pages * PAGE_SIZE),
1177 physmap, physmap_idx))
1182 static char bootmethod[16] = "";
1183 SYSCTL_STRING(_machdep, OID_AUTO, bootmethod, CTLFLAG_RD, bootmethod, 0,
1184 "System firmware boot method");
1187 native_parse_memmap(caddr_t kmdp, vm_paddr_t *physmap, int *physmap_idx)
1189 struct bios_smap *smap;
1190 struct efi_map_header *efihdr;
1194 * Memory map from INT 15:E820.
1196 * subr_module.c says:
1197 * "Consumer may safely assume that size value precedes data."
1198 * ie: an int32_t immediately precedes smap.
1201 efihdr = (struct efi_map_header *)preload_search_info(kmdp,
1202 MODINFO_METADATA | MODINFOMD_EFI_MAP);
1203 smap = (struct bios_smap *)preload_search_info(kmdp,
1204 MODINFO_METADATA | MODINFOMD_SMAP);
1205 if (efihdr == NULL && smap == NULL)
1206 panic("No BIOS smap or EFI map info from loader!");
1208 if (efihdr != NULL) {
1209 add_efi_map_entries(efihdr, physmap, physmap_idx);
1210 strlcpy(bootmethod, "UEFI", sizeof(bootmethod));
1212 size = *((u_int32_t *)smap - 1);
1213 bios_add_smap_entries(smap, size, physmap, physmap_idx);
1214 strlcpy(bootmethod, "BIOS", sizeof(bootmethod));
1218 #define PAGES_PER_GB (1024 * 1024 * 1024 / PAGE_SIZE)
1221 * Populate the (physmap) array with base/bound pairs describing the
1222 * available physical memory in the system, then test this memory and
1223 * build the phys_avail array describing the actually-available memory.
1225 * Total memory size may be set by the kernel environment variable
1226 * hw.physmem or the compile-time define MAXMEM.
1228 * XXX first should be vm_paddr_t.
1231 getmemsize(caddr_t kmdp, u_int64_t first)
1233 int i, physmap_idx, pa_indx, da_indx;
1234 vm_paddr_t pa, physmap[PHYSMAP_SIZE];
1235 u_long physmem_start, physmem_tunable, memtest;
1237 quad_t dcons_addr, dcons_size;
1241 * Tell the physical memory allocator about pages used to store
1242 * the kernel and preloaded data. See kmem_bootstrap_free().
1244 vm_phys_add_seg((vm_paddr_t)kernphys, trunc_page(first));
1246 bzero(physmap, sizeof(physmap));
1249 init_ops.parse_memmap(kmdp, physmap, &physmap_idx);
1253 * Find the 'base memory' segment for SMP
1256 for (i = 0; i <= physmap_idx; i += 2) {
1257 if (physmap[i] <= 0xA0000) {
1258 basemem = physmap[i + 1] / 1024;
1262 if (basemem == 0 || basemem > 640) {
1265 "Memory map doesn't contain a basemem segment, faking it");
1270 * Make hole for "AP -> long mode" bootstrap code. The
1271 * mp_bootaddress vector is only available when the kernel
1272 * is configured to support APs and APs for the system start
1273 * in 32bit mode (e.g. SMP bare metal).
1275 if (init_ops.mp_bootaddress) {
1276 if (physmap[1] >= 0x100000000)
1278 "Basemem segment is not suitable for AP bootstrap code!");
1279 physmap[1] = init_ops.mp_bootaddress(physmap[1] / 1024);
1283 * Maxmem isn't the "maximum memory", it's one larger than the
1284 * highest page of the physical address space. It should be
1285 * called something like "Maxphyspage". We may adjust this
1286 * based on ``hw.physmem'' and the results of the memory test.
1288 Maxmem = atop(physmap[physmap_idx + 1]);
1291 Maxmem = MAXMEM / 4;
1294 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
1295 Maxmem = atop(physmem_tunable);
1298 * The boot memory test is disabled by default, as it takes a
1299 * significant amount of time on large-memory systems, and is
1300 * unfriendly to virtual machines as it unnecessarily touches all
1303 * A general name is used as the code may be extended to support
1304 * additional tests beyond the current "page present" test.
1307 TUNABLE_ULONG_FETCH("hw.memtest.tests", &memtest);
1310 * Don't allow MAXMEM or hw.physmem to extend the amount of memory
1313 if (Maxmem > atop(physmap[physmap_idx + 1]))
1314 Maxmem = atop(physmap[physmap_idx + 1]);
1316 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1317 (boothowto & RB_VERBOSE))
1318 printf("Physical memory use set to %ldK\n", Maxmem * 4);
1320 /* call pmap initialization to make new kernel address space */
1321 pmap_bootstrap(&first);
1324 * Size up each available chunk of physical memory.
1326 * XXX Some BIOSes corrupt low 64KB between suspend and resume.
1327 * By default, mask off the first 16 pages unless we appear to be
1330 physmem_start = (vm_guest > VM_GUEST_NO ? 1 : 16) << PAGE_SHIFT;
1331 TUNABLE_ULONG_FETCH("hw.physmem.start", &physmem_start);
1332 if (physmap[0] < physmem_start) {
1333 if (physmem_start < PAGE_SIZE)
1334 physmap[0] = PAGE_SIZE;
1335 else if (physmem_start >= physmap[1])
1336 physmap[0] = round_page(physmap[1] - PAGE_SIZE);
1338 physmap[0] = round_page(physmem_start);
1342 phys_avail[pa_indx++] = physmap[0];
1343 phys_avail[pa_indx] = physmap[0];
1344 dump_avail[da_indx] = physmap[0];
1348 * Get dcons buffer address
1350 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
1351 getenv_quad("dcons.size", &dcons_size) == 0)
1355 * physmap is in bytes, so when converting to page boundaries,
1356 * round up the start address and round down the end address.
1360 printf("Testing system memory");
1361 for (i = 0; i <= physmap_idx; i += 2) {
1364 end = ptoa((vm_paddr_t)Maxmem);
1365 if (physmap[i + 1] < end)
1366 end = trunc_page(physmap[i + 1]);
1367 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1368 int tmp, page_bad, full;
1369 int *ptr = (int *)CADDR1;
1373 * block out kernel memory as not available.
1375 if (pa >= (vm_paddr_t)kernphys && pa < first)
1379 * block out dcons buffer
1382 && pa >= trunc_page(dcons_addr)
1383 && pa < dcons_addr + dcons_size)
1391 * Print a "." every GB to show we're making
1395 if ((page_counter % PAGES_PER_GB) == 0)
1399 * map page into kernel: valid, read/write,non-cacheable
1401 *pte = pa | PG_V | PG_RW | PG_NC_PWT | PG_NC_PCD;
1406 * Test for alternating 1's and 0's
1408 *(volatile int *)ptr = 0xaaaaaaaa;
1409 if (*(volatile int *)ptr != 0xaaaaaaaa)
1412 * Test for alternating 0's and 1's
1414 *(volatile int *)ptr = 0x55555555;
1415 if (*(volatile int *)ptr != 0x55555555)
1420 *(volatile int *)ptr = 0xffffffff;
1421 if (*(volatile int *)ptr != 0xffffffff)
1426 *(volatile int *)ptr = 0x0;
1427 if (*(volatile int *)ptr != 0x0)
1430 * Restore original value.
1436 * Adjust array of valid/good pages.
1438 if (page_bad == TRUE)
1441 * If this good page is a continuation of the
1442 * previous set of good pages, then just increase
1443 * the end pointer. Otherwise start a new chunk.
1444 * Note that "end" points one higher than end,
1445 * making the range >= start and < end.
1446 * If we're also doing a speculative memory
1447 * test and we at or past the end, bump up Maxmem
1448 * so that we keep going. The first bad page
1449 * will terminate the loop.
1451 if (phys_avail[pa_indx] == pa) {
1452 phys_avail[pa_indx] += PAGE_SIZE;
1455 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1457 "Too many holes in the physical address space, giving up\n");
1462 phys_avail[pa_indx++] = pa; /* start */
1463 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1467 if (dump_avail[da_indx] == pa) {
1468 dump_avail[da_indx] += PAGE_SIZE;
1471 if (da_indx == DUMP_AVAIL_ARRAY_END) {
1475 dump_avail[da_indx++] = pa; /* start */
1476 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
1490 * The last chunk must contain at least one page plus the message
1491 * buffer to avoid complicating other code (message buffer address
1492 * calculation, etc.).
1494 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1495 round_page(msgbufsize) >= phys_avail[pa_indx]) {
1496 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1497 phys_avail[pa_indx--] = 0;
1498 phys_avail[pa_indx--] = 0;
1501 Maxmem = atop(phys_avail[pa_indx]);
1503 /* Trim off space for the message buffer. */
1504 phys_avail[pa_indx] -= round_page(msgbufsize);
1506 /* Map the message buffer. */
1507 msgbufp = (struct msgbuf *)PHYS_TO_DMAP(phys_avail[pa_indx]);
1511 native_parse_preload_data(u_int64_t modulep)
1516 vm_offset_t ksym_start;
1517 vm_offset_t ksym_end;
1520 preload_metadata = (caddr_t)(uintptr_t)(modulep + KERNBASE);
1521 preload_bootstrap_relocate(KERNBASE);
1522 kmdp = preload_search_by_type("elf kernel");
1524 kmdp = preload_search_by_type("elf64 kernel");
1525 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
1526 envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *);
1529 init_static_kenv(envp, 0);
1531 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
1532 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
1533 db_fetch_ksymtab(ksym_start, ksym_end);
1535 efi_systbl_phys = MD_FETCH(kmdp, MODINFOMD_FW_HANDLE, vm_paddr_t);
1541 amd64_kdb_init(void)
1545 if (boothowto & RB_KDB)
1546 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
1550 /* Set up the fast syscall stuff */
1552 amd64_conf_fast_syscall(void)
1556 msr = rdmsr(MSR_EFER) | EFER_SCE;
1557 wrmsr(MSR_EFER, msr);
1558 wrmsr(MSR_LSTAR, pti ? (u_int64_t)IDTVEC(fast_syscall_pti) :
1559 (u_int64_t)IDTVEC(fast_syscall));
1560 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32));
1561 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) |
1562 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48);
1563 wrmsr(MSR_STAR, msr);
1564 wrmsr(MSR_SF_MASK, PSL_NT | PSL_T | PSL_I | PSL_C | PSL_D);
1568 hammer_time(u_int64_t modulep, u_int64_t physfree)
1573 struct nmi_pcpu *np;
1574 struct xstate_hdr *xhdr;
1580 kmdp = init_ops.parse_preload_data(modulep);
1582 physfree += ucode_load_bsp(physfree + KERNBASE);
1583 physfree = roundup2(physfree, PAGE_SIZE);
1586 identify_hypervisor();
1588 * hw.cpu_stdext_disable is ignored by the call, it will be
1589 * re-evaluted by the below call to finishidentcpu().
1593 link_elf_ireloc(kmdp);
1596 * This may be done better later if it gets more high level
1597 * components in it. If so just link td->td_proc here.
1599 proc_linkup0(&proc0, &thread0);
1601 /* Init basic tunables, hz etc */
1604 thread0.td_kstack = physfree + KERNBASE;
1605 thread0.td_kstack_pages = kstack_pages;
1606 kstack0_sz = thread0.td_kstack_pages * PAGE_SIZE;
1607 bzero((void *)thread0.td_kstack, kstack0_sz);
1608 physfree += kstack0_sz;
1611 * make gdt memory segments
1613 for (x = 0; x < NGDT; x++) {
1614 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1) &&
1615 x != GUSERLDT_SEL && x != (GUSERLDT_SEL) + 1)
1616 ssdtosd(&gdt_segs[x], &gdt[x]);
1618 gdt_segs[GPROC0_SEL].ssd_base = (uintptr_t)&common_tss[0];
1619 ssdtosyssd(&gdt_segs[GPROC0_SEL],
1620 (struct system_segment_descriptor *)&gdt[GPROC0_SEL]);
1622 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1623 r_gdt.rd_base = (long) gdt;
1627 wrmsr(MSR_FSBASE, 0); /* User value */
1628 wrmsr(MSR_GSBASE, (u_int64_t)pc);
1629 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */
1631 pcpu_init(pc, 0, sizeof(struct pcpu));
1632 dpcpu_init((void *)(physfree + KERNBASE), 0);
1633 physfree += DPCPU_SIZE;
1634 PCPU_SET(prvspace, pc);
1635 PCPU_SET(curthread, &thread0);
1636 /* Non-late cninit() and printf() can be moved up to here. */
1637 PCPU_SET(tssp, &common_tss[0]);
1638 PCPU_SET(commontssp, &common_tss[0]);
1639 PCPU_SET(tss, (struct system_segment_descriptor *)&gdt[GPROC0_SEL]);
1640 PCPU_SET(ldt, (struct system_segment_descriptor *)&gdt[GUSERLDT_SEL]);
1641 PCPU_SET(fs32p, &gdt[GUFS32_SEL]);
1642 PCPU_SET(gs32p, &gdt[GUGS32_SEL]);
1645 * Initialize mutexes.
1647 * icu_lock: in order to allow an interrupt to occur in a critical
1648 * section, to set pcpu->ipending (etc...) properly, we
1649 * must be able to get the icu lock, so it can't be
1653 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS);
1654 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_DEF);
1657 pti = pti_get_default();
1658 TUNABLE_INT_FETCH("vm.pmap.pti", &pti);
1660 for (x = 0; x < NIDT; x++)
1661 setidt(x, pti ? &IDTVEC(rsvd_pti) : &IDTVEC(rsvd), SDT_SYSIGT,
1663 setidt(IDT_DE, pti ? &IDTVEC(div_pti) : &IDTVEC(div), SDT_SYSIGT,
1665 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYSIGT, SEL_KPL, 4);
1666 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 2);
1667 setidt(IDT_BP, pti ? &IDTVEC(bpt_pti) : &IDTVEC(bpt), SDT_SYSIGT,
1669 setidt(IDT_OF, pti ? &IDTVEC(ofl_pti) : &IDTVEC(ofl), SDT_SYSIGT,
1671 setidt(IDT_BR, pti ? &IDTVEC(bnd_pti) : &IDTVEC(bnd), SDT_SYSIGT,
1673 setidt(IDT_UD, pti ? &IDTVEC(ill_pti) : &IDTVEC(ill), SDT_SYSIGT,
1675 setidt(IDT_NM, pti ? &IDTVEC(dna_pti) : &IDTVEC(dna), SDT_SYSIGT,
1677 setidt(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1);
1678 setidt(IDT_FPUGP, pti ? &IDTVEC(fpusegm_pti) : &IDTVEC(fpusegm),
1679 SDT_SYSIGT, SEL_KPL, 0);
1680 setidt(IDT_TS, pti ? &IDTVEC(tss_pti) : &IDTVEC(tss), SDT_SYSIGT,
1682 setidt(IDT_NP, pti ? &IDTVEC(missing_pti) : &IDTVEC(missing),
1683 SDT_SYSIGT, SEL_KPL, 0);
1684 setidt(IDT_SS, pti ? &IDTVEC(stk_pti) : &IDTVEC(stk), SDT_SYSIGT,
1686 setidt(IDT_GP, pti ? &IDTVEC(prot_pti) : &IDTVEC(prot), SDT_SYSIGT,
1688 setidt(IDT_PF, pti ? &IDTVEC(page_pti) : &IDTVEC(page), SDT_SYSIGT,
1690 setidt(IDT_MF, pti ? &IDTVEC(fpu_pti) : &IDTVEC(fpu), SDT_SYSIGT,
1692 setidt(IDT_AC, pti ? &IDTVEC(align_pti) : &IDTVEC(align), SDT_SYSIGT,
1694 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 3);
1695 setidt(IDT_XF, pti ? &IDTVEC(xmm_pti) : &IDTVEC(xmm), SDT_SYSIGT,
1697 #ifdef KDTRACE_HOOKS
1698 setidt(IDT_DTRACE_RET, pti ? &IDTVEC(dtrace_ret_pti) :
1699 &IDTVEC(dtrace_ret), SDT_SYSIGT, SEL_UPL, 0);
1702 setidt(IDT_EVTCHN, pti ? &IDTVEC(xen_intr_upcall_pti) :
1703 &IDTVEC(xen_intr_upcall), SDT_SYSIGT, SEL_KPL, 0);
1705 r_idt.rd_limit = sizeof(idt0) - 1;
1706 r_idt.rd_base = (long) idt;
1710 * Initialize the clock before the console so that console
1711 * initialization can use DELAY().
1716 * Use vt(4) by default for UEFI boot (during the sc(4)/vt(4)
1718 * Once bootblocks have updated, we can test directly for
1719 * efi_systbl != NULL here...
1721 if (preload_search_info(kmdp, MODINFO_METADATA | MODINFOMD_EFI_MAP)
1723 vty_set_preferred(VTY_VT);
1725 finishidentcpu(); /* Final stage of CPU initialization */
1726 initializecpu(); /* Initialize CPU registers */
1727 initializecpucache();
1729 /* doublefault stack space, runs on ist1 */
1730 common_tss[0].tss_ist1 = (long)&dblfault_stack[sizeof(dblfault_stack)];
1733 * NMI stack, runs on ist2. The pcpu pointer is stored just
1734 * above the start of the ist2 stack.
1736 np = ((struct nmi_pcpu *) &nmi0_stack[sizeof(nmi0_stack)]) - 1;
1737 np->np_pcpu = (register_t) pc;
1738 common_tss[0].tss_ist2 = (long) np;
1741 * MC# stack, runs on ist3. The pcpu pointer is stored just
1742 * above the start of the ist3 stack.
1744 np = ((struct nmi_pcpu *) &mce0_stack[sizeof(mce0_stack)]) - 1;
1745 np->np_pcpu = (register_t) pc;
1746 common_tss[0].tss_ist3 = (long) np;
1749 * DB# stack, runs on ist4.
1751 np = ((struct nmi_pcpu *) &dbg0_stack[sizeof(dbg0_stack)]) - 1;
1752 np->np_pcpu = (register_t) pc;
1753 common_tss[0].tss_ist4 = (long) np;
1755 /* Set the IO permission bitmap (empty due to tss seg limit) */
1756 common_tss[0].tss_iobase = sizeof(struct amd64tss) + IOPERM_BITMAP_SIZE;
1758 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
1761 amd64_conf_fast_syscall();
1764 * Temporary forge some valid pointer to PCB, for exception
1765 * handlers. It is reinitialized properly below after FPU is
1766 * set up. Also set up td_critnest to short-cut the page
1769 cpu_max_ext_state_size = sizeof(struct savefpu);
1770 thread0.td_pcb = get_pcb_td(&thread0);
1771 thread0.td_critnest = 1;
1774 * The console and kdb should be initialized even earlier than here,
1775 * but some console drivers don't work until after getmemsize().
1776 * Default to late console initialization to support these drivers.
1777 * This loses mainly printf()s in getmemsize() and early debugging.
1780 TUNABLE_INT_FETCH("debug.late_console", &late_console);
1781 if (!late_console) {
1786 getmemsize(kmdp, physfree);
1787 init_param2(physmem);
1789 /* now running on new page tables, configured,and u/iom is accessible */
1799 /* Reset and mask the atpics and leave them shut down. */
1803 * Point the ICU spurious interrupt vectors at the APIC spurious
1804 * interrupt handler.
1806 setidt(IDT_IO_INTS + 7, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0);
1807 setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0);
1810 #error "have you forgotten the isa device?";
1816 msgbufinit(msgbufp, msgbufsize);
1820 * Set up thread0 pcb after fpuinit calculated pcb + fpu save
1821 * area size. Zero out the extended state header in fpu save
1824 thread0.td_pcb = get_pcb_td(&thread0);
1825 thread0.td_pcb->pcb_save = get_pcb_user_save_td(&thread0);
1826 bzero(get_pcb_user_save_td(&thread0), cpu_max_ext_state_size);
1828 xhdr = (struct xstate_hdr *)(get_pcb_user_save_td(&thread0) +
1830 xhdr->xstate_bv = xsave_mask;
1832 /* make an initial tss so cpu can get interrupt stack on syscall! */
1833 rsp0 = (vm_offset_t)thread0.td_pcb;
1834 /* Ensure the stack is aligned to 16 bytes */
1836 common_tss[0].tss_rsp0 = rsp0;
1837 PCPU_SET(rsp0, rsp0);
1838 PCPU_SET(pti_rsp0, ((vm_offset_t)PCPU_PTR(pti_stack) +
1839 PC_PTI_STACK_SZ * sizeof(uint64_t)) & ~0xful);
1840 PCPU_SET(curpcb, thread0.td_pcb);
1842 /* transfer to user mode */
1844 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
1845 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
1846 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL);
1847 _ufssel = GSEL(GUFS32_SEL, SEL_UPL);
1848 _ugssel = GSEL(GUGS32_SEL, SEL_UPL);
1854 /* setup proc 0's pcb */
1855 thread0.td_pcb->pcb_flags = 0;
1856 thread0.td_frame = &proc0_tf;
1858 env = kern_getenv("kernelname");
1860 strlcpy(kernelname, env, sizeof(kernelname));
1867 thread0.td_critnest = 0;
1869 TUNABLE_INT_FETCH("hw.ibrs_disable", &hw_ibrs_disable);
1870 TUNABLE_INT_FETCH("hw.spec_store_bypass_disable", &hw_ssb_disable);
1871 TUNABLE_INT_FETCH("hw.mds_disable", &hw_mds_disable);
1873 /* Location of kernel stack for locore */
1874 return ((u_int64_t)thread0.td_pcb);
1878 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
1881 pcpu->pc_acpi_id = 0xffffffff;
1885 smap_sysctl_handler(SYSCTL_HANDLER_ARGS)
1887 struct bios_smap *smapbase;
1888 struct bios_smap_xattr smap;
1891 int count, error, i;
1893 /* Retrieve the system memory map from the loader. */
1894 kmdp = preload_search_by_type("elf kernel");
1896 kmdp = preload_search_by_type("elf64 kernel");
1897 smapbase = (struct bios_smap *)preload_search_info(kmdp,
1898 MODINFO_METADATA | MODINFOMD_SMAP);
1899 if (smapbase == NULL)
1901 smapattr = (uint32_t *)preload_search_info(kmdp,
1902 MODINFO_METADATA | MODINFOMD_SMAP_XATTR);
1903 count = *((uint32_t *)smapbase - 1) / sizeof(*smapbase);
1905 for (i = 0; i < count; i++) {
1906 smap.base = smapbase[i].base;
1907 smap.length = smapbase[i].length;
1908 smap.type = smapbase[i].type;
1909 if (smapattr != NULL)
1910 smap.xattr = smapattr[i];
1913 error = SYSCTL_OUT(req, &smap, sizeof(smap));
1917 SYSCTL_PROC(_machdep, OID_AUTO, smap, CTLTYPE_OPAQUE|CTLFLAG_RD, NULL, 0,
1918 smap_sysctl_handler, "S,bios_smap_xattr", "Raw BIOS SMAP data");
1921 efi_map_sysctl_handler(SYSCTL_HANDLER_ARGS)
1923 struct efi_map_header *efihdr;
1927 kmdp = preload_search_by_type("elf kernel");
1929 kmdp = preload_search_by_type("elf64 kernel");
1930 efihdr = (struct efi_map_header *)preload_search_info(kmdp,
1931 MODINFO_METADATA | MODINFOMD_EFI_MAP);
1934 efisize = *((uint32_t *)efihdr - 1);
1935 return (SYSCTL_OUT(req, efihdr, efisize));
1937 SYSCTL_PROC(_machdep, OID_AUTO, efi_map, CTLTYPE_OPAQUE|CTLFLAG_RD, NULL, 0,
1938 efi_map_sysctl_handler, "S,efi_map_header", "Raw EFI Memory Map");
1941 spinlock_enter(void)
1947 if (td->td_md.md_spinlock_count == 0) {
1948 flags = intr_disable();
1949 td->td_md.md_spinlock_count = 1;
1950 td->td_md.md_saved_flags = flags;
1952 td->td_md.md_spinlock_count++;
1964 flags = td->td_md.md_saved_flags;
1965 td->td_md.md_spinlock_count--;
1966 if (td->td_md.md_spinlock_count == 0)
1967 intr_restore(flags);
1971 * Construct a PCB from a trapframe. This is called from kdb_trap() where
1972 * we want to start a backtrace from the function that caused us to enter
1973 * the debugger. We have the context in the trapframe, but base the trace
1974 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
1975 * enough for a backtrace.
1978 makectx(struct trapframe *tf, struct pcb *pcb)
1981 pcb->pcb_r12 = tf->tf_r12;
1982 pcb->pcb_r13 = tf->tf_r13;
1983 pcb->pcb_r14 = tf->tf_r14;
1984 pcb->pcb_r15 = tf->tf_r15;
1985 pcb->pcb_rbp = tf->tf_rbp;
1986 pcb->pcb_rbx = tf->tf_rbx;
1987 pcb->pcb_rip = tf->tf_rip;
1988 pcb->pcb_rsp = tf->tf_rsp;
1992 ptrace_set_pc(struct thread *td, unsigned long addr)
1995 td->td_frame->tf_rip = addr;
1996 set_pcb_flags(td->td_pcb, PCB_FULL_IRET);
2001 ptrace_single_step(struct thread *td)
2004 PROC_LOCK_ASSERT(td->td_proc, MA_OWNED);
2005 if ((td->td_frame->tf_rflags & PSL_T) == 0) {
2006 td->td_frame->tf_rflags |= PSL_T;
2007 td->td_dbgflags |= TDB_STEP;
2013 ptrace_clear_single_step(struct thread *td)
2015 PROC_LOCK_ASSERT(td->td_proc, MA_OWNED);
2016 td->td_frame->tf_rflags &= ~PSL_T;
2017 td->td_dbgflags &= ~TDB_STEP;
2022 fill_regs(struct thread *td, struct reg *regs)
2024 struct trapframe *tp;
2027 return (fill_frame_regs(tp, regs));
2031 fill_frame_regs(struct trapframe *tp, struct reg *regs)
2034 regs->r_r15 = tp->tf_r15;
2035 regs->r_r14 = tp->tf_r14;
2036 regs->r_r13 = tp->tf_r13;
2037 regs->r_r12 = tp->tf_r12;
2038 regs->r_r11 = tp->tf_r11;
2039 regs->r_r10 = tp->tf_r10;
2040 regs->r_r9 = tp->tf_r9;
2041 regs->r_r8 = tp->tf_r8;
2042 regs->r_rdi = tp->tf_rdi;
2043 regs->r_rsi = tp->tf_rsi;
2044 regs->r_rbp = tp->tf_rbp;
2045 regs->r_rbx = tp->tf_rbx;
2046 regs->r_rdx = tp->tf_rdx;
2047 regs->r_rcx = tp->tf_rcx;
2048 regs->r_rax = tp->tf_rax;
2049 regs->r_rip = tp->tf_rip;
2050 regs->r_cs = tp->tf_cs;
2051 regs->r_rflags = tp->tf_rflags;
2052 regs->r_rsp = tp->tf_rsp;
2053 regs->r_ss = tp->tf_ss;
2054 if (tp->tf_flags & TF_HASSEGS) {
2055 regs->r_ds = tp->tf_ds;
2056 regs->r_es = tp->tf_es;
2057 regs->r_fs = tp->tf_fs;
2058 regs->r_gs = tp->tf_gs;
2071 set_regs(struct thread *td, struct reg *regs)
2073 struct trapframe *tp;
2077 rflags = regs->r_rflags & 0xffffffff;
2078 if (!EFL_SECURE(rflags, tp->tf_rflags) || !CS_SECURE(regs->r_cs))
2080 tp->tf_r15 = regs->r_r15;
2081 tp->tf_r14 = regs->r_r14;
2082 tp->tf_r13 = regs->r_r13;
2083 tp->tf_r12 = regs->r_r12;
2084 tp->tf_r11 = regs->r_r11;
2085 tp->tf_r10 = regs->r_r10;
2086 tp->tf_r9 = regs->r_r9;
2087 tp->tf_r8 = regs->r_r8;
2088 tp->tf_rdi = regs->r_rdi;
2089 tp->tf_rsi = regs->r_rsi;
2090 tp->tf_rbp = regs->r_rbp;
2091 tp->tf_rbx = regs->r_rbx;
2092 tp->tf_rdx = regs->r_rdx;
2093 tp->tf_rcx = regs->r_rcx;
2094 tp->tf_rax = regs->r_rax;
2095 tp->tf_rip = regs->r_rip;
2096 tp->tf_cs = regs->r_cs;
2097 tp->tf_rflags = rflags;
2098 tp->tf_rsp = regs->r_rsp;
2099 tp->tf_ss = regs->r_ss;
2100 if (0) { /* XXXKIB */
2101 tp->tf_ds = regs->r_ds;
2102 tp->tf_es = regs->r_es;
2103 tp->tf_fs = regs->r_fs;
2104 tp->tf_gs = regs->r_gs;
2105 tp->tf_flags = TF_HASSEGS;
2107 set_pcb_flags(td->td_pcb, PCB_FULL_IRET);
2111 /* XXX check all this stuff! */
2112 /* externalize from sv_xmm */
2114 fill_fpregs_xmm(struct savefpu *sv_xmm, struct fpreg *fpregs)
2116 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env;
2117 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2121 bzero(fpregs, sizeof(*fpregs));
2123 /* FPU control/status */
2124 penv_fpreg->en_cw = penv_xmm->en_cw;
2125 penv_fpreg->en_sw = penv_xmm->en_sw;
2126 penv_fpreg->en_tw = penv_xmm->en_tw;
2127 penv_fpreg->en_opcode = penv_xmm->en_opcode;
2128 penv_fpreg->en_rip = penv_xmm->en_rip;
2129 penv_fpreg->en_rdp = penv_xmm->en_rdp;
2130 penv_fpreg->en_mxcsr = penv_xmm->en_mxcsr;
2131 penv_fpreg->en_mxcsr_mask = penv_xmm->en_mxcsr_mask;
2134 for (i = 0; i < 8; ++i)
2135 bcopy(sv_xmm->sv_fp[i].fp_acc.fp_bytes, fpregs->fpr_acc[i], 10);
2138 for (i = 0; i < 16; ++i)
2139 bcopy(sv_xmm->sv_xmm[i].xmm_bytes, fpregs->fpr_xacc[i], 16);
2142 /* internalize from fpregs into sv_xmm */
2144 set_fpregs_xmm(struct fpreg *fpregs, struct savefpu *sv_xmm)
2146 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2147 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env;
2151 /* FPU control/status */
2152 penv_xmm->en_cw = penv_fpreg->en_cw;
2153 penv_xmm->en_sw = penv_fpreg->en_sw;
2154 penv_xmm->en_tw = penv_fpreg->en_tw;
2155 penv_xmm->en_opcode = penv_fpreg->en_opcode;
2156 penv_xmm->en_rip = penv_fpreg->en_rip;
2157 penv_xmm->en_rdp = penv_fpreg->en_rdp;
2158 penv_xmm->en_mxcsr = penv_fpreg->en_mxcsr;
2159 penv_xmm->en_mxcsr_mask = penv_fpreg->en_mxcsr_mask & cpu_mxcsr_mask;
2162 for (i = 0; i < 8; ++i)
2163 bcopy(fpregs->fpr_acc[i], sv_xmm->sv_fp[i].fp_acc.fp_bytes, 10);
2166 for (i = 0; i < 16; ++i)
2167 bcopy(fpregs->fpr_xacc[i], sv_xmm->sv_xmm[i].xmm_bytes, 16);
2170 /* externalize from td->pcb */
2172 fill_fpregs(struct thread *td, struct fpreg *fpregs)
2175 KASSERT(td == curthread || TD_IS_SUSPENDED(td) ||
2176 P_SHOULDSTOP(td->td_proc),
2177 ("not suspended thread %p", td));
2179 fill_fpregs_xmm(get_pcb_user_save_td(td), fpregs);
2183 /* internalize to td->pcb */
2185 set_fpregs(struct thread *td, struct fpreg *fpregs)
2189 set_fpregs_xmm(fpregs, get_pcb_user_save_td(td));
2196 * Get machine context.
2199 get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
2202 struct trapframe *tp;
2206 PROC_LOCK(curthread->td_proc);
2207 mcp->mc_onstack = sigonstack(tp->tf_rsp);
2208 PROC_UNLOCK(curthread->td_proc);
2209 mcp->mc_r15 = tp->tf_r15;
2210 mcp->mc_r14 = tp->tf_r14;
2211 mcp->mc_r13 = tp->tf_r13;
2212 mcp->mc_r12 = tp->tf_r12;
2213 mcp->mc_r11 = tp->tf_r11;
2214 mcp->mc_r10 = tp->tf_r10;
2215 mcp->mc_r9 = tp->tf_r9;
2216 mcp->mc_r8 = tp->tf_r8;
2217 mcp->mc_rdi = tp->tf_rdi;
2218 mcp->mc_rsi = tp->tf_rsi;
2219 mcp->mc_rbp = tp->tf_rbp;
2220 mcp->mc_rbx = tp->tf_rbx;
2221 mcp->mc_rcx = tp->tf_rcx;
2222 mcp->mc_rflags = tp->tf_rflags;
2223 if (flags & GET_MC_CLEAR_RET) {
2226 mcp->mc_rflags &= ~PSL_C;
2228 mcp->mc_rax = tp->tf_rax;
2229 mcp->mc_rdx = tp->tf_rdx;
2231 mcp->mc_rip = tp->tf_rip;
2232 mcp->mc_cs = tp->tf_cs;
2233 mcp->mc_rsp = tp->tf_rsp;
2234 mcp->mc_ss = tp->tf_ss;
2235 mcp->mc_ds = tp->tf_ds;
2236 mcp->mc_es = tp->tf_es;
2237 mcp->mc_fs = tp->tf_fs;
2238 mcp->mc_gs = tp->tf_gs;
2239 mcp->mc_flags = tp->tf_flags;
2240 mcp->mc_len = sizeof(*mcp);
2241 get_fpcontext(td, mcp, NULL, 0);
2242 update_pcb_bases(pcb);
2243 mcp->mc_fsbase = pcb->pcb_fsbase;
2244 mcp->mc_gsbase = pcb->pcb_gsbase;
2245 mcp->mc_xfpustate = 0;
2246 mcp->mc_xfpustate_len = 0;
2247 bzero(mcp->mc_spare, sizeof(mcp->mc_spare));
2252 * Set machine context.
2254 * However, we don't set any but the user modifiable flags, and we won't
2255 * touch the cs selector.
2258 set_mcontext(struct thread *td, mcontext_t *mcp)
2261 struct trapframe *tp;
2268 if (mcp->mc_len != sizeof(*mcp) ||
2269 (mcp->mc_flags & ~_MC_FLAG_MASK) != 0)
2271 rflags = (mcp->mc_rflags & PSL_USERCHANGE) |
2272 (tp->tf_rflags & ~PSL_USERCHANGE);
2273 if (mcp->mc_flags & _MC_HASFPXSTATE) {
2274 if (mcp->mc_xfpustate_len > cpu_max_ext_state_size -
2275 sizeof(struct savefpu))
2277 xfpustate = __builtin_alloca(mcp->mc_xfpustate_len);
2278 ret = copyin((void *)mcp->mc_xfpustate, xfpustate,
2279 mcp->mc_xfpustate_len);
2284 ret = set_fpcontext(td, mcp, xfpustate, mcp->mc_xfpustate_len);
2287 tp->tf_r15 = mcp->mc_r15;
2288 tp->tf_r14 = mcp->mc_r14;
2289 tp->tf_r13 = mcp->mc_r13;
2290 tp->tf_r12 = mcp->mc_r12;
2291 tp->tf_r11 = mcp->mc_r11;
2292 tp->tf_r10 = mcp->mc_r10;
2293 tp->tf_r9 = mcp->mc_r9;
2294 tp->tf_r8 = mcp->mc_r8;
2295 tp->tf_rdi = mcp->mc_rdi;
2296 tp->tf_rsi = mcp->mc_rsi;
2297 tp->tf_rbp = mcp->mc_rbp;
2298 tp->tf_rbx = mcp->mc_rbx;
2299 tp->tf_rdx = mcp->mc_rdx;
2300 tp->tf_rcx = mcp->mc_rcx;
2301 tp->tf_rax = mcp->mc_rax;
2302 tp->tf_rip = mcp->mc_rip;
2303 tp->tf_rflags = rflags;
2304 tp->tf_rsp = mcp->mc_rsp;
2305 tp->tf_ss = mcp->mc_ss;
2306 tp->tf_flags = mcp->mc_flags;
2307 if (tp->tf_flags & TF_HASSEGS) {
2308 tp->tf_ds = mcp->mc_ds;
2309 tp->tf_es = mcp->mc_es;
2310 tp->tf_fs = mcp->mc_fs;
2311 tp->tf_gs = mcp->mc_gs;
2313 set_pcb_flags(pcb, PCB_FULL_IRET);
2314 if (mcp->mc_flags & _MC_HASBASES) {
2315 pcb->pcb_fsbase = mcp->mc_fsbase;
2316 pcb->pcb_gsbase = mcp->mc_gsbase;
2322 get_fpcontext(struct thread *td, mcontext_t *mcp, char *xfpusave,
2323 size_t xfpusave_len)
2325 size_t max_len, len;
2327 mcp->mc_ownedfp = fpugetregs(td);
2328 bcopy(get_pcb_user_save_td(td), &mcp->mc_fpstate[0],
2329 sizeof(mcp->mc_fpstate));
2330 mcp->mc_fpformat = fpuformat();
2331 if (!use_xsave || xfpusave_len == 0)
2333 max_len = cpu_max_ext_state_size - sizeof(struct savefpu);
2335 if (len > max_len) {
2337 bzero(xfpusave + max_len, len - max_len);
2339 mcp->mc_flags |= _MC_HASFPXSTATE;
2340 mcp->mc_xfpustate_len = len;
2341 bcopy(get_pcb_user_save_td(td) + 1, xfpusave, len);
2345 set_fpcontext(struct thread *td, mcontext_t *mcp, char *xfpustate,
2346 size_t xfpustate_len)
2350 if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
2352 else if (mcp->mc_fpformat != _MC_FPFMT_XMM)
2354 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) {
2355 /* We don't care what state is left in the FPU or PCB. */
2358 } else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
2359 mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
2360 error = fpusetregs(td, (struct savefpu *)&mcp->mc_fpstate,
2361 xfpustate, xfpustate_len);
2368 fpstate_drop(struct thread *td)
2371 KASSERT(PCB_USER_FPU(td->td_pcb), ("fpstate_drop: kernel-owned fpu"));
2373 if (PCPU_GET(fpcurthread) == td)
2376 * XXX force a full drop of the fpu. The above only drops it if we
2379 * XXX I don't much like fpugetuserregs()'s semantics of doing a full
2380 * drop. Dropping only to the pcb matches fnsave's behaviour.
2381 * We only need to drop to !PCB_INITDONE in sendsig(). But
2382 * sendsig() is the only caller of fpugetuserregs()... perhaps we just
2383 * have too many layers.
2385 clear_pcb_flags(curthread->td_pcb,
2386 PCB_FPUINITDONE | PCB_USERFPUINITDONE);
2391 fill_dbregs(struct thread *td, struct dbreg *dbregs)
2396 dbregs->dr[0] = rdr0();
2397 dbregs->dr[1] = rdr1();
2398 dbregs->dr[2] = rdr2();
2399 dbregs->dr[3] = rdr3();
2400 dbregs->dr[6] = rdr6();
2401 dbregs->dr[7] = rdr7();
2404 dbregs->dr[0] = pcb->pcb_dr0;
2405 dbregs->dr[1] = pcb->pcb_dr1;
2406 dbregs->dr[2] = pcb->pcb_dr2;
2407 dbregs->dr[3] = pcb->pcb_dr3;
2408 dbregs->dr[6] = pcb->pcb_dr6;
2409 dbregs->dr[7] = pcb->pcb_dr7;
2425 set_dbregs(struct thread *td, struct dbreg *dbregs)
2431 load_dr0(dbregs->dr[0]);
2432 load_dr1(dbregs->dr[1]);
2433 load_dr2(dbregs->dr[2]);
2434 load_dr3(dbregs->dr[3]);
2435 load_dr6(dbregs->dr[6]);
2436 load_dr7(dbregs->dr[7]);
2439 * Don't let an illegal value for dr7 get set. Specifically,
2440 * check for undefined settings. Setting these bit patterns
2441 * result in undefined behaviour and can lead to an unexpected
2442 * TRCTRAP or a general protection fault right here.
2443 * Upper bits of dr6 and dr7 must not be set
2445 for (i = 0; i < 4; i++) {
2446 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02)
2448 if (td->td_frame->tf_cs == _ucode32sel &&
2449 DBREG_DR7_LEN(dbregs->dr[7], i) == DBREG_DR7_LEN_8)
2452 if ((dbregs->dr[6] & 0xffffffff00000000ul) != 0 ||
2453 (dbregs->dr[7] & 0xffffffff00000000ul) != 0)
2459 * Don't let a process set a breakpoint that is not within the
2460 * process's address space. If a process could do this, it
2461 * could halt the system by setting a breakpoint in the kernel
2462 * (if ddb was enabled). Thus, we need to check to make sure
2463 * that no breakpoints are being enabled for addresses outside
2464 * process's address space.
2466 * XXX - what about when the watched area of the user's
2467 * address space is written into from within the kernel
2468 * ... wouldn't that still cause a breakpoint to be generated
2469 * from within kernel mode?
2472 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) {
2473 /* dr0 is enabled */
2474 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS)
2477 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) {
2478 /* dr1 is enabled */
2479 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS)
2482 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) {
2483 /* dr2 is enabled */
2484 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS)
2487 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) {
2488 /* dr3 is enabled */
2489 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS)
2493 pcb->pcb_dr0 = dbregs->dr[0];
2494 pcb->pcb_dr1 = dbregs->dr[1];
2495 pcb->pcb_dr2 = dbregs->dr[2];
2496 pcb->pcb_dr3 = dbregs->dr[3];
2497 pcb->pcb_dr6 = dbregs->dr[6];
2498 pcb->pcb_dr7 = dbregs->dr[7];
2500 set_pcb_flags(pcb, PCB_DBREGS);
2510 load_dr7(0); /* Turn off the control bits first */
2519 * Return > 0 if a hardware breakpoint has been hit, and the
2520 * breakpoint was in user space. Return 0, otherwise.
2523 user_dbreg_trap(register_t dr6)
2526 u_int64_t bp; /* breakpoint bits extracted from dr6 */
2527 int nbp; /* number of breakpoints that triggered */
2528 caddr_t addr[4]; /* breakpoint addresses */
2531 bp = dr6 & DBREG_DR6_BMASK;
2534 * None of the breakpoint bits are set meaning this
2535 * trap was not caused by any of the debug registers
2541 if ((dr7 & 0x000000ff) == 0) {
2543 * all GE and LE bits in the dr7 register are zero,
2544 * thus the trap couldn't have been caused by the
2545 * hardware debug registers
2553 * at least one of the breakpoints were hit, check to see
2554 * which ones and if any of them are user space addresses
2558 addr[nbp++] = (caddr_t)rdr0();
2561 addr[nbp++] = (caddr_t)rdr1();
2564 addr[nbp++] = (caddr_t)rdr2();
2567 addr[nbp++] = (caddr_t)rdr3();
2570 for (i = 0; i < nbp; i++) {
2571 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) {
2573 * addr[i] is in user space
2580 * None of the breakpoints are in user space.
2586 * The pcb_flags is only modified by current thread, or by other threads
2587 * when current thread is stopped. However, current thread may change it
2588 * from the interrupt context in cpu_switch(), or in the trap handler.
2589 * When we read-modify-write pcb_flags from C sources, compiler may generate
2590 * code that is not atomic regarding the interrupt handler. If a trap or
2591 * interrupt happens and any flag is modified from the handler, it can be
2592 * clobbered with the cached value later. Therefore, we implement setting
2593 * and clearing flags with single-instruction functions, which do not race
2594 * with possible modification of the flags from the trap or interrupt context,
2595 * because traps and interrupts are executed only on instruction boundary.
2598 set_pcb_flags_raw(struct pcb *pcb, const u_int flags)
2601 __asm __volatile("orl %1,%0"
2602 : "=m" (pcb->pcb_flags) : "ir" (flags), "m" (pcb->pcb_flags)
2608 * The support for RDFSBASE, WRFSBASE and similar instructions for %gs
2609 * base requires that kernel saves MSR_FSBASE and MSR_{K,}GSBASE into
2610 * pcb if user space modified the bases. We must save on the context
2611 * switch or if the return to usermode happens through the doreti.
2613 * Tracking of both events is performed by the pcb flag PCB_FULL_IRET,
2614 * which have a consequence that the base MSRs must be saved each time
2615 * the PCB_FULL_IRET flag is set. We disable interrupts to sync with
2619 set_pcb_flags(struct pcb *pcb, const u_int flags)
2623 if (curpcb == pcb &&
2624 (flags & PCB_FULL_IRET) != 0 &&
2625 (pcb->pcb_flags & PCB_FULL_IRET) == 0 &&
2626 (cpu_stdext_feature & CPUID_STDEXT_FSGSBASE) != 0) {
2628 if ((pcb->pcb_flags & PCB_FULL_IRET) == 0) {
2629 if (rfs() == _ufssel)
2630 pcb->pcb_fsbase = rdfsbase();
2631 if (rgs() == _ugssel)
2632 pcb->pcb_gsbase = rdmsr(MSR_KGSBASE);
2634 set_pcb_flags_raw(pcb, flags);
2637 set_pcb_flags_raw(pcb, flags);
2642 clear_pcb_flags(struct pcb *pcb, const u_int flags)
2645 __asm __volatile("andl %1,%0"
2646 : "=m" (pcb->pcb_flags) : "ir" (~flags), "m" (pcb->pcb_flags)
2653 * Provide inb() and outb() as functions. They are normally only available as
2654 * inline functions, thus cannot be called from the debugger.
2657 /* silence compiler warnings */
2658 u_char inb_(u_short);
2659 void outb_(u_short, u_char);
2668 outb_(u_short port, u_char data)