2 * Copyright (c) 2003 Peter Wemm.
3 * Copyright (c) 1992 Terrence R. Lambert.
4 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
7 * This code is derived from software contributed to Berkeley by
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the University of
21 * California, Berkeley and its contributors.
22 * 4. Neither the name of the University nor the names of its contributors
23 * may be used to endorse or promote products derived from this software
24 * without specific prior written permission.
26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
41 #include <sys/cdefs.h>
42 __FBSDID("$FreeBSD$");
44 #include "opt_atalk.h"
45 #include "opt_atpic.h"
46 #include "opt_compat.h"
52 #include "opt_kstack_pages.h"
53 #include "opt_maxmem.h"
54 #include "opt_mp_watchdog.h"
55 #include "opt_perfmon.h"
56 #include "opt_sched.h"
57 #include "opt_kdtrace.h"
59 #include <sys/param.h>
61 #include <sys/systm.h>
65 #include <sys/callout.h>
68 #include <sys/eventhandler.h>
70 #include <sys/imgact.h>
72 #include <sys/kernel.h>
74 #include <sys/linker.h>
76 #include <sys/malloc.h>
77 #include <sys/msgbuf.h>
78 #include <sys/mutex.h>
80 #include <sys/ptrace.h>
81 #include <sys/reboot.h>
82 #include <sys/sched.h>
83 #include <sys/signalvar.h>
87 #include <sys/syscallsubr.h>
88 #include <sys/sysctl.h>
89 #include <sys/sysent.h>
90 #include <sys/sysproto.h>
91 #include <sys/ucontext.h>
92 #include <sys/vmmeter.h>
95 #include <vm/vm_extern.h>
96 #include <vm/vm_kern.h>
97 #include <vm/vm_page.h>
98 #include <vm/vm_map.h>
99 #include <vm/vm_object.h>
100 #include <vm/vm_pager.h>
101 #include <vm/vm_param.h>
105 #error KDB must be enabled in order for DDB to work!
108 #include <ddb/db_sym.h>
111 #include <net/netisr.h>
113 #include <machine/clock.h>
114 #include <machine/cpu.h>
115 #include <machine/cputypes.h>
116 #include <machine/intr_machdep.h>
118 #include <machine/md_var.h>
119 #include <machine/metadata.h>
120 #include <machine/mp_watchdog.h>
121 #include <machine/pc/bios.h>
122 #include <machine/pcb.h>
123 #include <machine/proc.h>
124 #include <machine/reg.h>
125 #include <machine/sigframe.h>
126 #include <machine/specialreg.h>
128 #include <machine/perfmon.h>
130 #include <machine/tss.h>
132 #include <machine/smp.h>
136 #include <x86/isa/icu.h>
138 #include <machine/apicvar.h>
141 #include <isa/isareg.h>
144 /* Sanity check for __curthread() */
145 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
147 extern u_int64_t hammer_time(u_int64_t, u_int64_t);
149 extern void printcpuinfo(void); /* XXX header file */
150 extern void identify_cpu(void);
151 extern void panicifcpuunsupported(void);
153 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
154 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
156 static void cpu_startup(void *);
157 static void get_fpcontext(struct thread *td, mcontext_t *mcp);
158 static int set_fpcontext(struct thread *td, const mcontext_t *mcp);
159 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
162 * The file "conf/ldscript.amd64" defines the symbol "kernphys". Its value is
163 * the physical address at which the kernel is loaded.
165 extern char kernphys[];
167 extern vm_offset_t ksym_start, ksym_end;
170 struct msgbuf *msgbufp;
172 /* Intel ICH registers */
173 #define ICH_PMBASE 0x400
174 #define ICH_SMI_EN ICH_PMBASE + 0x30
176 int _udatasel, _ucodesel, _ucode32sel, _ufssel, _ugssel;
184 * The number of PHYSMAP entries must be one less than the number of
185 * PHYSSEG entries because the PHYSMAP entry that spans the largest
186 * physical address that is accessible by ISA DMA is split into two
189 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
191 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
192 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
194 /* must be 2 less so 0 0 can signal end of chunks */
195 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2)
196 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2)
198 struct kva_md_info kmi;
200 static struct trapframe proc0_tf;
201 struct region_descriptor r_gdt, r_idt;
203 struct pcpu __pcpu[MAXCPU];
207 struct mtx dt_lock; /* lock for GDT and LDT */
217 * On MacBooks, we need to disallow the legacy USB circuit to
218 * generate an SMI# because this can cause several problems,
219 * namely: incorrect CPU frequency detection and failure to
221 * We do this by disabling a bit in the SMI_EN (SMI Control and
222 * Enable register) of the Intel ICH LPC Interface Bridge.
224 sysenv = getenv("smbios.system.product");
225 if (sysenv != NULL) {
226 if (strncmp(sysenv, "MacBook1,1", 10) == 0 ||
227 strncmp(sysenv, "MacBook3,1", 10) == 0 ||
228 strncmp(sysenv, "MacBookPro1,1", 13) == 0 ||
229 strncmp(sysenv, "MacBookPro1,2", 13) == 0 ||
230 strncmp(sysenv, "MacBookPro3,1", 13) == 0 ||
231 strncmp(sysenv, "Macmini1,1", 10) == 0) {
233 printf("Disabling LEGACY_USB_EN bit on "
235 outl(ICH_SMI_EN, inl(ICH_SMI_EN) & ~0x8);
241 * Good {morning,afternoon,evening,night}.
245 panicifcpuunsupported();
252 * Display physical memory if SMBIOS reports reasonable amount.
255 sysenv = getenv("smbios.memory.enabled");
256 if (sysenv != NULL) {
257 memsize = (uintmax_t)strtoul(sysenv, (char **)NULL, 10) << 10;
260 if (memsize < ptoa((uintmax_t)cnt.v_free_count))
261 memsize = ptoa((uintmax_t)Maxmem);
262 printf("real memory = %ju (%ju MB)\n", memsize, memsize >> 20);
265 * Display any holes after the first chunk of extended memory.
270 printf("Physical memory chunk(s):\n");
271 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
274 size = phys_avail[indx + 1] - phys_avail[indx];
276 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n",
277 (uintmax_t)phys_avail[indx],
278 (uintmax_t)phys_avail[indx + 1] - 1,
279 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
283 vm_ksubmap_init(&kmi);
285 printf("avail memory = %ju (%ju MB)\n",
286 ptoa((uintmax_t)cnt.v_free_count),
287 ptoa((uintmax_t)cnt.v_free_count) / 1048576);
290 * Set up buffers, so they can be used to read disk labels.
293 vm_pager_bufferinit();
299 * Send an interrupt to process.
301 * Stack is set up to allow sigcode stored
302 * at top to call routine, followed by call
303 * to sigreturn routine below. After sigreturn
304 * resets the signal mask, the stack, and the
305 * frame pointer, it returns to the user
309 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
311 struct sigframe sf, *sfp;
317 struct trapframe *regs;
324 PROC_LOCK_ASSERT(p, MA_OWNED);
325 sig = ksi->ksi_signo;
327 mtx_assert(&psp->ps_mtx, MA_OWNED);
329 oonstack = sigonstack(regs->tf_rsp);
331 /* Save user context. */
332 bzero(&sf, sizeof(sf));
333 sf.sf_uc.uc_sigmask = *mask;
334 sf.sf_uc.uc_stack = td->td_sigstk;
335 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
336 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
337 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
338 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(*regs));
339 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */
340 get_fpcontext(td, &sf.sf_uc.uc_mcontext);
342 sf.sf_uc.uc_mcontext.mc_fsbase = pcb->pcb_fsbase;
343 sf.sf_uc.uc_mcontext.mc_gsbase = pcb->pcb_gsbase;
344 bzero(sf.sf_uc.uc_mcontext.mc_spare,
345 sizeof(sf.sf_uc.uc_mcontext.mc_spare));
346 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__));
348 /* Allocate space for the signal handler context. */
349 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
350 SIGISMEMBER(psp->ps_sigonstack, sig)) {
351 sp = td->td_sigstk.ss_sp +
352 td->td_sigstk.ss_size - sizeof(struct sigframe);
353 #if defined(COMPAT_43)
354 td->td_sigstk.ss_flags |= SS_ONSTACK;
357 sp = (char *)regs->tf_rsp - sizeof(struct sigframe) - 128;
358 /* Align to 16 bytes. */
359 sfp = (struct sigframe *)((unsigned long)sp & ~0xFul);
361 /* Translate the signal if appropriate. */
362 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
363 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
365 /* Build the argument list for the signal handler. */
366 regs->tf_rdi = sig; /* arg 1 in %rdi */
367 regs->tf_rdx = (register_t)&sfp->sf_uc; /* arg 3 in %rdx */
368 bzero(&sf.sf_si, sizeof(sf.sf_si));
369 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
370 /* Signal handler installed with SA_SIGINFO. */
371 regs->tf_rsi = (register_t)&sfp->sf_si; /* arg 2 in %rsi */
372 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
374 /* Fill in POSIX parts */
375 sf.sf_si = ksi->ksi_info;
376 sf.sf_si.si_signo = sig; /* maybe a translated signal */
377 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */
379 /* Old FreeBSD-style arguments. */
380 regs->tf_rsi = ksi->ksi_code; /* arg 2 in %rsi */
381 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */
382 sf.sf_ahu.sf_handler = catcher;
384 mtx_unlock(&psp->ps_mtx);
388 * Copy the sigframe out to the user's stack.
390 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
392 printf("process %ld has trashed its stack\n", (long)p->p_pid);
398 regs->tf_rsp = (long)sfp;
399 regs->tf_rip = p->p_sysent->sv_sigcode_base;
400 regs->tf_rflags &= ~(PSL_T | PSL_D);
401 regs->tf_cs = _ucodesel;
402 regs->tf_ds = _udatasel;
403 regs->tf_es = _udatasel;
404 regs->tf_fs = _ufssel;
405 regs->tf_gs = _ugssel;
406 regs->tf_flags = TF_HASSEGS;
407 set_pcb_flags(pcb, PCB_FULL_IRET);
409 mtx_lock(&psp->ps_mtx);
413 * System call to cleanup state after a signal
414 * has been taken. Reset signal mask and
415 * stack state from context left by sendsig (above).
416 * Return to previous pc and psl as specified by
417 * context left by sendsig. Check carefully to
418 * make sure that the user has not modified the
419 * state to gain improper privileges.
424 sys_sigreturn(td, uap)
426 struct sigreturn_args /* {
427 const struct __ucontext *sigcntxp;
433 struct trapframe *regs;
442 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
444 uprintf("pid %d (%s): sigreturn copyin failed\n",
445 p->p_pid, td->td_name);
449 if ((ucp->uc_mcontext.mc_flags & ~_MC_FLAG_MASK) != 0) {
450 uprintf("pid %d (%s): sigreturn mc_flags %x\n", p->p_pid,
451 td->td_name, ucp->uc_mcontext.mc_flags);
455 rflags = ucp->uc_mcontext.mc_rflags;
457 * Don't allow users to change privileged or reserved flags.
460 * XXX do allow users to change the privileged flag PSL_RF.
461 * The cpu sets PSL_RF in tf_rflags for faults. Debuggers
462 * should sometimes set it there too. tf_rflags is kept in
463 * the signal context during signal handling and there is no
464 * other place to remember it, so the PSL_RF bit may be
465 * corrupted by the signal handler without us knowing.
466 * Corruption of the PSL_RF bit at worst causes one more or
467 * one less debugger trap, so allowing it is fairly harmless.
469 if (!EFL_SECURE(rflags & ~PSL_RF, regs->tf_rflags & ~PSL_RF)) {
470 uprintf("pid %d (%s): sigreturn rflags = 0x%lx\n", p->p_pid,
471 td->td_name, rflags);
476 * Don't allow users to load a valid privileged %cs. Let the
477 * hardware check for invalid selectors, excess privilege in
478 * other selectors, invalid %eip's and invalid %esp's.
480 cs = ucp->uc_mcontext.mc_cs;
481 if (!CS_SECURE(cs)) {
482 uprintf("pid %d (%s): sigreturn cs = 0x%x\n", p->p_pid,
484 ksiginfo_init_trap(&ksi);
485 ksi.ksi_signo = SIGBUS;
486 ksi.ksi_code = BUS_OBJERR;
487 ksi.ksi_trapno = T_PROTFLT;
488 ksi.ksi_addr = (void *)regs->tf_rip;
489 trapsignal(td, &ksi);
493 ret = set_fpcontext(td, &ucp->uc_mcontext);
495 uprintf("pid %d (%s): sigreturn set_fpcontext err %d\n",
496 p->p_pid, td->td_name, ret);
499 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(*regs));
500 pcb->pcb_fsbase = ucp->uc_mcontext.mc_fsbase;
501 pcb->pcb_gsbase = ucp->uc_mcontext.mc_gsbase;
503 #if defined(COMPAT_43)
504 if (ucp->uc_mcontext.mc_onstack & 1)
505 td->td_sigstk.ss_flags |= SS_ONSTACK;
507 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
510 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
511 set_pcb_flags(pcb, PCB_FULL_IRET);
512 return (EJUSTRETURN);
515 #ifdef COMPAT_FREEBSD4
517 freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap)
520 return sys_sigreturn(td, (struct sigreturn_args *)uap);
526 * Machine dependent boot() routine
528 * I haven't seen anything to put here yet
529 * Possibly some stuff might be grafted back here from boot()
537 * Flush the D-cache for non-DMA I/O so that the I-cache can
538 * be made coherent later.
541 cpu_flush_dcache(void *ptr, size_t len)
546 /* Get current clock frequency for the given cpu id. */
548 cpu_est_clockrate(int cpu_id, uint64_t *rate)
551 uint64_t acnt, mcnt, perf;
554 if (pcpu_find(cpu_id) == NULL || rate == NULL)
558 * If TSC is P-state invariant and APERF/MPERF MSRs do not exist,
559 * DELAY(9) based logic fails.
561 if (tsc_is_invariant && !tsc_perf_stat)
566 /* Schedule ourselves on the indicated cpu. */
567 thread_lock(curthread);
568 sched_bind(curthread, cpu_id);
569 thread_unlock(curthread);
573 /* Calibrate by measuring a short delay. */
574 reg = intr_disable();
575 if (tsc_is_invariant) {
580 mcnt = rdmsr(MSR_MPERF);
581 acnt = rdmsr(MSR_APERF);
584 perf = 1000 * acnt / mcnt;
585 *rate = (tsc2 - tsc1) * perf;
591 *rate = (tsc2 - tsc1) * 1000;
596 thread_lock(curthread);
597 sched_unbind(curthread);
598 thread_unlock(curthread);
606 * Shutdown the CPU as much as possible
615 void (*cpu_idle_hook)(void) = NULL; /* ACPI idle hook. */
616 static int cpu_ident_amdc1e = 0; /* AMD C1E supported. */
617 static int idle_mwait = 1; /* Use MONITOR/MWAIT for short idle. */
618 TUNABLE_INT("machdep.idle_mwait", &idle_mwait);
619 SYSCTL_INT(_machdep, OID_AUTO, idle_mwait, CTLFLAG_RW, &idle_mwait,
620 0, "Use MONITOR/MWAIT for short idle");
622 #define STATE_RUNNING 0x0
623 #define STATE_MWAIT 0x1
624 #define STATE_SLEEPING 0x2
627 cpu_idle_acpi(int busy)
631 state = (int *)PCPU_PTR(monitorbuf);
632 *state = STATE_SLEEPING;
634 /* See comments in cpu_idle_hlt(). */
636 if (sched_runnable())
638 else if (cpu_idle_hook)
641 __asm __volatile("sti; hlt");
642 *state = STATE_RUNNING;
646 cpu_idle_hlt(int busy)
650 state = (int *)PCPU_PTR(monitorbuf);
651 *state = STATE_SLEEPING;
654 * Since we may be in a critical section from cpu_idle(), if
655 * an interrupt fires during that critical section we may have
656 * a pending preemption. If the CPU halts, then that thread
657 * may not execute until a later interrupt awakens the CPU.
658 * To handle this race, check for a runnable thread after
659 * disabling interrupts and immediately return if one is
660 * found. Also, we must absolutely guarentee that hlt is
661 * the next instruction after sti. This ensures that any
662 * interrupt that fires after the call to disable_intr() will
663 * immediately awaken the CPU from hlt. Finally, please note
664 * that on x86 this works fine because of interrupts enabled only
665 * after the instruction following sti takes place, while IF is set
666 * to 1 immediately, allowing hlt instruction to acknowledge the
670 if (sched_runnable())
673 __asm __volatile("sti; hlt");
674 *state = STATE_RUNNING;
678 * MWAIT cpu power states. Lower 4 bits are sub-states.
680 #define MWAIT_C0 0xf0
681 #define MWAIT_C1 0x00
682 #define MWAIT_C2 0x10
683 #define MWAIT_C3 0x20
684 #define MWAIT_C4 0x30
687 cpu_idle_mwait(int busy)
691 state = (int *)PCPU_PTR(monitorbuf);
692 *state = STATE_MWAIT;
694 /* See comments in cpu_idle_hlt(). */
696 if (sched_runnable()) {
698 *state = STATE_RUNNING;
701 cpu_monitor(state, 0, 0);
702 if (*state == STATE_MWAIT)
703 __asm __volatile("sti; mwait" : : "a" (MWAIT_C1), "c" (0));
706 *state = STATE_RUNNING;
710 cpu_idle_spin(int busy)
715 state = (int *)PCPU_PTR(monitorbuf);
716 *state = STATE_RUNNING;
719 * The sched_runnable() call is racy but as long as there is
720 * a loop missing it one time will have just a little impact if any
721 * (and it is much better than missing the check at all).
723 for (i = 0; i < 1000; i++) {
724 if (sched_runnable())
731 * C1E renders the local APIC timer dead, so we disable it by
732 * reading the Interrupt Pending Message register and clearing
733 * both C1eOnCmpHalt (bit 28) and SmiOnCmpHalt (bit 27).
736 * "BIOS and Kernel Developer's Guide for AMD NPT Family 0Fh Processors"
737 * #32559 revision 3.00+
739 #define MSR_AMDK8_IPM 0xc0010055
740 #define AMDK8_SMIONCMPHALT (1ULL << 27)
741 #define AMDK8_C1EONCMPHALT (1ULL << 28)
742 #define AMDK8_CMPHALT (AMDK8_SMIONCMPHALT | AMDK8_C1EONCMPHALT)
745 cpu_probe_amdc1e(void)
749 * Detect the presence of C1E capability mostly on latest
750 * dual-cores (or future) k8 family.
752 if (cpu_vendor_id == CPU_VENDOR_AMD &&
753 (cpu_id & 0x00000f00) == 0x00000f00 &&
754 (cpu_id & 0x0fff0000) >= 0x00040000) {
755 cpu_ident_amdc1e = 1;
759 void (*cpu_idle_fn)(int) = cpu_idle_acpi;
766 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d",
769 ap_watchdog(PCPU_GET(cpuid));
771 /* If we are busy - try to use fast methods. */
773 if ((cpu_feature2 & CPUID2_MON) && idle_mwait) {
774 cpu_idle_mwait(busy);
779 /* If we have time - switch timers into idle mode. */
785 /* Apply AMD APIC timer C1E workaround. */
786 if (cpu_ident_amdc1e && cpu_disable_deep_sleep) {
787 msr = rdmsr(MSR_AMDK8_IPM);
788 if (msr & AMDK8_CMPHALT)
789 wrmsr(MSR_AMDK8_IPM, msr & ~AMDK8_CMPHALT);
792 /* Call main idle method. */
795 /* Switch timers mack into active mode. */
801 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done",
806 cpu_idle_wakeup(int cpu)
811 pcpu = pcpu_find(cpu);
812 state = (int *)pcpu->pc_monitorbuf;
814 * This doesn't need to be atomic since missing the race will
815 * simply result in unnecessary IPIs.
817 if (*state == STATE_SLEEPING)
819 if (*state == STATE_MWAIT)
820 *state = STATE_RUNNING;
825 * Ordered by speed/power consumption.
831 { cpu_idle_spin, "spin" },
832 { cpu_idle_mwait, "mwait" },
833 { cpu_idle_hlt, "hlt" },
834 { cpu_idle_acpi, "acpi" },
839 idle_sysctl_available(SYSCTL_HANDLER_ARGS)
845 avail = malloc(256, M_TEMP, M_WAITOK);
847 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
848 if (strstr(idle_tbl[i].id_name, "mwait") &&
849 (cpu_feature2 & CPUID2_MON) == 0)
851 if (strcmp(idle_tbl[i].id_name, "acpi") == 0 &&
852 cpu_idle_hook == NULL)
854 p += sprintf(p, "%s%s", p != avail ? ", " : "",
855 idle_tbl[i].id_name);
857 error = sysctl_handle_string(oidp, avail, 0, req);
862 SYSCTL_PROC(_machdep, OID_AUTO, idle_available, CTLTYPE_STRING | CTLFLAG_RD,
863 0, 0, idle_sysctl_available, "A", "list of available idle functions");
866 idle_sysctl(SYSCTL_HANDLER_ARGS)
874 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
875 if (idle_tbl[i].id_fn == cpu_idle_fn) {
876 p = idle_tbl[i].id_name;
880 strncpy(buf, p, sizeof(buf));
881 error = sysctl_handle_string(oidp, buf, sizeof(buf), req);
882 if (error != 0 || req->newptr == NULL)
884 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
885 if (strstr(idle_tbl[i].id_name, "mwait") &&
886 (cpu_feature2 & CPUID2_MON) == 0)
888 if (strcmp(idle_tbl[i].id_name, "acpi") == 0 &&
889 cpu_idle_hook == NULL)
891 if (strcmp(idle_tbl[i].id_name, buf))
893 cpu_idle_fn = idle_tbl[i].id_fn;
899 SYSCTL_PROC(_machdep, OID_AUTO, idle, CTLTYPE_STRING | CTLFLAG_RW, 0, 0,
900 idle_sysctl, "A", "currently selected idle function");
903 * Reset registers to default values on exec.
906 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
908 struct trapframe *regs = td->td_frame;
909 struct pcb *pcb = td->td_pcb;
912 if (td->td_proc->p_md.md_ldt != NULL)
915 mtx_unlock(&dt_lock);
919 clear_pcb_flags(pcb, PCB_32BIT | PCB_GS32BIT);
920 pcb->pcb_initial_fpucw = __INITIAL_FPUCW__;
921 set_pcb_flags(pcb, PCB_FULL_IRET);
923 bzero((char *)regs, sizeof(struct trapframe));
924 regs->tf_rip = imgp->entry_addr;
925 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8;
926 regs->tf_rdi = stack; /* argv */
927 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T);
928 regs->tf_ss = _udatasel;
929 regs->tf_cs = _ucodesel;
930 regs->tf_ds = _udatasel;
931 regs->tf_es = _udatasel;
932 regs->tf_fs = _ufssel;
933 regs->tf_gs = _ugssel;
934 regs->tf_flags = TF_HASSEGS;
935 td->td_retval[1] = 0;
938 * Reset the hardware debug registers if they were in use.
939 * They won't have any meaning for the newly exec'd process.
941 if (pcb->pcb_flags & PCB_DBREGS) {
948 if (pcb == PCPU_GET(curpcb)) {
950 * Clear the debug registers on the running
951 * CPU, otherwise they will end up affecting
952 * the next process we switch to.
956 clear_pcb_flags(pcb, PCB_DBREGS);
960 * Drop the FP state if we hold it, so that the process gets a
961 * clean FP state if it uses the FPU again.
973 * CR0_MP, CR0_NE and CR0_TS are also set by npx_probe() for the
974 * BSP. See the comments there about why we set them.
976 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM;
981 * Initialize amd64 and configure to run kernel
985 * Initialize segments & interrupt table
988 struct user_segment_descriptor gdt[NGDT * MAXCPU];/* global descriptor tables */
989 static struct gate_descriptor idt0[NIDT];
990 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
992 static char dblfault_stack[PAGE_SIZE] __aligned(16);
994 static char nmi0_stack[PAGE_SIZE] __aligned(16);
995 CTASSERT(sizeof(struct nmi_pcpu) == 16);
997 struct amd64tss common_tss[MAXCPU];
1000 * Software prototypes -- in more palatable form.
1002 * Keep GUFS32, GUGS32, GUCODE32 and GUDATA at the same
1003 * slots as corresponding segments for i386 kernel.
1005 struct soft_segment_descriptor gdt_segs[] = {
1006 /* GNULL_SEL 0 Null Descriptor */
1015 /* GNULL2_SEL 1 Null Descriptor */
1024 /* GUFS32_SEL 2 32 bit %gs Descriptor for user */
1026 .ssd_limit = 0xfffff,
1027 .ssd_type = SDT_MEMRWA,
1033 /* GUGS32_SEL 3 32 bit %fs Descriptor for user */
1035 .ssd_limit = 0xfffff,
1036 .ssd_type = SDT_MEMRWA,
1042 /* GCODE_SEL 4 Code Descriptor for kernel */
1044 .ssd_limit = 0xfffff,
1045 .ssd_type = SDT_MEMERA,
1051 /* GDATA_SEL 5 Data Descriptor for kernel */
1053 .ssd_limit = 0xfffff,
1054 .ssd_type = SDT_MEMRWA,
1060 /* GUCODE32_SEL 6 32 bit Code Descriptor for user */
1062 .ssd_limit = 0xfffff,
1063 .ssd_type = SDT_MEMERA,
1069 /* GUDATA_SEL 7 32/64 bit Data Descriptor for user */
1071 .ssd_limit = 0xfffff,
1072 .ssd_type = SDT_MEMRWA,
1078 /* GUCODE_SEL 8 64 bit Code Descriptor for user */
1080 .ssd_limit = 0xfffff,
1081 .ssd_type = SDT_MEMERA,
1087 /* GPROC0_SEL 9 Proc 0 Tss Descriptor */
1089 .ssd_limit = sizeof(struct amd64tss) + IOPAGES * PAGE_SIZE - 1,
1090 .ssd_type = SDT_SYSTSS,
1096 /* Actually, the TSS is a system descriptor which is double size */
1105 /* GUSERLDT_SEL 11 LDT Descriptor */
1114 /* GUSERLDT_SEL 12 LDT Descriptor, double size */
1126 setidt(idx, func, typ, dpl, ist)
1133 struct gate_descriptor *ip;
1136 ip->gd_looffset = (uintptr_t)func;
1137 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL);
1143 ip->gd_hioffset = ((uintptr_t)func)>>16 ;
1147 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1148 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1149 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1150 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1151 IDTVEC(xmm), IDTVEC(dblfault),
1152 #ifdef KDTRACE_HOOKS
1155 IDTVEC(fast_syscall), IDTVEC(fast_syscall32);
1159 * Display the index and function name of any IDT entries that don't use
1160 * the default 'rsvd' entry point.
1162 DB_SHOW_COMMAND(idt, db_show_idt)
1164 struct gate_descriptor *ip;
1169 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) {
1170 func = ((long)ip->gd_hioffset << 16 | ip->gd_looffset);
1171 if (func != (uintptr_t)&IDTVEC(rsvd)) {
1172 db_printf("%3d\t", idx);
1173 db_printsym(func, DB_STGY_PROC);
1183 struct user_segment_descriptor *sd;
1184 struct soft_segment_descriptor *ssd;
1187 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1188 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1189 ssd->ssd_type = sd->sd_type;
1190 ssd->ssd_dpl = sd->sd_dpl;
1191 ssd->ssd_p = sd->sd_p;
1192 ssd->ssd_long = sd->sd_long;
1193 ssd->ssd_def32 = sd->sd_def32;
1194 ssd->ssd_gran = sd->sd_gran;
1199 struct soft_segment_descriptor *ssd;
1200 struct user_segment_descriptor *sd;
1203 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1204 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff;
1205 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1206 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1207 sd->sd_type = ssd->ssd_type;
1208 sd->sd_dpl = ssd->ssd_dpl;
1209 sd->sd_p = ssd->ssd_p;
1210 sd->sd_long = ssd->ssd_long;
1211 sd->sd_def32 = ssd->ssd_def32;
1212 sd->sd_gran = ssd->ssd_gran;
1217 struct soft_segment_descriptor *ssd;
1218 struct system_segment_descriptor *sd;
1221 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1222 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful;
1223 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1224 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1225 sd->sd_type = ssd->ssd_type;
1226 sd->sd_dpl = ssd->ssd_dpl;
1227 sd->sd_p = ssd->ssd_p;
1228 sd->sd_gran = ssd->ssd_gran;
1231 #if !defined(DEV_ATPIC) && defined(DEV_ISA)
1232 #include <isa/isavar.h>
1233 #include <isa/isareg.h>
1235 * Return a bitmap of the current interrupt requests. This is 8259-specific
1236 * and is only suitable for use at probe time.
1237 * This is only here to pacify sio. It is NOT FATAL if this doesn't work.
1238 * It shouldn't be here. There should probably be an APIC centric
1239 * implementation in the apic driver code, if at all.
1242 isa_irq_pending(void)
1247 irr1 = inb(IO_ICU1);
1248 irr2 = inb(IO_ICU2);
1249 return ((irr2 << 8) | irr1);
1256 add_smap_entry(struct bios_smap *smap, vm_paddr_t *physmap, int *physmap_idxp)
1258 int i, insert_idx, physmap_idx;
1260 physmap_idx = *physmap_idxp;
1262 if (boothowto & RB_VERBOSE)
1263 printf("SMAP type=%02x base=%016lx len=%016lx\n",
1264 smap->type, smap->base, smap->length);
1266 if (smap->type != SMAP_TYPE_MEMORY)
1269 if (smap->length == 0)
1273 * Find insertion point while checking for overlap. Start off by
1274 * assuming the new entry will be added to the end.
1276 insert_idx = physmap_idx + 2;
1277 for (i = 0; i <= physmap_idx; i += 2) {
1278 if (smap->base < physmap[i + 1]) {
1279 if (smap->base + smap->length <= physmap[i]) {
1283 if (boothowto & RB_VERBOSE)
1285 "Overlapping memory regions, ignoring second region\n");
1290 /* See if we can prepend to the next entry. */
1291 if (insert_idx <= physmap_idx &&
1292 smap->base + smap->length == physmap[insert_idx]) {
1293 physmap[insert_idx] = smap->base;
1297 /* See if we can append to the previous entry. */
1298 if (insert_idx > 0 && smap->base == physmap[insert_idx - 1]) {
1299 physmap[insert_idx - 1] += smap->length;
1304 *physmap_idxp = physmap_idx;
1305 if (physmap_idx == PHYSMAP_SIZE) {
1307 "Too many segments in the physical address map, giving up\n");
1312 * Move the last 'N' entries down to make room for the new
1315 for (i = physmap_idx; i > insert_idx; i -= 2) {
1316 physmap[i] = physmap[i - 2];
1317 physmap[i + 1] = physmap[i - 1];
1320 /* Insert the new entry. */
1321 physmap[insert_idx] = smap->base;
1322 physmap[insert_idx + 1] = smap->base + smap->length;
1327 * Populate the (physmap) array with base/bound pairs describing the
1328 * available physical memory in the system, then test this memory and
1329 * build the phys_avail array describing the actually-available memory.
1331 * Total memory size may be set by the kernel environment variable
1332 * hw.physmem or the compile-time define MAXMEM.
1334 * XXX first should be vm_paddr_t.
1337 getmemsize(caddr_t kmdp, u_int64_t first)
1339 int i, physmap_idx, pa_indx, da_indx;
1340 vm_paddr_t pa, physmap[PHYSMAP_SIZE];
1341 u_long physmem_tunable, memtest;
1343 struct bios_smap *smapbase, *smap, *smapend;
1345 quad_t dcons_addr, dcons_size;
1347 bzero(physmap, sizeof(physmap));
1352 * get memory map from INT 15:E820, kindly supplied by the loader.
1354 * subr_module.c says:
1355 * "Consumer may safely assume that size value precedes data."
1356 * ie: an int32_t immediately precedes smap.
1358 smapbase = (struct bios_smap *)preload_search_info(kmdp,
1359 MODINFO_METADATA | MODINFOMD_SMAP);
1360 if (smapbase == NULL)
1361 panic("No BIOS smap info from loader!");
1363 smapsize = *((u_int32_t *)smapbase - 1);
1364 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
1366 for (smap = smapbase; smap < smapend; smap++)
1367 if (!add_smap_entry(smap, physmap, &physmap_idx))
1371 * Find the 'base memory' segment for SMP
1374 for (i = 0; i <= physmap_idx; i += 2) {
1375 if (physmap[i] == 0x00000000) {
1376 basemem = physmap[i + 1] / 1024;
1381 panic("BIOS smap did not include a basemem segment!");
1384 /* make hole for AP bootstrap code */
1385 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1389 * Maxmem isn't the "maximum memory", it's one larger than the
1390 * highest page of the physical address space. It should be
1391 * called something like "Maxphyspage". We may adjust this
1392 * based on ``hw.physmem'' and the results of the memory test.
1394 Maxmem = atop(physmap[physmap_idx + 1]);
1397 Maxmem = MAXMEM / 4;
1400 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
1401 Maxmem = atop(physmem_tunable);
1404 * By default enable the memory test on real hardware, and disable
1405 * it if we appear to be running in a VM. This avoids touching all
1406 * pages unnecessarily, which doesn't matter on real hardware but is
1407 * bad for shared VM hosts. Use a general name so that
1408 * one could eventually do more with the code than just disable it.
1410 memtest = (vm_guest > VM_GUEST_NO) ? 0 : 1;
1411 TUNABLE_ULONG_FETCH("hw.memtest.tests", &memtest);
1414 * Don't allow MAXMEM or hw.physmem to extend the amount of memory
1417 if (Maxmem > atop(physmap[physmap_idx + 1]))
1418 Maxmem = atop(physmap[physmap_idx + 1]);
1420 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1421 (boothowto & RB_VERBOSE))
1422 printf("Physical memory use set to %ldK\n", Maxmem * 4);
1424 /* call pmap initialization to make new kernel address space */
1425 pmap_bootstrap(&first);
1428 * Size up each available chunk of physical memory.
1430 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1433 phys_avail[pa_indx++] = physmap[0];
1434 phys_avail[pa_indx] = physmap[0];
1435 dump_avail[da_indx] = physmap[0];
1439 * Get dcons buffer address
1441 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
1442 getenv_quad("dcons.size", &dcons_size) == 0)
1446 * physmap is in bytes, so when converting to page boundaries,
1447 * round up the start address and round down the end address.
1449 for (i = 0; i <= physmap_idx; i += 2) {
1452 end = ptoa((vm_paddr_t)Maxmem);
1453 if (physmap[i + 1] < end)
1454 end = trunc_page(physmap[i + 1]);
1455 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1456 int tmp, page_bad, full;
1457 int *ptr = (int *)CADDR1;
1461 * block out kernel memory as not available.
1463 if (pa >= (vm_paddr_t)kernphys && pa < first)
1467 * block out dcons buffer
1470 && pa >= trunc_page(dcons_addr)
1471 && pa < dcons_addr + dcons_size)
1479 * map page into kernel: valid, read/write,non-cacheable
1481 *pte = pa | PG_V | PG_RW | PG_N;
1486 * Test for alternating 1's and 0's
1488 *(volatile int *)ptr = 0xaaaaaaaa;
1489 if (*(volatile int *)ptr != 0xaaaaaaaa)
1492 * Test for alternating 0's and 1's
1494 *(volatile int *)ptr = 0x55555555;
1495 if (*(volatile int *)ptr != 0x55555555)
1500 *(volatile int *)ptr = 0xffffffff;
1501 if (*(volatile int *)ptr != 0xffffffff)
1506 *(volatile int *)ptr = 0x0;
1507 if (*(volatile int *)ptr != 0x0)
1510 * Restore original value.
1516 * Adjust array of valid/good pages.
1518 if (page_bad == TRUE)
1521 * If this good page is a continuation of the
1522 * previous set of good pages, then just increase
1523 * the end pointer. Otherwise start a new chunk.
1524 * Note that "end" points one higher than end,
1525 * making the range >= start and < end.
1526 * If we're also doing a speculative memory
1527 * test and we at or past the end, bump up Maxmem
1528 * so that we keep going. The first bad page
1529 * will terminate the loop.
1531 if (phys_avail[pa_indx] == pa) {
1532 phys_avail[pa_indx] += PAGE_SIZE;
1535 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1537 "Too many holes in the physical address space, giving up\n");
1542 phys_avail[pa_indx++] = pa; /* start */
1543 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1547 if (dump_avail[da_indx] == pa) {
1548 dump_avail[da_indx] += PAGE_SIZE;
1551 if (da_indx == DUMP_AVAIL_ARRAY_END) {
1555 dump_avail[da_indx++] = pa; /* start */
1556 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
1568 * The last chunk must contain at least one page plus the message
1569 * buffer to avoid complicating other code (message buffer address
1570 * calculation, etc.).
1572 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1573 round_page(msgbufsize) >= phys_avail[pa_indx]) {
1574 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1575 phys_avail[pa_indx--] = 0;
1576 phys_avail[pa_indx--] = 0;
1579 Maxmem = atop(phys_avail[pa_indx]);
1581 /* Trim off space for the message buffer. */
1582 phys_avail[pa_indx] -= round_page(msgbufsize);
1584 /* Map the message buffer. */
1585 msgbufp = (struct msgbuf *)PHYS_TO_DMAP(phys_avail[pa_indx]);
1589 hammer_time(u_int64_t modulep, u_int64_t physfree)
1594 struct nmi_pcpu *np;
1599 thread0.td_kstack = physfree + KERNBASE;
1600 thread0.td_kstack_pages = KSTACK_PAGES;
1601 kstack0_sz = thread0.td_kstack_pages * PAGE_SIZE;
1602 bzero((void *)thread0.td_kstack, kstack0_sz);
1603 physfree += kstack0_sz;
1604 thread0.td_pcb = (struct pcb *)(thread0.td_kstack + kstack0_sz) - 1;
1607 * This may be done better later if it gets more high level
1608 * components in it. If so just link td->td_proc here.
1610 proc_linkup0(&proc0, &thread0);
1612 preload_metadata = (caddr_t)(uintptr_t)(modulep + KERNBASE);
1613 preload_bootstrap_relocate(KERNBASE);
1614 kmdp = preload_search_by_type("elf kernel");
1616 kmdp = preload_search_by_type("elf64 kernel");
1617 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
1618 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *) + KERNBASE;
1620 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
1621 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
1624 /* Init basic tunables, hz etc */
1628 * make gdt memory segments
1630 for (x = 0; x < NGDT; x++) {
1631 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1) &&
1632 x != GUSERLDT_SEL && x != (GUSERLDT_SEL) + 1)
1633 ssdtosd(&gdt_segs[x], &gdt[x]);
1635 gdt_segs[GPROC0_SEL].ssd_base = (uintptr_t)&common_tss[0];
1636 ssdtosyssd(&gdt_segs[GPROC0_SEL],
1637 (struct system_segment_descriptor *)&gdt[GPROC0_SEL]);
1639 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1640 r_gdt.rd_base = (long) gdt;
1644 wrmsr(MSR_FSBASE, 0); /* User value */
1645 wrmsr(MSR_GSBASE, (u_int64_t)pc);
1646 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */
1648 pcpu_init(pc, 0, sizeof(struct pcpu));
1649 dpcpu_init((void *)(physfree + KERNBASE), 0);
1650 physfree += DPCPU_SIZE;
1651 PCPU_SET(prvspace, pc);
1652 PCPU_SET(curthread, &thread0);
1653 PCPU_SET(curpcb, thread0.td_pcb);
1654 PCPU_SET(tssp, &common_tss[0]);
1655 PCPU_SET(commontssp, &common_tss[0]);
1656 PCPU_SET(tss, (struct system_segment_descriptor *)&gdt[GPROC0_SEL]);
1657 PCPU_SET(ldt, (struct system_segment_descriptor *)&gdt[GUSERLDT_SEL]);
1658 PCPU_SET(fs32p, &gdt[GUFS32_SEL]);
1659 PCPU_SET(gs32p, &gdt[GUGS32_SEL]);
1662 * Initialize mutexes.
1664 * icu_lock: in order to allow an interrupt to occur in a critical
1665 * section, to set pcpu->ipending (etc...) properly, we
1666 * must be able to get the icu lock, so it can't be
1670 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS);
1671 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_DEF);
1674 for (x = 0; x < NIDT; x++)
1675 setidt(x, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0);
1676 setidt(IDT_DE, &IDTVEC(div), SDT_SYSIGT, SEL_KPL, 0);
1677 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYSIGT, SEL_KPL, 0);
1678 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 2);
1679 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYSIGT, SEL_UPL, 0);
1680 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYSIGT, SEL_KPL, 0);
1681 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYSIGT, SEL_KPL, 0);
1682 setidt(IDT_UD, &IDTVEC(ill), SDT_SYSIGT, SEL_KPL, 0);
1683 setidt(IDT_NM, &IDTVEC(dna), SDT_SYSIGT, SEL_KPL, 0);
1684 setidt(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1);
1685 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYSIGT, SEL_KPL, 0);
1686 setidt(IDT_TS, &IDTVEC(tss), SDT_SYSIGT, SEL_KPL, 0);
1687 setidt(IDT_NP, &IDTVEC(missing), SDT_SYSIGT, SEL_KPL, 0);
1688 setidt(IDT_SS, &IDTVEC(stk), SDT_SYSIGT, SEL_KPL, 0);
1689 setidt(IDT_GP, &IDTVEC(prot), SDT_SYSIGT, SEL_KPL, 0);
1690 setidt(IDT_PF, &IDTVEC(page), SDT_SYSIGT, SEL_KPL, 0);
1691 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYSIGT, SEL_KPL, 0);
1692 setidt(IDT_AC, &IDTVEC(align), SDT_SYSIGT, SEL_KPL, 0);
1693 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 0);
1694 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYSIGT, SEL_KPL, 0);
1695 #ifdef KDTRACE_HOOKS
1696 setidt(IDT_DTRACE_RET, &IDTVEC(dtrace_ret), SDT_SYSIGT, SEL_UPL, 0);
1699 r_idt.rd_limit = sizeof(idt0) - 1;
1700 r_idt.rd_base = (long) idt;
1704 * Initialize the i8254 before the console so that console
1705 * initialization can use DELAY().
1710 * Initialize the console before we print anything out.
1719 /* Reset and mask the atpics and leave them shut down. */
1723 * Point the ICU spurious interrupt vectors at the APIC spurious
1724 * interrupt handler.
1726 setidt(IDT_IO_INTS + 7, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0);
1727 setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0);
1730 #error "have you forgotten the isa device?";
1736 if (boothowto & RB_KDB)
1737 kdb_enter(KDB_WHY_BOOTFLAGS,
1738 "Boot flags requested debugger");
1741 identify_cpu(); /* Final stage of CPU initialization */
1742 initializecpu(); /* Initialize CPU registers */
1743 initializecpucache();
1745 /* make an initial tss so cpu can get interrupt stack on syscall! */
1746 common_tss[0].tss_rsp0 = thread0.td_kstack +
1747 kstack0_sz - sizeof(struct pcb);
1748 /* Ensure the stack is aligned to 16 bytes */
1749 common_tss[0].tss_rsp0 &= ~0xFul;
1750 PCPU_SET(rsp0, common_tss[0].tss_rsp0);
1752 /* doublefault stack space, runs on ist1 */
1753 common_tss[0].tss_ist1 = (long)&dblfault_stack[sizeof(dblfault_stack)];
1756 * NMI stack, runs on ist2. The pcpu pointer is stored just
1757 * above the start of the ist2 stack.
1759 np = ((struct nmi_pcpu *) &nmi0_stack[sizeof(nmi0_stack)]) - 1;
1760 np->np_pcpu = (register_t) pc;
1761 common_tss[0].tss_ist2 = (long) np;
1763 /* Set the IO permission bitmap (empty due to tss seg limit) */
1764 common_tss[0].tss_iobase = sizeof(struct amd64tss) +
1765 IOPAGES * PAGE_SIZE;
1767 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
1770 /* Set up the fast syscall stuff */
1771 msr = rdmsr(MSR_EFER) | EFER_SCE;
1772 wrmsr(MSR_EFER, msr);
1773 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall));
1774 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32));
1775 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) |
1776 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48);
1777 wrmsr(MSR_STAR, msr);
1778 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D);
1780 getmemsize(kmdp, physfree);
1781 init_param2(physmem);
1783 /* now running on new page tables, configured,and u/iom is accessible */
1785 msgbufinit(msgbufp, msgbufsize);
1788 /* transfer to user mode */
1790 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
1791 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
1792 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL);
1793 _ufssel = GSEL(GUFS32_SEL, SEL_UPL);
1794 _ugssel = GSEL(GUGS32_SEL, SEL_UPL);
1800 /* setup proc 0's pcb */
1801 thread0.td_pcb->pcb_flags = 0;
1802 thread0.td_pcb->pcb_cr3 = KPML4phys;
1803 thread0.td_frame = &proc0_tf;
1805 env = getenv("kernelname");
1807 strlcpy(kernelname, env, sizeof(kernelname));
1810 if (inw(0x10) == 0x49d2) {
1812 printf("Xen detected: disabling emulated block and network devices\n");
1819 /* Location of kernel stack for locore */
1820 return ((u_int64_t)thread0.td_pcb);
1824 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
1827 pcpu->pc_acpi_id = 0xffffffff;
1831 spinlock_enter(void)
1837 if (td->td_md.md_spinlock_count == 0) {
1838 flags = intr_disable();
1839 td->td_md.md_spinlock_count = 1;
1840 td->td_md.md_saved_flags = flags;
1842 td->td_md.md_spinlock_count++;
1854 flags = td->td_md.md_saved_flags;
1855 td->td_md.md_spinlock_count--;
1856 if (td->td_md.md_spinlock_count == 0)
1857 intr_restore(flags);
1861 * Construct a PCB from a trapframe. This is called from kdb_trap() where
1862 * we want to start a backtrace from the function that caused us to enter
1863 * the debugger. We have the context in the trapframe, but base the trace
1864 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
1865 * enough for a backtrace.
1868 makectx(struct trapframe *tf, struct pcb *pcb)
1871 pcb->pcb_r12 = tf->tf_r12;
1872 pcb->pcb_r13 = tf->tf_r13;
1873 pcb->pcb_r14 = tf->tf_r14;
1874 pcb->pcb_r15 = tf->tf_r15;
1875 pcb->pcb_rbp = tf->tf_rbp;
1876 pcb->pcb_rbx = tf->tf_rbx;
1877 pcb->pcb_rip = tf->tf_rip;
1878 pcb->pcb_rsp = tf->tf_rsp;
1882 ptrace_set_pc(struct thread *td, unsigned long addr)
1884 td->td_frame->tf_rip = addr;
1889 ptrace_single_step(struct thread *td)
1891 td->td_frame->tf_rflags |= PSL_T;
1896 ptrace_clear_single_step(struct thread *td)
1898 td->td_frame->tf_rflags &= ~PSL_T;
1903 fill_regs(struct thread *td, struct reg *regs)
1905 struct trapframe *tp;
1908 return (fill_frame_regs(tp, regs));
1912 fill_frame_regs(struct trapframe *tp, struct reg *regs)
1914 regs->r_r15 = tp->tf_r15;
1915 regs->r_r14 = tp->tf_r14;
1916 regs->r_r13 = tp->tf_r13;
1917 regs->r_r12 = tp->tf_r12;
1918 regs->r_r11 = tp->tf_r11;
1919 regs->r_r10 = tp->tf_r10;
1920 regs->r_r9 = tp->tf_r9;
1921 regs->r_r8 = tp->tf_r8;
1922 regs->r_rdi = tp->tf_rdi;
1923 regs->r_rsi = tp->tf_rsi;
1924 regs->r_rbp = tp->tf_rbp;
1925 regs->r_rbx = tp->tf_rbx;
1926 regs->r_rdx = tp->tf_rdx;
1927 regs->r_rcx = tp->tf_rcx;
1928 regs->r_rax = tp->tf_rax;
1929 regs->r_rip = tp->tf_rip;
1930 regs->r_cs = tp->tf_cs;
1931 regs->r_rflags = tp->tf_rflags;
1932 regs->r_rsp = tp->tf_rsp;
1933 regs->r_ss = tp->tf_ss;
1934 if (tp->tf_flags & TF_HASSEGS) {
1935 regs->r_ds = tp->tf_ds;
1936 regs->r_es = tp->tf_es;
1937 regs->r_fs = tp->tf_fs;
1938 regs->r_gs = tp->tf_gs;
1949 set_regs(struct thread *td, struct reg *regs)
1951 struct trapframe *tp;
1955 rflags = regs->r_rflags & 0xffffffff;
1956 if (!EFL_SECURE(rflags, tp->tf_rflags) || !CS_SECURE(regs->r_cs))
1958 tp->tf_r15 = regs->r_r15;
1959 tp->tf_r14 = regs->r_r14;
1960 tp->tf_r13 = regs->r_r13;
1961 tp->tf_r12 = regs->r_r12;
1962 tp->tf_r11 = regs->r_r11;
1963 tp->tf_r10 = regs->r_r10;
1964 tp->tf_r9 = regs->r_r9;
1965 tp->tf_r8 = regs->r_r8;
1966 tp->tf_rdi = regs->r_rdi;
1967 tp->tf_rsi = regs->r_rsi;
1968 tp->tf_rbp = regs->r_rbp;
1969 tp->tf_rbx = regs->r_rbx;
1970 tp->tf_rdx = regs->r_rdx;
1971 tp->tf_rcx = regs->r_rcx;
1972 tp->tf_rax = regs->r_rax;
1973 tp->tf_rip = regs->r_rip;
1974 tp->tf_cs = regs->r_cs;
1975 tp->tf_rflags = rflags;
1976 tp->tf_rsp = regs->r_rsp;
1977 tp->tf_ss = regs->r_ss;
1978 if (0) { /* XXXKIB */
1979 tp->tf_ds = regs->r_ds;
1980 tp->tf_es = regs->r_es;
1981 tp->tf_fs = regs->r_fs;
1982 tp->tf_gs = regs->r_gs;
1983 tp->tf_flags = TF_HASSEGS;
1984 set_pcb_flags(td->td_pcb, PCB_FULL_IRET);
1989 /* XXX check all this stuff! */
1990 /* externalize from sv_xmm */
1992 fill_fpregs_xmm(struct savefpu *sv_xmm, struct fpreg *fpregs)
1994 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env;
1995 struct envxmm *penv_xmm = &sv_xmm->sv_env;
1999 bzero(fpregs, sizeof(*fpregs));
2001 /* FPU control/status */
2002 penv_fpreg->en_cw = penv_xmm->en_cw;
2003 penv_fpreg->en_sw = penv_xmm->en_sw;
2004 penv_fpreg->en_tw = penv_xmm->en_tw;
2005 penv_fpreg->en_opcode = penv_xmm->en_opcode;
2006 penv_fpreg->en_rip = penv_xmm->en_rip;
2007 penv_fpreg->en_rdp = penv_xmm->en_rdp;
2008 penv_fpreg->en_mxcsr = penv_xmm->en_mxcsr;
2009 penv_fpreg->en_mxcsr_mask = penv_xmm->en_mxcsr_mask;
2012 for (i = 0; i < 8; ++i)
2013 bcopy(sv_xmm->sv_fp[i].fp_acc.fp_bytes, fpregs->fpr_acc[i], 10);
2016 for (i = 0; i < 16; ++i)
2017 bcopy(sv_xmm->sv_xmm[i].xmm_bytes, fpregs->fpr_xacc[i], 16);
2020 /* internalize from fpregs into sv_xmm */
2022 set_fpregs_xmm(struct fpreg *fpregs, struct savefpu *sv_xmm)
2024 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2025 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env;
2029 /* FPU control/status */
2030 penv_xmm->en_cw = penv_fpreg->en_cw;
2031 penv_xmm->en_sw = penv_fpreg->en_sw;
2032 penv_xmm->en_tw = penv_fpreg->en_tw;
2033 penv_xmm->en_opcode = penv_fpreg->en_opcode;
2034 penv_xmm->en_rip = penv_fpreg->en_rip;
2035 penv_xmm->en_rdp = penv_fpreg->en_rdp;
2036 penv_xmm->en_mxcsr = penv_fpreg->en_mxcsr;
2037 penv_xmm->en_mxcsr_mask = penv_fpreg->en_mxcsr_mask & cpu_mxcsr_mask;
2040 for (i = 0; i < 8; ++i)
2041 bcopy(fpregs->fpr_acc[i], sv_xmm->sv_fp[i].fp_acc.fp_bytes, 10);
2044 for (i = 0; i < 16; ++i)
2045 bcopy(fpregs->fpr_xacc[i], sv_xmm->sv_xmm[i].xmm_bytes, 16);
2048 /* externalize from td->pcb */
2050 fill_fpregs(struct thread *td, struct fpreg *fpregs)
2053 KASSERT(td == curthread || TD_IS_SUSPENDED(td) ||
2054 P_SHOULDSTOP(td->td_proc),
2055 ("not suspended thread %p", td));
2057 fill_fpregs_xmm(&td->td_pcb->pcb_user_save, fpregs);
2061 /* internalize to td->pcb */
2063 set_fpregs(struct thread *td, struct fpreg *fpregs)
2066 set_fpregs_xmm(fpregs, &td->td_pcb->pcb_user_save);
2072 * Get machine context.
2075 get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
2078 struct trapframe *tp;
2082 PROC_LOCK(curthread->td_proc);
2083 mcp->mc_onstack = sigonstack(tp->tf_rsp);
2084 PROC_UNLOCK(curthread->td_proc);
2085 mcp->mc_r15 = tp->tf_r15;
2086 mcp->mc_r14 = tp->tf_r14;
2087 mcp->mc_r13 = tp->tf_r13;
2088 mcp->mc_r12 = tp->tf_r12;
2089 mcp->mc_r11 = tp->tf_r11;
2090 mcp->mc_r10 = tp->tf_r10;
2091 mcp->mc_r9 = tp->tf_r9;
2092 mcp->mc_r8 = tp->tf_r8;
2093 mcp->mc_rdi = tp->tf_rdi;
2094 mcp->mc_rsi = tp->tf_rsi;
2095 mcp->mc_rbp = tp->tf_rbp;
2096 mcp->mc_rbx = tp->tf_rbx;
2097 mcp->mc_rcx = tp->tf_rcx;
2098 mcp->mc_rflags = tp->tf_rflags;
2099 if (flags & GET_MC_CLEAR_RET) {
2102 mcp->mc_rflags &= ~PSL_C;
2104 mcp->mc_rax = tp->tf_rax;
2105 mcp->mc_rdx = tp->tf_rdx;
2107 mcp->mc_rip = tp->tf_rip;
2108 mcp->mc_cs = tp->tf_cs;
2109 mcp->mc_rsp = tp->tf_rsp;
2110 mcp->mc_ss = tp->tf_ss;
2111 mcp->mc_ds = tp->tf_ds;
2112 mcp->mc_es = tp->tf_es;
2113 mcp->mc_fs = tp->tf_fs;
2114 mcp->mc_gs = tp->tf_gs;
2115 mcp->mc_flags = tp->tf_flags;
2116 mcp->mc_len = sizeof(*mcp);
2117 get_fpcontext(td, mcp);
2118 mcp->mc_fsbase = pcb->pcb_fsbase;
2119 mcp->mc_gsbase = pcb->pcb_gsbase;
2120 bzero(mcp->mc_spare, sizeof(mcp->mc_spare));
2125 * Set machine context.
2127 * However, we don't set any but the user modifiable flags, and we won't
2128 * touch the cs selector.
2131 set_mcontext(struct thread *td, const mcontext_t *mcp)
2134 struct trapframe *tp;
2140 if (mcp->mc_len != sizeof(*mcp) ||
2141 (mcp->mc_flags & ~_MC_FLAG_MASK) != 0)
2143 rflags = (mcp->mc_rflags & PSL_USERCHANGE) |
2144 (tp->tf_rflags & ~PSL_USERCHANGE);
2145 ret = set_fpcontext(td, mcp);
2148 tp->tf_r15 = mcp->mc_r15;
2149 tp->tf_r14 = mcp->mc_r14;
2150 tp->tf_r13 = mcp->mc_r13;
2151 tp->tf_r12 = mcp->mc_r12;
2152 tp->tf_r11 = mcp->mc_r11;
2153 tp->tf_r10 = mcp->mc_r10;
2154 tp->tf_r9 = mcp->mc_r9;
2155 tp->tf_r8 = mcp->mc_r8;
2156 tp->tf_rdi = mcp->mc_rdi;
2157 tp->tf_rsi = mcp->mc_rsi;
2158 tp->tf_rbp = mcp->mc_rbp;
2159 tp->tf_rbx = mcp->mc_rbx;
2160 tp->tf_rdx = mcp->mc_rdx;
2161 tp->tf_rcx = mcp->mc_rcx;
2162 tp->tf_rax = mcp->mc_rax;
2163 tp->tf_rip = mcp->mc_rip;
2164 tp->tf_rflags = rflags;
2165 tp->tf_rsp = mcp->mc_rsp;
2166 tp->tf_ss = mcp->mc_ss;
2167 tp->tf_flags = mcp->mc_flags;
2168 if (tp->tf_flags & TF_HASSEGS) {
2169 tp->tf_ds = mcp->mc_ds;
2170 tp->tf_es = mcp->mc_es;
2171 tp->tf_fs = mcp->mc_fs;
2172 tp->tf_gs = mcp->mc_gs;
2174 if (mcp->mc_flags & _MC_HASBASES) {
2175 pcb->pcb_fsbase = mcp->mc_fsbase;
2176 pcb->pcb_gsbase = mcp->mc_gsbase;
2178 set_pcb_flags(pcb, PCB_FULL_IRET);
2183 get_fpcontext(struct thread *td, mcontext_t *mcp)
2186 mcp->mc_ownedfp = fpugetregs(td);
2187 bcopy(&td->td_pcb->pcb_user_save, &mcp->mc_fpstate,
2188 sizeof(mcp->mc_fpstate));
2189 mcp->mc_fpformat = fpuformat();
2193 set_fpcontext(struct thread *td, const mcontext_t *mcp)
2195 struct savefpu *fpstate;
2197 if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
2199 else if (mcp->mc_fpformat != _MC_FPFMT_XMM)
2201 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE)
2202 /* We don't care what state is left in the FPU or PCB. */
2204 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
2205 mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
2206 fpstate = (struct savefpu *)&mcp->mc_fpstate;
2207 fpstate->sv_env.en_mxcsr &= cpu_mxcsr_mask;
2208 fpusetregs(td, fpstate);
2215 fpstate_drop(struct thread *td)
2218 KASSERT(PCB_USER_FPU(td->td_pcb), ("fpstate_drop: kernel-owned fpu"));
2220 if (PCPU_GET(fpcurthread) == td)
2223 * XXX force a full drop of the fpu. The above only drops it if we
2226 * XXX I don't much like fpugetuserregs()'s semantics of doing a full
2227 * drop. Dropping only to the pcb matches fnsave's behaviour.
2228 * We only need to drop to !PCB_INITDONE in sendsig(). But
2229 * sendsig() is the only caller of fpugetuserregs()... perhaps we just
2230 * have too many layers.
2232 clear_pcb_flags(curthread->td_pcb,
2233 PCB_FPUINITDONE | PCB_USERFPUINITDONE);
2238 fill_dbregs(struct thread *td, struct dbreg *dbregs)
2243 dbregs->dr[0] = rdr0();
2244 dbregs->dr[1] = rdr1();
2245 dbregs->dr[2] = rdr2();
2246 dbregs->dr[3] = rdr3();
2247 dbregs->dr[6] = rdr6();
2248 dbregs->dr[7] = rdr7();
2251 dbregs->dr[0] = pcb->pcb_dr0;
2252 dbregs->dr[1] = pcb->pcb_dr1;
2253 dbregs->dr[2] = pcb->pcb_dr2;
2254 dbregs->dr[3] = pcb->pcb_dr3;
2255 dbregs->dr[6] = pcb->pcb_dr6;
2256 dbregs->dr[7] = pcb->pcb_dr7;
2272 set_dbregs(struct thread *td, struct dbreg *dbregs)
2278 load_dr0(dbregs->dr[0]);
2279 load_dr1(dbregs->dr[1]);
2280 load_dr2(dbregs->dr[2]);
2281 load_dr3(dbregs->dr[3]);
2282 load_dr6(dbregs->dr[6]);
2283 load_dr7(dbregs->dr[7]);
2286 * Don't let an illegal value for dr7 get set. Specifically,
2287 * check for undefined settings. Setting these bit patterns
2288 * result in undefined behaviour and can lead to an unexpected
2289 * TRCTRAP or a general protection fault right here.
2290 * Upper bits of dr6 and dr7 must not be set
2292 for (i = 0; i < 4; i++) {
2293 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02)
2295 if (td->td_frame->tf_cs == _ucode32sel &&
2296 DBREG_DR7_LEN(dbregs->dr[7], i) == DBREG_DR7_LEN_8)
2299 if ((dbregs->dr[6] & 0xffffffff00000000ul) != 0 ||
2300 (dbregs->dr[7] & 0xffffffff00000000ul) != 0)
2306 * Don't let a process set a breakpoint that is not within the
2307 * process's address space. If a process could do this, it
2308 * could halt the system by setting a breakpoint in the kernel
2309 * (if ddb was enabled). Thus, we need to check to make sure
2310 * that no breakpoints are being enabled for addresses outside
2311 * process's address space.
2313 * XXX - what about when the watched area of the user's
2314 * address space is written into from within the kernel
2315 * ... wouldn't that still cause a breakpoint to be generated
2316 * from within kernel mode?
2319 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) {
2320 /* dr0 is enabled */
2321 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS)
2324 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) {
2325 /* dr1 is enabled */
2326 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS)
2329 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) {
2330 /* dr2 is enabled */
2331 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS)
2334 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) {
2335 /* dr3 is enabled */
2336 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS)
2340 pcb->pcb_dr0 = dbregs->dr[0];
2341 pcb->pcb_dr1 = dbregs->dr[1];
2342 pcb->pcb_dr2 = dbregs->dr[2];
2343 pcb->pcb_dr3 = dbregs->dr[3];
2344 pcb->pcb_dr6 = dbregs->dr[6];
2345 pcb->pcb_dr7 = dbregs->dr[7];
2347 set_pcb_flags(pcb, PCB_DBREGS);
2357 load_dr7(0); /* Turn off the control bits first */
2366 * Return > 0 if a hardware breakpoint has been hit, and the
2367 * breakpoint was in user space. Return 0, otherwise.
2370 user_dbreg_trap(void)
2372 u_int64_t dr7, dr6; /* debug registers dr6 and dr7 */
2373 u_int64_t bp; /* breakpoint bits extracted from dr6 */
2374 int nbp; /* number of breakpoints that triggered */
2375 caddr_t addr[4]; /* breakpoint addresses */
2379 if ((dr7 & 0x000000ff) == 0) {
2381 * all GE and LE bits in the dr7 register are zero,
2382 * thus the trap couldn't have been caused by the
2383 * hardware debug registers
2390 bp = dr6 & 0x0000000f;
2394 * None of the breakpoint bits are set meaning this
2395 * trap was not caused by any of the debug registers
2401 * at least one of the breakpoints were hit, check to see
2402 * which ones and if any of them are user space addresses
2406 addr[nbp++] = (caddr_t)rdr0();
2409 addr[nbp++] = (caddr_t)rdr1();
2412 addr[nbp++] = (caddr_t)rdr2();
2415 addr[nbp++] = (caddr_t)rdr3();
2418 for (i = 0; i < nbp; i++) {
2419 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) {
2421 * addr[i] is in user space
2428 * None of the breakpoints are in user space.
2436 * Provide inb() and outb() as functions. They are normally only available as
2437 * inline functions, thus cannot be called from the debugger.
2440 /* silence compiler warnings */
2441 u_char inb_(u_short);
2442 void outb_(u_short, u_char);
2451 outb_(u_short port, u_char data)