2 * Copyright (c) 2003 Peter Wemm.
3 * Copyright (c) 1992 Terrence R. Lambert.
4 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
7 * This code is derived from software contributed to Berkeley by
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the University of
21 * California, Berkeley and its contributors.
22 * 4. Neither the name of the University nor the names of its contributors
23 * may be used to endorse or promote products derived from this software
24 * without specific prior written permission.
26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
41 #include <sys/cdefs.h>
42 __FBSDID("$FreeBSD$");
44 #include "opt_atpic.h"
45 #include "opt_compat.h"
50 #include "opt_kstack_pages.h"
51 #include "opt_maxmem.h"
52 #include "opt_mp_watchdog.h"
53 #include "opt_perfmon.h"
54 #include "opt_platform.h"
55 #include "opt_sched.h"
57 #include <sys/param.h>
59 #include <sys/systm.h>
63 #include <sys/callout.h>
67 #include <sys/eventhandler.h>
69 #include <sys/imgact.h>
71 #include <sys/kernel.h>
73 #include <sys/linker.h>
75 #include <sys/malloc.h>
76 #include <sys/memrange.h>
77 #include <sys/msgbuf.h>
78 #include <sys/mutex.h>
80 #include <sys/ptrace.h>
81 #include <sys/reboot.h>
82 #include <sys/rwlock.h>
83 #include <sys/sched.h>
84 #include <sys/signalvar.h>
88 #include <sys/syscallsubr.h>
89 #include <sys/sysctl.h>
90 #include <sys/sysent.h>
91 #include <sys/sysproto.h>
92 #include <sys/ucontext.h>
93 #include <sys/vmmeter.h>
96 #include <vm/vm_extern.h>
97 #include <vm/vm_kern.h>
98 #include <vm/vm_page.h>
99 #include <vm/vm_map.h>
100 #include <vm/vm_object.h>
101 #include <vm/vm_pager.h>
102 #include <vm/vm_param.h>
106 #error KDB must be enabled in order for DDB to work!
109 #include <ddb/db_sym.h>
112 #include <net/netisr.h>
114 #include <machine/clock.h>
115 #include <machine/cpu.h>
116 #include <machine/cputypes.h>
117 #include <machine/intr_machdep.h>
119 #include <machine/md_var.h>
120 #include <machine/metadata.h>
121 #include <machine/mp_watchdog.h>
122 #include <machine/pc/bios.h>
123 #include <machine/pcb.h>
124 #include <machine/proc.h>
125 #include <machine/reg.h>
126 #include <machine/sigframe.h>
127 #include <machine/specialreg.h>
129 #include <machine/perfmon.h>
131 #include <machine/tss.h>
133 #include <machine/smp.h>
140 #include <x86/isa/icu.h>
142 #include <x86/apicvar.h>
145 #include <isa/isareg.h>
147 #include <x86/init.h>
149 /* Sanity check for __curthread() */
150 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
152 extern u_int64_t hammer_time(u_int64_t, u_int64_t);
154 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
155 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
157 static void cpu_startup(void *);
158 static void get_fpcontext(struct thread *td, mcontext_t *mcp,
159 char *xfpusave, size_t xfpusave_len);
160 static int set_fpcontext(struct thread *td, const mcontext_t *mcp,
161 char *xfpustate, size_t xfpustate_len);
162 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
164 /* Preload data parse function */
165 static caddr_t native_parse_preload_data(u_int64_t);
167 /* Native function to fetch and parse the e820 map */
168 static void native_parse_memmap(caddr_t, vm_paddr_t *, int *);
170 /* Default init_ops implementation. */
171 struct init_ops init_ops = {
172 .parse_preload_data = native_parse_preload_data,
173 .early_clock_source_init = i8254_init,
174 .early_delay = i8254_delay,
175 .parse_memmap = native_parse_memmap,
177 .mp_bootaddress = mp_bootaddress,
178 .start_all_aps = native_start_all_aps,
183 * The file "conf/ldscript.amd64" defines the symbol "kernphys". Its value is
184 * the physical address at which the kernel is loaded.
186 extern char kernphys[];
188 extern vm_offset_t ksym_start, ksym_end;
191 struct msgbuf *msgbufp;
193 /* Intel ICH registers */
194 #define ICH_PMBASE 0x400
195 #define ICH_SMI_EN ICH_PMBASE + 0x30
197 int _udatasel, _ucodesel, _ucode32sel, _ufssel, _ugssel;
205 * The number of PHYSMAP entries must be one less than the number of
206 * PHYSSEG entries because the PHYSMAP entry that spans the largest
207 * physical address that is accessible by ISA DMA is split into two
210 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
212 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
213 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
215 /* must be 2 less so 0 0 can signal end of chunks */
216 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2)
217 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2)
219 struct kva_md_info kmi;
221 static struct trapframe proc0_tf;
222 struct region_descriptor r_gdt, r_idt;
224 struct pcpu __pcpu[MAXCPU];
228 struct mem_range_softc mem_range_softc;
230 struct mtx dt_lock; /* lock for GDT and LDT */
232 void (*vmm_resume_p)(void);
242 * On MacBooks, we need to disallow the legacy USB circuit to
243 * generate an SMI# because this can cause several problems,
244 * namely: incorrect CPU frequency detection and failure to
246 * We do this by disabling a bit in the SMI_EN (SMI Control and
247 * Enable register) of the Intel ICH LPC Interface Bridge.
249 sysenv = getenv("smbios.system.product");
250 if (sysenv != NULL) {
251 if (strncmp(sysenv, "MacBook1,1", 10) == 0 ||
252 strncmp(sysenv, "MacBook3,1", 10) == 0 ||
253 strncmp(sysenv, "MacBook4,1", 10) == 0 ||
254 strncmp(sysenv, "MacBookPro1,1", 13) == 0 ||
255 strncmp(sysenv, "MacBookPro1,2", 13) == 0 ||
256 strncmp(sysenv, "MacBookPro3,1", 13) == 0 ||
257 strncmp(sysenv, "MacBookPro4,1", 13) == 0 ||
258 strncmp(sysenv, "Macmini1,1", 10) == 0) {
260 printf("Disabling LEGACY_USB_EN bit on "
262 outl(ICH_SMI_EN, inl(ICH_SMI_EN) & ~0x8);
268 * Good {morning,afternoon,evening,night}.
272 panicifcpuunsupported();
278 * Display physical memory if SMBIOS reports reasonable amount.
281 sysenv = getenv("smbios.memory.enabled");
282 if (sysenv != NULL) {
283 memsize = (uintmax_t)strtoul(sysenv, (char **)NULL, 10) << 10;
286 if (memsize < ptoa((uintmax_t)vm_cnt.v_free_count))
287 memsize = ptoa((uintmax_t)Maxmem);
288 printf("real memory = %ju (%ju MB)\n", memsize, memsize >> 20);
289 realmem = atop(memsize);
292 * Display any holes after the first chunk of extended memory.
297 printf("Physical memory chunk(s):\n");
298 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
301 size = phys_avail[indx + 1] - phys_avail[indx];
303 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n",
304 (uintmax_t)phys_avail[indx],
305 (uintmax_t)phys_avail[indx + 1] - 1,
306 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
310 vm_ksubmap_init(&kmi);
312 printf("avail memory = %ju (%ju MB)\n",
313 ptoa((uintmax_t)vm_cnt.v_free_count),
314 ptoa((uintmax_t)vm_cnt.v_free_count) / 1048576);
317 * Set up buffers, so they can be used to read disk labels.
320 vm_pager_bufferinit();
326 * Send an interrupt to process.
328 * Stack is set up to allow sigcode stored
329 * at top to call routine, followed by call
330 * to sigreturn routine below. After sigreturn
331 * resets the signal mask, the stack, and the
332 * frame pointer, it returns to the user
336 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
338 struct sigframe sf, *sfp;
344 struct trapframe *regs;
353 PROC_LOCK_ASSERT(p, MA_OWNED);
354 sig = ksi->ksi_signo;
356 mtx_assert(&psp->ps_mtx, MA_OWNED);
358 oonstack = sigonstack(regs->tf_rsp);
360 if (cpu_max_ext_state_size > sizeof(struct savefpu) && use_xsave) {
361 xfpusave_len = cpu_max_ext_state_size - sizeof(struct savefpu);
362 xfpusave = __builtin_alloca(xfpusave_len);
368 /* Save user context. */
369 bzero(&sf, sizeof(sf));
370 sf.sf_uc.uc_sigmask = *mask;
371 sf.sf_uc.uc_stack = td->td_sigstk;
372 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
373 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
374 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
375 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(*regs));
376 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */
377 get_fpcontext(td, &sf.sf_uc.uc_mcontext, xfpusave, xfpusave_len);
379 sf.sf_uc.uc_mcontext.mc_fsbase = pcb->pcb_fsbase;
380 sf.sf_uc.uc_mcontext.mc_gsbase = pcb->pcb_gsbase;
381 bzero(sf.sf_uc.uc_mcontext.mc_spare,
382 sizeof(sf.sf_uc.uc_mcontext.mc_spare));
383 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__));
385 /* Allocate space for the signal handler context. */
386 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
387 SIGISMEMBER(psp->ps_sigonstack, sig)) {
388 sp = td->td_sigstk.ss_sp + td->td_sigstk.ss_size;
389 #if defined(COMPAT_43)
390 td->td_sigstk.ss_flags |= SS_ONSTACK;
393 sp = (char *)regs->tf_rsp - 128;
394 if (xfpusave != NULL) {
396 sp = (char *)((unsigned long)sp & ~0x3Ful);
397 sf.sf_uc.uc_mcontext.mc_xfpustate = (register_t)sp;
399 sp -= sizeof(struct sigframe);
400 /* Align to 16 bytes. */
401 sfp = (struct sigframe *)((unsigned long)sp & ~0xFul);
403 /* Translate the signal if appropriate. */
404 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
405 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
407 /* Build the argument list for the signal handler. */
408 regs->tf_rdi = sig; /* arg 1 in %rdi */
409 regs->tf_rdx = (register_t)&sfp->sf_uc; /* arg 3 in %rdx */
410 bzero(&sf.sf_si, sizeof(sf.sf_si));
411 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
412 /* Signal handler installed with SA_SIGINFO. */
413 regs->tf_rsi = (register_t)&sfp->sf_si; /* arg 2 in %rsi */
414 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
416 /* Fill in POSIX parts */
417 sf.sf_si = ksi->ksi_info;
418 sf.sf_si.si_signo = sig; /* maybe a translated signal */
419 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */
421 /* Old FreeBSD-style arguments. */
422 regs->tf_rsi = ksi->ksi_code; /* arg 2 in %rsi */
423 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */
424 sf.sf_ahu.sf_handler = catcher;
426 mtx_unlock(&psp->ps_mtx);
430 * Copy the sigframe out to the user's stack.
432 if (copyout(&sf, sfp, sizeof(*sfp)) != 0 ||
433 (xfpusave != NULL && copyout(xfpusave,
434 (void *)sf.sf_uc.uc_mcontext.mc_xfpustate, xfpusave_len)
437 printf("process %ld has trashed its stack\n", (long)p->p_pid);
443 regs->tf_rsp = (long)sfp;
444 regs->tf_rip = p->p_sysent->sv_sigcode_base;
445 regs->tf_rflags &= ~(PSL_T | PSL_D);
446 regs->tf_cs = _ucodesel;
447 regs->tf_ds = _udatasel;
448 regs->tf_es = _udatasel;
449 regs->tf_fs = _ufssel;
450 regs->tf_gs = _ugssel;
451 regs->tf_flags = TF_HASSEGS;
452 set_pcb_flags(pcb, PCB_FULL_IRET);
454 mtx_lock(&psp->ps_mtx);
458 * System call to cleanup state after a signal
459 * has been taken. Reset signal mask and
460 * stack state from context left by sendsig (above).
461 * Return to previous pc and psl as specified by
462 * context left by sendsig. Check carefully to
463 * make sure that the user has not modified the
464 * state to gain improper privileges.
469 sys_sigreturn(td, uap)
471 struct sigreturn_args /* {
472 const struct __ucontext *sigcntxp;
478 struct trapframe *regs;
481 size_t xfpustate_len;
489 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
491 uprintf("pid %d (%s): sigreturn copyin failed\n",
492 p->p_pid, td->td_name);
496 if ((ucp->uc_mcontext.mc_flags & ~_MC_FLAG_MASK) != 0) {
497 uprintf("pid %d (%s): sigreturn mc_flags %x\n", p->p_pid,
498 td->td_name, ucp->uc_mcontext.mc_flags);
502 rflags = ucp->uc_mcontext.mc_rflags;
504 * Don't allow users to change privileged or reserved flags.
506 if (!EFL_SECURE(rflags, regs->tf_rflags)) {
507 uprintf("pid %d (%s): sigreturn rflags = 0x%lx\n", p->p_pid,
508 td->td_name, rflags);
513 * Don't allow users to load a valid privileged %cs. Let the
514 * hardware check for invalid selectors, excess privilege in
515 * other selectors, invalid %eip's and invalid %esp's.
517 cs = ucp->uc_mcontext.mc_cs;
518 if (!CS_SECURE(cs)) {
519 uprintf("pid %d (%s): sigreturn cs = 0x%x\n", p->p_pid,
521 ksiginfo_init_trap(&ksi);
522 ksi.ksi_signo = SIGBUS;
523 ksi.ksi_code = BUS_OBJERR;
524 ksi.ksi_trapno = T_PROTFLT;
525 ksi.ksi_addr = (void *)regs->tf_rip;
526 trapsignal(td, &ksi);
530 if ((uc.uc_mcontext.mc_flags & _MC_HASFPXSTATE) != 0) {
531 xfpustate_len = uc.uc_mcontext.mc_xfpustate_len;
532 if (xfpustate_len > cpu_max_ext_state_size -
533 sizeof(struct savefpu)) {
534 uprintf("pid %d (%s): sigreturn xfpusave_len = 0x%zx\n",
535 p->p_pid, td->td_name, xfpustate_len);
538 xfpustate = __builtin_alloca(xfpustate_len);
539 error = copyin((const void *)uc.uc_mcontext.mc_xfpustate,
540 xfpustate, xfpustate_len);
543 "pid %d (%s): sigreturn copying xfpustate failed\n",
544 p->p_pid, td->td_name);
551 ret = set_fpcontext(td, &ucp->uc_mcontext, xfpustate, xfpustate_len);
553 uprintf("pid %d (%s): sigreturn set_fpcontext err %d\n",
554 p->p_pid, td->td_name, ret);
557 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(*regs));
558 pcb->pcb_fsbase = ucp->uc_mcontext.mc_fsbase;
559 pcb->pcb_gsbase = ucp->uc_mcontext.mc_gsbase;
561 #if defined(COMPAT_43)
562 if (ucp->uc_mcontext.mc_onstack & 1)
563 td->td_sigstk.ss_flags |= SS_ONSTACK;
565 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
568 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
569 set_pcb_flags(pcb, PCB_FULL_IRET);
570 return (EJUSTRETURN);
573 #ifdef COMPAT_FREEBSD4
575 freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap)
578 return sys_sigreturn(td, (struct sigreturn_args *)uap);
584 * Machine dependent boot() routine
586 * I haven't seen anything to put here yet
587 * Possibly some stuff might be grafted back here from boot()
595 * Flush the D-cache for non-DMA I/O so that the I-cache can
596 * be made coherent later.
599 cpu_flush_dcache(void *ptr, size_t len)
604 /* Get current clock frequency for the given cpu id. */
606 cpu_est_clockrate(int cpu_id, uint64_t *rate)
609 uint64_t acnt, mcnt, perf;
612 if (pcpu_find(cpu_id) == NULL || rate == NULL)
616 * If TSC is P-state invariant and APERF/MPERF MSRs do not exist,
617 * DELAY(9) based logic fails.
619 if (tsc_is_invariant && !tsc_perf_stat)
624 /* Schedule ourselves on the indicated cpu. */
625 thread_lock(curthread);
626 sched_bind(curthread, cpu_id);
627 thread_unlock(curthread);
631 /* Calibrate by measuring a short delay. */
632 reg = intr_disable();
633 if (tsc_is_invariant) {
638 mcnt = rdmsr(MSR_MPERF);
639 acnt = rdmsr(MSR_APERF);
642 perf = 1000 * acnt / mcnt;
643 *rate = (tsc2 - tsc1) * perf;
649 *rate = (tsc2 - tsc1) * 1000;
654 thread_lock(curthread);
655 sched_unbind(curthread);
656 thread_unlock(curthread);
664 * Shutdown the CPU as much as possible
673 void (*cpu_idle_hook)(sbintime_t) = NULL; /* ACPI idle hook. */
674 static int cpu_ident_amdc1e = 0; /* AMD C1E supported. */
675 static int idle_mwait = 1; /* Use MONITOR/MWAIT for short idle. */
676 SYSCTL_INT(_machdep, OID_AUTO, idle_mwait, CTLFLAG_RWTUN, &idle_mwait,
677 0, "Use MONITOR/MWAIT for short idle");
679 #define STATE_RUNNING 0x0
680 #define STATE_MWAIT 0x1
681 #define STATE_SLEEPING 0x2
684 cpu_idle_acpi(sbintime_t sbt)
688 state = (int *)PCPU_PTR(monitorbuf);
689 *state = STATE_SLEEPING;
691 /* See comments in cpu_idle_hlt(). */
693 if (sched_runnable())
695 else if (cpu_idle_hook)
698 __asm __volatile("sti; hlt");
699 *state = STATE_RUNNING;
703 cpu_idle_hlt(sbintime_t sbt)
707 state = (int *)PCPU_PTR(monitorbuf);
708 *state = STATE_SLEEPING;
711 * Since we may be in a critical section from cpu_idle(), if
712 * an interrupt fires during that critical section we may have
713 * a pending preemption. If the CPU halts, then that thread
714 * may not execute until a later interrupt awakens the CPU.
715 * To handle this race, check for a runnable thread after
716 * disabling interrupts and immediately return if one is
717 * found. Also, we must absolutely guarentee that hlt is
718 * the next instruction after sti. This ensures that any
719 * interrupt that fires after the call to disable_intr() will
720 * immediately awaken the CPU from hlt. Finally, please note
721 * that on x86 this works fine because of interrupts enabled only
722 * after the instruction following sti takes place, while IF is set
723 * to 1 immediately, allowing hlt instruction to acknowledge the
727 if (sched_runnable())
730 __asm __volatile("sti; hlt");
731 *state = STATE_RUNNING;
735 * MWAIT cpu power states. Lower 4 bits are sub-states.
737 #define MWAIT_C0 0xf0
738 #define MWAIT_C1 0x00
739 #define MWAIT_C2 0x10
740 #define MWAIT_C3 0x20
741 #define MWAIT_C4 0x30
744 cpu_idle_mwait(sbintime_t sbt)
748 state = (int *)PCPU_PTR(monitorbuf);
749 *state = STATE_MWAIT;
751 /* See comments in cpu_idle_hlt(). */
753 if (sched_runnable()) {
755 *state = STATE_RUNNING;
758 cpu_monitor(state, 0, 0);
759 if (*state == STATE_MWAIT)
760 __asm __volatile("sti; mwait" : : "a" (MWAIT_C1), "c" (0));
763 *state = STATE_RUNNING;
767 cpu_idle_spin(sbintime_t sbt)
772 state = (int *)PCPU_PTR(monitorbuf);
773 *state = STATE_RUNNING;
776 * The sched_runnable() call is racy but as long as there is
777 * a loop missing it one time will have just a little impact if any
778 * (and it is much better than missing the check at all).
780 for (i = 0; i < 1000; i++) {
781 if (sched_runnable())
788 * C1E renders the local APIC timer dead, so we disable it by
789 * reading the Interrupt Pending Message register and clearing
790 * both C1eOnCmpHalt (bit 28) and SmiOnCmpHalt (bit 27).
793 * "BIOS and Kernel Developer's Guide for AMD NPT Family 0Fh Processors"
794 * #32559 revision 3.00+
796 #define MSR_AMDK8_IPM 0xc0010055
797 #define AMDK8_SMIONCMPHALT (1ULL << 27)
798 #define AMDK8_C1EONCMPHALT (1ULL << 28)
799 #define AMDK8_CMPHALT (AMDK8_SMIONCMPHALT | AMDK8_C1EONCMPHALT)
802 cpu_probe_amdc1e(void)
806 * Detect the presence of C1E capability mostly on latest
807 * dual-cores (or future) k8 family.
809 if (cpu_vendor_id == CPU_VENDOR_AMD &&
810 (cpu_id & 0x00000f00) == 0x00000f00 &&
811 (cpu_id & 0x0fff0000) >= 0x00040000) {
812 cpu_ident_amdc1e = 1;
816 void (*cpu_idle_fn)(sbintime_t) = cpu_idle_acpi;
824 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d",
827 ap_watchdog(PCPU_GET(cpuid));
829 /* If we are busy - try to use fast methods. */
831 if ((cpu_feature2 & CPUID2_MON) && idle_mwait) {
832 cpu_idle_mwait(busy);
837 /* If we have time - switch timers into idle mode. */
840 sbt = cpu_idleclock();
843 /* Apply AMD APIC timer C1E workaround. */
844 if (cpu_ident_amdc1e && cpu_disable_deep_sleep) {
845 msr = rdmsr(MSR_AMDK8_IPM);
846 if (msr & AMDK8_CMPHALT)
847 wrmsr(MSR_AMDK8_IPM, msr & ~AMDK8_CMPHALT);
850 /* Call main idle method. */
853 /* Switch timers back into active mode. */
859 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done",
864 cpu_idle_wakeup(int cpu)
869 pcpu = pcpu_find(cpu);
870 state = (int *)pcpu->pc_monitorbuf;
872 * This doesn't need to be atomic since missing the race will
873 * simply result in unnecessary IPIs.
875 if (*state == STATE_SLEEPING)
877 if (*state == STATE_MWAIT)
878 *state = STATE_RUNNING;
883 * Ordered by speed/power consumption.
889 { cpu_idle_spin, "spin" },
890 { cpu_idle_mwait, "mwait" },
891 { cpu_idle_hlt, "hlt" },
892 { cpu_idle_acpi, "acpi" },
897 idle_sysctl_available(SYSCTL_HANDLER_ARGS)
903 avail = malloc(256, M_TEMP, M_WAITOK);
905 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
906 if (strstr(idle_tbl[i].id_name, "mwait") &&
907 (cpu_feature2 & CPUID2_MON) == 0)
909 if (strcmp(idle_tbl[i].id_name, "acpi") == 0 &&
910 cpu_idle_hook == NULL)
912 p += sprintf(p, "%s%s", p != avail ? ", " : "",
913 idle_tbl[i].id_name);
915 error = sysctl_handle_string(oidp, avail, 0, req);
920 SYSCTL_PROC(_machdep, OID_AUTO, idle_available, CTLTYPE_STRING | CTLFLAG_RD,
921 0, 0, idle_sysctl_available, "A", "list of available idle functions");
924 idle_sysctl(SYSCTL_HANDLER_ARGS)
932 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
933 if (idle_tbl[i].id_fn == cpu_idle_fn) {
934 p = idle_tbl[i].id_name;
938 strncpy(buf, p, sizeof(buf));
939 error = sysctl_handle_string(oidp, buf, sizeof(buf), req);
940 if (error != 0 || req->newptr == NULL)
942 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
943 if (strstr(idle_tbl[i].id_name, "mwait") &&
944 (cpu_feature2 & CPUID2_MON) == 0)
946 if (strcmp(idle_tbl[i].id_name, "acpi") == 0 &&
947 cpu_idle_hook == NULL)
949 if (strcmp(idle_tbl[i].id_name, buf))
951 cpu_idle_fn = idle_tbl[i].id_fn;
957 SYSCTL_PROC(_machdep, OID_AUTO, idle, CTLTYPE_STRING | CTLFLAG_RW, 0, 0,
958 idle_sysctl, "A", "currently selected idle function");
961 * Reset registers to default values on exec.
964 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
966 struct trapframe *regs = td->td_frame;
967 struct pcb *pcb = td->td_pcb;
970 if (td->td_proc->p_md.md_ldt != NULL)
973 mtx_unlock(&dt_lock);
977 clear_pcb_flags(pcb, PCB_32BIT);
978 pcb->pcb_initial_fpucw = __INITIAL_FPUCW__;
979 set_pcb_flags(pcb, PCB_FULL_IRET);
981 bzero((char *)regs, sizeof(struct trapframe));
982 regs->tf_rip = imgp->entry_addr;
983 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8;
984 regs->tf_rdi = stack; /* argv */
985 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T);
986 regs->tf_ss = _udatasel;
987 regs->tf_cs = _ucodesel;
988 regs->tf_ds = _udatasel;
989 regs->tf_es = _udatasel;
990 regs->tf_fs = _ufssel;
991 regs->tf_gs = _ugssel;
992 regs->tf_flags = TF_HASSEGS;
993 td->td_retval[1] = 0;
996 * Reset the hardware debug registers if they were in use.
997 * They won't have any meaning for the newly exec'd process.
999 if (pcb->pcb_flags & PCB_DBREGS) {
1006 if (pcb == curpcb) {
1008 * Clear the debug registers on the running
1009 * CPU, otherwise they will end up affecting
1010 * the next process we switch to.
1014 clear_pcb_flags(pcb, PCB_DBREGS);
1018 * Drop the FP state if we hold it, so that the process gets a
1019 * clean FP state if it uses the FPU again.
1031 * CR0_MP, CR0_NE and CR0_TS are also set by npx_probe() for the
1032 * BSP. See the comments there about why we set them.
1034 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM;
1039 * Initialize amd64 and configure to run kernel
1043 * Initialize segments & interrupt table
1046 struct user_segment_descriptor gdt[NGDT * MAXCPU];/* global descriptor tables */
1047 static struct gate_descriptor idt0[NIDT];
1048 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1050 static char dblfault_stack[PAGE_SIZE] __aligned(16);
1052 static char nmi0_stack[PAGE_SIZE] __aligned(16);
1053 CTASSERT(sizeof(struct nmi_pcpu) == 16);
1055 struct amd64tss common_tss[MAXCPU];
1058 * Software prototypes -- in more palatable form.
1060 * Keep GUFS32, GUGS32, GUCODE32 and GUDATA at the same
1061 * slots as corresponding segments for i386 kernel.
1063 struct soft_segment_descriptor gdt_segs[] = {
1064 /* GNULL_SEL 0 Null Descriptor */
1073 /* GNULL2_SEL 1 Null Descriptor */
1082 /* GUFS32_SEL 2 32 bit %gs Descriptor for user */
1084 .ssd_limit = 0xfffff,
1085 .ssd_type = SDT_MEMRWA,
1091 /* GUGS32_SEL 3 32 bit %fs Descriptor for user */
1093 .ssd_limit = 0xfffff,
1094 .ssd_type = SDT_MEMRWA,
1100 /* GCODE_SEL 4 Code Descriptor for kernel */
1102 .ssd_limit = 0xfffff,
1103 .ssd_type = SDT_MEMERA,
1109 /* GDATA_SEL 5 Data Descriptor for kernel */
1111 .ssd_limit = 0xfffff,
1112 .ssd_type = SDT_MEMRWA,
1118 /* GUCODE32_SEL 6 32 bit Code Descriptor for user */
1120 .ssd_limit = 0xfffff,
1121 .ssd_type = SDT_MEMERA,
1127 /* GUDATA_SEL 7 32/64 bit Data Descriptor for user */
1129 .ssd_limit = 0xfffff,
1130 .ssd_type = SDT_MEMRWA,
1136 /* GUCODE_SEL 8 64 bit Code Descriptor for user */
1138 .ssd_limit = 0xfffff,
1139 .ssd_type = SDT_MEMERA,
1145 /* GPROC0_SEL 9 Proc 0 Tss Descriptor */
1147 .ssd_limit = sizeof(struct amd64tss) + IOPERM_BITMAP_SIZE - 1,
1148 .ssd_type = SDT_SYSTSS,
1154 /* Actually, the TSS is a system descriptor which is double size */
1163 /* GUSERLDT_SEL 11 LDT Descriptor */
1172 /* GUSERLDT_SEL 12 LDT Descriptor, double size */
1184 setidt(idx, func, typ, dpl, ist)
1191 struct gate_descriptor *ip;
1194 ip->gd_looffset = (uintptr_t)func;
1195 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL);
1201 ip->gd_hioffset = ((uintptr_t)func)>>16 ;
1205 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1206 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1207 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1208 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1209 IDTVEC(xmm), IDTVEC(dblfault),
1210 #ifdef KDTRACE_HOOKS
1214 IDTVEC(xen_intr_upcall),
1216 IDTVEC(fast_syscall), IDTVEC(fast_syscall32);
1220 * Display the index and function name of any IDT entries that don't use
1221 * the default 'rsvd' entry point.
1223 DB_SHOW_COMMAND(idt, db_show_idt)
1225 struct gate_descriptor *ip;
1230 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) {
1231 func = ((long)ip->gd_hioffset << 16 | ip->gd_looffset);
1232 if (func != (uintptr_t)&IDTVEC(rsvd)) {
1233 db_printf("%3d\t", idx);
1234 db_printsym(func, DB_STGY_PROC);
1241 /* Show privileged registers. */
1242 DB_SHOW_COMMAND(sysregs, db_show_sysregs)
1247 } __packed idtr, gdtr;
1250 __asm __volatile("sidt %0" : "=m" (idtr));
1251 db_printf("idtr\t0x%016lx/%04x\n",
1252 (u_long)idtr.base, (u_int)idtr.limit);
1253 __asm __volatile("sgdt %0" : "=m" (gdtr));
1254 db_printf("gdtr\t0x%016lx/%04x\n",
1255 (u_long)gdtr.base, (u_int)gdtr.limit);
1256 __asm __volatile("sldt %0" : "=r" (ldt));
1257 db_printf("ldtr\t0x%04x\n", ldt);
1258 __asm __volatile("str %0" : "=r" (tr));
1259 db_printf("tr\t0x%04x\n", tr);
1260 db_printf("cr0\t0x%016lx\n", rcr0());
1261 db_printf("cr2\t0x%016lx\n", rcr2());
1262 db_printf("cr3\t0x%016lx\n", rcr3());
1263 db_printf("cr4\t0x%016lx\n", rcr4());
1264 db_printf("EFER\t%016lx\n", rdmsr(MSR_EFER));
1265 db_printf("FEATURES_CTL\t%016lx\n", rdmsr(MSR_IA32_FEATURE_CONTROL));
1266 db_printf("DEBUG_CTL\t%016lx\n", rdmsr(MSR_DEBUGCTLMSR));
1267 db_printf("PAT\t%016lx\n", rdmsr(MSR_PAT));
1268 db_printf("GSBASE\t%016lx\n", rdmsr(MSR_GSBASE));
1274 struct user_segment_descriptor *sd;
1275 struct soft_segment_descriptor *ssd;
1278 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1279 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1280 ssd->ssd_type = sd->sd_type;
1281 ssd->ssd_dpl = sd->sd_dpl;
1282 ssd->ssd_p = sd->sd_p;
1283 ssd->ssd_long = sd->sd_long;
1284 ssd->ssd_def32 = sd->sd_def32;
1285 ssd->ssd_gran = sd->sd_gran;
1290 struct soft_segment_descriptor *ssd;
1291 struct user_segment_descriptor *sd;
1294 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1295 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff;
1296 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1297 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1298 sd->sd_type = ssd->ssd_type;
1299 sd->sd_dpl = ssd->ssd_dpl;
1300 sd->sd_p = ssd->ssd_p;
1301 sd->sd_long = ssd->ssd_long;
1302 sd->sd_def32 = ssd->ssd_def32;
1303 sd->sd_gran = ssd->ssd_gran;
1308 struct soft_segment_descriptor *ssd;
1309 struct system_segment_descriptor *sd;
1312 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1313 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful;
1314 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1315 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1316 sd->sd_type = ssd->ssd_type;
1317 sd->sd_dpl = ssd->ssd_dpl;
1318 sd->sd_p = ssd->ssd_p;
1319 sd->sd_gran = ssd->ssd_gran;
1322 #if !defined(DEV_ATPIC) && defined(DEV_ISA)
1323 #include <isa/isavar.h>
1324 #include <isa/isareg.h>
1326 * Return a bitmap of the current interrupt requests. This is 8259-specific
1327 * and is only suitable for use at probe time.
1328 * This is only here to pacify sio. It is NOT FATAL if this doesn't work.
1329 * It shouldn't be here. There should probably be an APIC centric
1330 * implementation in the apic driver code, if at all.
1333 isa_irq_pending(void)
1338 irr1 = inb(IO_ICU1);
1339 irr2 = inb(IO_ICU2);
1340 return ((irr2 << 8) | irr1);
1347 add_physmap_entry(uint64_t base, uint64_t length, vm_paddr_t *physmap,
1350 int i, insert_idx, physmap_idx;
1352 physmap_idx = *physmap_idxp;
1358 * Find insertion point while checking for overlap. Start off by
1359 * assuming the new entry will be added to the end.
1361 insert_idx = physmap_idx + 2;
1362 for (i = 0; i <= physmap_idx; i += 2) {
1363 if (base < physmap[i + 1]) {
1364 if (base + length <= physmap[i]) {
1368 if (boothowto & RB_VERBOSE)
1370 "Overlapping memory regions, ignoring second region\n");
1375 /* See if we can prepend to the next entry. */
1376 if (insert_idx <= physmap_idx && base + length == physmap[insert_idx]) {
1377 physmap[insert_idx] = base;
1381 /* See if we can append to the previous entry. */
1382 if (insert_idx > 0 && base == physmap[insert_idx - 1]) {
1383 physmap[insert_idx - 1] += length;
1388 *physmap_idxp = physmap_idx;
1389 if (physmap_idx == PHYSMAP_SIZE) {
1391 "Too many segments in the physical address map, giving up\n");
1396 * Move the last 'N' entries down to make room for the new
1399 for (i = physmap_idx; i > insert_idx; i -= 2) {
1400 physmap[i] = physmap[i - 2];
1401 physmap[i + 1] = physmap[i - 1];
1404 /* Insert the new entry. */
1405 physmap[insert_idx] = base;
1406 physmap[insert_idx + 1] = base + length;
1411 bios_add_smap_entries(struct bios_smap *smapbase, u_int32_t smapsize,
1412 vm_paddr_t *physmap, int *physmap_idx)
1414 struct bios_smap *smap, *smapend;
1416 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
1418 for (smap = smapbase; smap < smapend; smap++) {
1419 if (boothowto & RB_VERBOSE)
1420 printf("SMAP type=%02x base=%016lx len=%016lx\n",
1421 smap->type, smap->base, smap->length);
1423 if (smap->type != SMAP_TYPE_MEMORY)
1426 if (!add_physmap_entry(smap->base, smap->length, physmap,
1432 #define efi_next_descriptor(ptr, size) \
1433 ((struct efi_md *)(((uint8_t *) ptr) + size))
1436 add_efi_map_entries(struct efi_map_header *efihdr, vm_paddr_t *physmap,
1439 struct efi_md *map, *p;
1444 static const char *types[] = {
1450 "RuntimeServicesCode",
1451 "RuntimeServicesData",
1452 "ConventionalMemory",
1454 "ACPIReclaimMemory",
1457 "MemoryMappedIOPortSpace",
1462 * Memory map data provided by UEFI via the GetMemoryMap
1463 * Boot Services API.
1465 efisz = (sizeof(struct efi_map_header) + 0xf) & ~0xf;
1466 map = (struct efi_md *)((uint8_t *)efihdr + efisz);
1468 if (efihdr->descriptor_size == 0)
1470 ndesc = efihdr->memory_size / efihdr->descriptor_size;
1472 if (boothowto & RB_VERBOSE)
1473 printf("%23s %12s %12s %8s %4s\n",
1474 "Type", "Physical", "Virtual", "#Pages", "Attr");
1476 for (i = 0, p = map; i < ndesc; i++,
1477 p = efi_next_descriptor(p, efihdr->descriptor_size)) {
1478 if (boothowto & RB_VERBOSE) {
1479 if (p->md_type <= EFI_MD_TYPE_PALCODE)
1480 type = types[p->md_type];
1483 printf("%23s %012lx %12p %08lx ", type, p->md_phys,
1484 p->md_virt, p->md_pages);
1485 if (p->md_attr & EFI_MD_ATTR_UC)
1487 if (p->md_attr & EFI_MD_ATTR_WC)
1489 if (p->md_attr & EFI_MD_ATTR_WT)
1491 if (p->md_attr & EFI_MD_ATTR_WB)
1493 if (p->md_attr & EFI_MD_ATTR_UCE)
1495 if (p->md_attr & EFI_MD_ATTR_WP)
1497 if (p->md_attr & EFI_MD_ATTR_RP)
1499 if (p->md_attr & EFI_MD_ATTR_XP)
1501 if (p->md_attr & EFI_MD_ATTR_RT)
1506 switch (p->md_type) {
1507 case EFI_MD_TYPE_CODE:
1508 case EFI_MD_TYPE_DATA:
1509 case EFI_MD_TYPE_BS_CODE:
1510 case EFI_MD_TYPE_BS_DATA:
1511 case EFI_MD_TYPE_FREE:
1513 * We're allowed to use any entry with these types.
1520 if (!add_physmap_entry(p->md_phys, (p->md_pages * PAGE_SIZE),
1521 physmap, physmap_idx))
1526 static char bootmethod[16] = "";
1527 SYSCTL_STRING(_machdep, OID_AUTO, bootmethod, CTLFLAG_RD, bootmethod, 0,
1528 "System firmware boot method");
1531 native_parse_memmap(caddr_t kmdp, vm_paddr_t *physmap, int *physmap_idx)
1533 struct bios_smap *smap;
1534 struct efi_map_header *efihdr;
1538 * Memory map from INT 15:E820.
1540 * subr_module.c says:
1541 * "Consumer may safely assume that size value precedes data."
1542 * ie: an int32_t immediately precedes smap.
1545 efihdr = (struct efi_map_header *)preload_search_info(kmdp,
1546 MODINFO_METADATA | MODINFOMD_EFI_MAP);
1547 smap = (struct bios_smap *)preload_search_info(kmdp,
1548 MODINFO_METADATA | MODINFOMD_SMAP);
1549 if (efihdr == NULL && smap == NULL)
1550 panic("No BIOS smap or EFI map info from loader!");
1552 if (efihdr != NULL) {
1553 add_efi_map_entries(efihdr, physmap, physmap_idx);
1554 strlcpy(bootmethod, "UEFI", sizeof(bootmethod));
1556 size = *((u_int32_t *)smap - 1);
1557 bios_add_smap_entries(smap, size, physmap, physmap_idx);
1558 strlcpy(bootmethod, "BIOS", sizeof(bootmethod));
1563 * Populate the (physmap) array with base/bound pairs describing the
1564 * available physical memory in the system, then test this memory and
1565 * build the phys_avail array describing the actually-available memory.
1567 * Total memory size may be set by the kernel environment variable
1568 * hw.physmem or the compile-time define MAXMEM.
1570 * XXX first should be vm_paddr_t.
1573 getmemsize(caddr_t kmdp, u_int64_t first)
1575 int i, physmap_idx, pa_indx, da_indx;
1576 vm_paddr_t pa, physmap[PHYSMAP_SIZE];
1577 u_long physmem_start, physmem_tunable, memtest;
1579 quad_t dcons_addr, dcons_size;
1581 bzero(physmap, sizeof(physmap));
1585 init_ops.parse_memmap(kmdp, physmap, &physmap_idx);
1588 * Find the 'base memory' segment for SMP
1591 for (i = 0; i <= physmap_idx; i += 2) {
1592 if (physmap[i] == 0x00000000) {
1593 basemem = physmap[i + 1] / 1024;
1598 panic("BIOS smap did not include a basemem segment!");
1601 * Make hole for "AP -> long mode" bootstrap code. The
1602 * mp_bootaddress vector is only available when the kernel
1603 * is configured to support APs and APs for the system start
1604 * in 32bit mode (e.g. SMP bare metal).
1606 if (init_ops.mp_bootaddress)
1607 physmap[1] = init_ops.mp_bootaddress(physmap[1] / 1024);
1610 * Maxmem isn't the "maximum memory", it's one larger than the
1611 * highest page of the physical address space. It should be
1612 * called something like "Maxphyspage". We may adjust this
1613 * based on ``hw.physmem'' and the results of the memory test.
1615 Maxmem = atop(physmap[physmap_idx + 1]);
1618 Maxmem = MAXMEM / 4;
1621 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
1622 Maxmem = atop(physmem_tunable);
1625 * The boot memory test is disabled by default, as it takes a
1626 * significant amount of time on large-memory systems, and is
1627 * unfriendly to virtual machines as it unnecessarily touches all
1630 * A general name is used as the code may be extended to support
1631 * additional tests beyond the current "page present" test.
1634 TUNABLE_ULONG_FETCH("hw.memtest.tests", &memtest);
1637 * Don't allow MAXMEM or hw.physmem to extend the amount of memory
1640 if (Maxmem > atop(physmap[physmap_idx + 1]))
1641 Maxmem = atop(physmap[physmap_idx + 1]);
1643 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1644 (boothowto & RB_VERBOSE))
1645 printf("Physical memory use set to %ldK\n", Maxmem * 4);
1647 /* call pmap initialization to make new kernel address space */
1648 pmap_bootstrap(&first);
1651 * Size up each available chunk of physical memory.
1653 * XXX Some BIOSes corrupt low 64KB between suspend and resume.
1654 * By default, mask off the first 16 pages unless we appear to be
1657 physmem_start = (vm_guest > VM_GUEST_NO ? 1 : 16) << PAGE_SHIFT;
1658 TUNABLE_ULONG_FETCH("hw.physmem.start", &physmem_start);
1659 if (physmem_start < PAGE_SIZE)
1660 physmap[0] = PAGE_SIZE;
1661 else if (physmem_start >= physmap[1])
1662 physmap[0] = round_page(physmap[1] - PAGE_SIZE);
1664 physmap[0] = round_page(physmem_start);
1667 phys_avail[pa_indx++] = physmap[0];
1668 phys_avail[pa_indx] = physmap[0];
1669 dump_avail[da_indx] = physmap[0];
1673 * Get dcons buffer address
1675 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
1676 getenv_quad("dcons.size", &dcons_size) == 0)
1680 * physmap is in bytes, so when converting to page boundaries,
1681 * round up the start address and round down the end address.
1683 for (i = 0; i <= physmap_idx; i += 2) {
1686 end = ptoa((vm_paddr_t)Maxmem);
1687 if (physmap[i + 1] < end)
1688 end = trunc_page(physmap[i + 1]);
1689 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1690 int tmp, page_bad, full;
1691 int *ptr = (int *)CADDR1;
1695 * block out kernel memory as not available.
1697 if (pa >= (vm_paddr_t)kernphys && pa < first)
1701 * block out dcons buffer
1704 && pa >= trunc_page(dcons_addr)
1705 && pa < dcons_addr + dcons_size)
1713 * map page into kernel: valid, read/write,non-cacheable
1715 *pte = pa | PG_V | PG_RW | PG_NC_PWT | PG_NC_PCD;
1720 * Test for alternating 1's and 0's
1722 *(volatile int *)ptr = 0xaaaaaaaa;
1723 if (*(volatile int *)ptr != 0xaaaaaaaa)
1726 * Test for alternating 0's and 1's
1728 *(volatile int *)ptr = 0x55555555;
1729 if (*(volatile int *)ptr != 0x55555555)
1734 *(volatile int *)ptr = 0xffffffff;
1735 if (*(volatile int *)ptr != 0xffffffff)
1740 *(volatile int *)ptr = 0x0;
1741 if (*(volatile int *)ptr != 0x0)
1744 * Restore original value.
1750 * Adjust array of valid/good pages.
1752 if (page_bad == TRUE)
1755 * If this good page is a continuation of the
1756 * previous set of good pages, then just increase
1757 * the end pointer. Otherwise start a new chunk.
1758 * Note that "end" points one higher than end,
1759 * making the range >= start and < end.
1760 * If we're also doing a speculative memory
1761 * test and we at or past the end, bump up Maxmem
1762 * so that we keep going. The first bad page
1763 * will terminate the loop.
1765 if (phys_avail[pa_indx] == pa) {
1766 phys_avail[pa_indx] += PAGE_SIZE;
1769 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1771 "Too many holes in the physical address space, giving up\n");
1776 phys_avail[pa_indx++] = pa; /* start */
1777 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1781 if (dump_avail[da_indx] == pa) {
1782 dump_avail[da_indx] += PAGE_SIZE;
1785 if (da_indx == DUMP_AVAIL_ARRAY_END) {
1789 dump_avail[da_indx++] = pa; /* start */
1790 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
1802 * The last chunk must contain at least one page plus the message
1803 * buffer to avoid complicating other code (message buffer address
1804 * calculation, etc.).
1806 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1807 round_page(msgbufsize) >= phys_avail[pa_indx]) {
1808 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1809 phys_avail[pa_indx--] = 0;
1810 phys_avail[pa_indx--] = 0;
1813 Maxmem = atop(phys_avail[pa_indx]);
1815 /* Trim off space for the message buffer. */
1816 phys_avail[pa_indx] -= round_page(msgbufsize);
1818 /* Map the message buffer. */
1819 msgbufp = (struct msgbuf *)PHYS_TO_DMAP(phys_avail[pa_indx]);
1823 native_parse_preload_data(u_int64_t modulep)
1827 preload_metadata = (caddr_t)(uintptr_t)(modulep + KERNBASE);
1828 preload_bootstrap_relocate(KERNBASE);
1829 kmdp = preload_search_by_type("elf kernel");
1831 kmdp = preload_search_by_type("elf64 kernel");
1832 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
1833 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *) + KERNBASE;
1835 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
1836 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
1843 hammer_time(u_int64_t modulep, u_int64_t physfree)
1848 struct nmi_pcpu *np;
1849 struct xstate_hdr *xhdr;
1854 thread0.td_kstack = physfree + KERNBASE;
1855 thread0.td_kstack_pages = KSTACK_PAGES;
1856 kstack0_sz = thread0.td_kstack_pages * PAGE_SIZE;
1857 bzero((void *)thread0.td_kstack, kstack0_sz);
1858 physfree += kstack0_sz;
1861 * This may be done better later if it gets more high level
1862 * components in it. If so just link td->td_proc here.
1864 proc_linkup0(&proc0, &thread0);
1866 kmdp = init_ops.parse_preload_data(modulep);
1868 /* Init basic tunables, hz etc */
1872 * make gdt memory segments
1874 for (x = 0; x < NGDT; x++) {
1875 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1) &&
1876 x != GUSERLDT_SEL && x != (GUSERLDT_SEL) + 1)
1877 ssdtosd(&gdt_segs[x], &gdt[x]);
1879 gdt_segs[GPROC0_SEL].ssd_base = (uintptr_t)&common_tss[0];
1880 ssdtosyssd(&gdt_segs[GPROC0_SEL],
1881 (struct system_segment_descriptor *)&gdt[GPROC0_SEL]);
1883 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1884 r_gdt.rd_base = (long) gdt;
1888 wrmsr(MSR_FSBASE, 0); /* User value */
1889 wrmsr(MSR_GSBASE, (u_int64_t)pc);
1890 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */
1892 pcpu_init(pc, 0, sizeof(struct pcpu));
1893 dpcpu_init((void *)(physfree + KERNBASE), 0);
1894 physfree += DPCPU_SIZE;
1895 PCPU_SET(prvspace, pc);
1896 PCPU_SET(curthread, &thread0);
1897 PCPU_SET(tssp, &common_tss[0]);
1898 PCPU_SET(commontssp, &common_tss[0]);
1899 PCPU_SET(tss, (struct system_segment_descriptor *)&gdt[GPROC0_SEL]);
1900 PCPU_SET(ldt, (struct system_segment_descriptor *)&gdt[GUSERLDT_SEL]);
1901 PCPU_SET(fs32p, &gdt[GUFS32_SEL]);
1902 PCPU_SET(gs32p, &gdt[GUGS32_SEL]);
1905 * Initialize mutexes.
1907 * icu_lock: in order to allow an interrupt to occur in a critical
1908 * section, to set pcpu->ipending (etc...) properly, we
1909 * must be able to get the icu lock, so it can't be
1913 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS);
1914 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_DEF);
1917 for (x = 0; x < NIDT; x++)
1918 setidt(x, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0);
1919 setidt(IDT_DE, &IDTVEC(div), SDT_SYSIGT, SEL_KPL, 0);
1920 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYSIGT, SEL_KPL, 0);
1921 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 2);
1922 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYSIGT, SEL_UPL, 0);
1923 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYSIGT, SEL_KPL, 0);
1924 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYSIGT, SEL_KPL, 0);
1925 setidt(IDT_UD, &IDTVEC(ill), SDT_SYSIGT, SEL_KPL, 0);
1926 setidt(IDT_NM, &IDTVEC(dna), SDT_SYSIGT, SEL_KPL, 0);
1927 setidt(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1);
1928 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYSIGT, SEL_KPL, 0);
1929 setidt(IDT_TS, &IDTVEC(tss), SDT_SYSIGT, SEL_KPL, 0);
1930 setidt(IDT_NP, &IDTVEC(missing), SDT_SYSIGT, SEL_KPL, 0);
1931 setidt(IDT_SS, &IDTVEC(stk), SDT_SYSIGT, SEL_KPL, 0);
1932 setidt(IDT_GP, &IDTVEC(prot), SDT_SYSIGT, SEL_KPL, 0);
1933 setidt(IDT_PF, &IDTVEC(page), SDT_SYSIGT, SEL_KPL, 0);
1934 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYSIGT, SEL_KPL, 0);
1935 setidt(IDT_AC, &IDTVEC(align), SDT_SYSIGT, SEL_KPL, 0);
1936 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 0);
1937 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYSIGT, SEL_KPL, 0);
1938 #ifdef KDTRACE_HOOKS
1939 setidt(IDT_DTRACE_RET, &IDTVEC(dtrace_ret), SDT_SYSIGT, SEL_UPL, 0);
1942 setidt(IDT_EVTCHN, &IDTVEC(xen_intr_upcall), SDT_SYSIGT, SEL_UPL, 0);
1945 r_idt.rd_limit = sizeof(idt0) - 1;
1946 r_idt.rd_base = (long) idt;
1950 * Initialize the clock before the console so that console
1951 * initialization can use DELAY().
1956 * Use vt(4) by default for UEFI boot (during the sc(4)/vt(4)
1959 if (kmdp != NULL && preload_search_info(kmdp,
1960 MODINFO_METADATA | MODINFOMD_EFI_MAP) != NULL)
1961 vty_set_preferred(VTY_VT);
1964 * Initialize the console before we print anything out.
1973 /* Reset and mask the atpics and leave them shut down. */
1977 * Point the ICU spurious interrupt vectors at the APIC spurious
1978 * interrupt handler.
1980 setidt(IDT_IO_INTS + 7, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0);
1981 setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0);
1984 #error "have you forgotten the isa device?";
1990 if (boothowto & RB_KDB)
1991 kdb_enter(KDB_WHY_BOOTFLAGS,
1992 "Boot flags requested debugger");
1995 identify_cpu(); /* Final stage of CPU initialization */
1996 initializecpu(); /* Initialize CPU registers */
1997 initializecpucache();
1999 /* doublefault stack space, runs on ist1 */
2000 common_tss[0].tss_ist1 = (long)&dblfault_stack[sizeof(dblfault_stack)];
2003 * NMI stack, runs on ist2. The pcpu pointer is stored just
2004 * above the start of the ist2 stack.
2006 np = ((struct nmi_pcpu *) &nmi0_stack[sizeof(nmi0_stack)]) - 1;
2007 np->np_pcpu = (register_t) pc;
2008 common_tss[0].tss_ist2 = (long) np;
2010 /* Set the IO permission bitmap (empty due to tss seg limit) */
2011 common_tss[0].tss_iobase = sizeof(struct amd64tss) + IOPERM_BITMAP_SIZE;
2013 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2016 /* Set up the fast syscall stuff */
2017 msr = rdmsr(MSR_EFER) | EFER_SCE;
2018 wrmsr(MSR_EFER, msr);
2019 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall));
2020 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32));
2021 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) |
2022 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48);
2023 wrmsr(MSR_STAR, msr);
2024 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D);
2026 getmemsize(kmdp, physfree);
2027 init_param2(physmem);
2029 /* now running on new page tables, configured,and u/iom is accessible */
2031 msgbufinit(msgbufp, msgbufsize);
2035 * Set up thread0 pcb after fpuinit calculated pcb + fpu save
2036 * area size. Zero out the extended state header in fpu save
2039 thread0.td_pcb = get_pcb_td(&thread0);
2040 bzero(get_pcb_user_save_td(&thread0), cpu_max_ext_state_size);
2042 xhdr = (struct xstate_hdr *)(get_pcb_user_save_td(&thread0) +
2044 xhdr->xstate_bv = xsave_mask;
2046 /* make an initial tss so cpu can get interrupt stack on syscall! */
2047 common_tss[0].tss_rsp0 = (vm_offset_t)thread0.td_pcb;
2048 /* Ensure the stack is aligned to 16 bytes */
2049 common_tss[0].tss_rsp0 &= ~0xFul;
2050 PCPU_SET(rsp0, common_tss[0].tss_rsp0);
2051 PCPU_SET(curpcb, thread0.td_pcb);
2053 /* transfer to user mode */
2055 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
2056 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
2057 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL);
2058 _ufssel = GSEL(GUFS32_SEL, SEL_UPL);
2059 _ugssel = GSEL(GUGS32_SEL, SEL_UPL);
2065 /* setup proc 0's pcb */
2066 thread0.td_pcb->pcb_flags = 0;
2067 thread0.td_pcb->pcb_cr3 = KPML4phys; /* PCID 0 is reserved for kernel */
2068 thread0.td_frame = &proc0_tf;
2070 env = getenv("kernelname");
2072 strlcpy(kernelname, env, sizeof(kernelname));
2080 /* Location of kernel stack for locore */
2081 return ((u_int64_t)thread0.td_pcb);
2085 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
2088 pcpu->pc_acpi_id = 0xffffffff;
2092 smap_sysctl_handler(SYSCTL_HANDLER_ARGS)
2094 struct bios_smap *smapbase;
2095 struct bios_smap_xattr smap;
2098 int count, error, i;
2100 /* Retrieve the system memory map from the loader. */
2101 kmdp = preload_search_by_type("elf kernel");
2103 kmdp = preload_search_by_type("elf64 kernel");
2104 smapbase = (struct bios_smap *)preload_search_info(kmdp,
2105 MODINFO_METADATA | MODINFOMD_SMAP);
2106 if (smapbase == NULL)
2108 smapattr = (uint32_t *)preload_search_info(kmdp,
2109 MODINFO_METADATA | MODINFOMD_SMAP_XATTR);
2110 count = *((uint32_t *)smapbase - 1) / sizeof(*smapbase);
2112 for (i = 0; i < count; i++) {
2113 smap.base = smapbase[i].base;
2114 smap.length = smapbase[i].length;
2115 smap.type = smapbase[i].type;
2116 if (smapattr != NULL)
2117 smap.xattr = smapattr[i];
2120 error = SYSCTL_OUT(req, &smap, sizeof(smap));
2124 SYSCTL_PROC(_machdep, OID_AUTO, smap, CTLTYPE_OPAQUE|CTLFLAG_RD, NULL, 0,
2125 smap_sysctl_handler, "S,bios_smap_xattr", "Raw BIOS SMAP data");
2128 spinlock_enter(void)
2134 if (td->td_md.md_spinlock_count == 0) {
2135 flags = intr_disable();
2136 td->td_md.md_spinlock_count = 1;
2137 td->td_md.md_saved_flags = flags;
2139 td->td_md.md_spinlock_count++;
2151 flags = td->td_md.md_saved_flags;
2152 td->td_md.md_spinlock_count--;
2153 if (td->td_md.md_spinlock_count == 0)
2154 intr_restore(flags);
2158 * Construct a PCB from a trapframe. This is called from kdb_trap() where
2159 * we want to start a backtrace from the function that caused us to enter
2160 * the debugger. We have the context in the trapframe, but base the trace
2161 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
2162 * enough for a backtrace.
2165 makectx(struct trapframe *tf, struct pcb *pcb)
2168 pcb->pcb_r12 = tf->tf_r12;
2169 pcb->pcb_r13 = tf->tf_r13;
2170 pcb->pcb_r14 = tf->tf_r14;
2171 pcb->pcb_r15 = tf->tf_r15;
2172 pcb->pcb_rbp = tf->tf_rbp;
2173 pcb->pcb_rbx = tf->tf_rbx;
2174 pcb->pcb_rip = tf->tf_rip;
2175 pcb->pcb_rsp = tf->tf_rsp;
2179 ptrace_set_pc(struct thread *td, unsigned long addr)
2182 td->td_frame->tf_rip = addr;
2183 set_pcb_flags(td->td_pcb, PCB_FULL_IRET);
2188 ptrace_single_step(struct thread *td)
2190 td->td_frame->tf_rflags |= PSL_T;
2195 ptrace_clear_single_step(struct thread *td)
2197 td->td_frame->tf_rflags &= ~PSL_T;
2202 fill_regs(struct thread *td, struct reg *regs)
2204 struct trapframe *tp;
2207 return (fill_frame_regs(tp, regs));
2211 fill_frame_regs(struct trapframe *tp, struct reg *regs)
2213 regs->r_r15 = tp->tf_r15;
2214 regs->r_r14 = tp->tf_r14;
2215 regs->r_r13 = tp->tf_r13;
2216 regs->r_r12 = tp->tf_r12;
2217 regs->r_r11 = tp->tf_r11;
2218 regs->r_r10 = tp->tf_r10;
2219 regs->r_r9 = tp->tf_r9;
2220 regs->r_r8 = tp->tf_r8;
2221 regs->r_rdi = tp->tf_rdi;
2222 regs->r_rsi = tp->tf_rsi;
2223 regs->r_rbp = tp->tf_rbp;
2224 regs->r_rbx = tp->tf_rbx;
2225 regs->r_rdx = tp->tf_rdx;
2226 regs->r_rcx = tp->tf_rcx;
2227 regs->r_rax = tp->tf_rax;
2228 regs->r_rip = tp->tf_rip;
2229 regs->r_cs = tp->tf_cs;
2230 regs->r_rflags = tp->tf_rflags;
2231 regs->r_rsp = tp->tf_rsp;
2232 regs->r_ss = tp->tf_ss;
2233 if (tp->tf_flags & TF_HASSEGS) {
2234 regs->r_ds = tp->tf_ds;
2235 regs->r_es = tp->tf_es;
2236 regs->r_fs = tp->tf_fs;
2237 regs->r_gs = tp->tf_gs;
2248 set_regs(struct thread *td, struct reg *regs)
2250 struct trapframe *tp;
2254 rflags = regs->r_rflags & 0xffffffff;
2255 if (!EFL_SECURE(rflags, tp->tf_rflags) || !CS_SECURE(regs->r_cs))
2257 tp->tf_r15 = regs->r_r15;
2258 tp->tf_r14 = regs->r_r14;
2259 tp->tf_r13 = regs->r_r13;
2260 tp->tf_r12 = regs->r_r12;
2261 tp->tf_r11 = regs->r_r11;
2262 tp->tf_r10 = regs->r_r10;
2263 tp->tf_r9 = regs->r_r9;
2264 tp->tf_r8 = regs->r_r8;
2265 tp->tf_rdi = regs->r_rdi;
2266 tp->tf_rsi = regs->r_rsi;
2267 tp->tf_rbp = regs->r_rbp;
2268 tp->tf_rbx = regs->r_rbx;
2269 tp->tf_rdx = regs->r_rdx;
2270 tp->tf_rcx = regs->r_rcx;
2271 tp->tf_rax = regs->r_rax;
2272 tp->tf_rip = regs->r_rip;
2273 tp->tf_cs = regs->r_cs;
2274 tp->tf_rflags = rflags;
2275 tp->tf_rsp = regs->r_rsp;
2276 tp->tf_ss = regs->r_ss;
2277 if (0) { /* XXXKIB */
2278 tp->tf_ds = regs->r_ds;
2279 tp->tf_es = regs->r_es;
2280 tp->tf_fs = regs->r_fs;
2281 tp->tf_gs = regs->r_gs;
2282 tp->tf_flags = TF_HASSEGS;
2284 set_pcb_flags(td->td_pcb, PCB_FULL_IRET);
2288 /* XXX check all this stuff! */
2289 /* externalize from sv_xmm */
2291 fill_fpregs_xmm(struct savefpu *sv_xmm, struct fpreg *fpregs)
2293 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env;
2294 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2298 bzero(fpregs, sizeof(*fpregs));
2300 /* FPU control/status */
2301 penv_fpreg->en_cw = penv_xmm->en_cw;
2302 penv_fpreg->en_sw = penv_xmm->en_sw;
2303 penv_fpreg->en_tw = penv_xmm->en_tw;
2304 penv_fpreg->en_opcode = penv_xmm->en_opcode;
2305 penv_fpreg->en_rip = penv_xmm->en_rip;
2306 penv_fpreg->en_rdp = penv_xmm->en_rdp;
2307 penv_fpreg->en_mxcsr = penv_xmm->en_mxcsr;
2308 penv_fpreg->en_mxcsr_mask = penv_xmm->en_mxcsr_mask;
2311 for (i = 0; i < 8; ++i)
2312 bcopy(sv_xmm->sv_fp[i].fp_acc.fp_bytes, fpregs->fpr_acc[i], 10);
2315 for (i = 0; i < 16; ++i)
2316 bcopy(sv_xmm->sv_xmm[i].xmm_bytes, fpregs->fpr_xacc[i], 16);
2319 /* internalize from fpregs into sv_xmm */
2321 set_fpregs_xmm(struct fpreg *fpregs, struct savefpu *sv_xmm)
2323 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2324 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env;
2328 /* FPU control/status */
2329 penv_xmm->en_cw = penv_fpreg->en_cw;
2330 penv_xmm->en_sw = penv_fpreg->en_sw;
2331 penv_xmm->en_tw = penv_fpreg->en_tw;
2332 penv_xmm->en_opcode = penv_fpreg->en_opcode;
2333 penv_xmm->en_rip = penv_fpreg->en_rip;
2334 penv_xmm->en_rdp = penv_fpreg->en_rdp;
2335 penv_xmm->en_mxcsr = penv_fpreg->en_mxcsr;
2336 penv_xmm->en_mxcsr_mask = penv_fpreg->en_mxcsr_mask & cpu_mxcsr_mask;
2339 for (i = 0; i < 8; ++i)
2340 bcopy(fpregs->fpr_acc[i], sv_xmm->sv_fp[i].fp_acc.fp_bytes, 10);
2343 for (i = 0; i < 16; ++i)
2344 bcopy(fpregs->fpr_xacc[i], sv_xmm->sv_xmm[i].xmm_bytes, 16);
2347 /* externalize from td->pcb */
2349 fill_fpregs(struct thread *td, struct fpreg *fpregs)
2352 KASSERT(td == curthread || TD_IS_SUSPENDED(td) ||
2353 P_SHOULDSTOP(td->td_proc),
2354 ("not suspended thread %p", td));
2356 fill_fpregs_xmm(get_pcb_user_save_td(td), fpregs);
2360 /* internalize to td->pcb */
2362 set_fpregs(struct thread *td, struct fpreg *fpregs)
2365 set_fpregs_xmm(fpregs, get_pcb_user_save_td(td));
2371 * Get machine context.
2374 get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
2377 struct trapframe *tp;
2381 PROC_LOCK(curthread->td_proc);
2382 mcp->mc_onstack = sigonstack(tp->tf_rsp);
2383 PROC_UNLOCK(curthread->td_proc);
2384 mcp->mc_r15 = tp->tf_r15;
2385 mcp->mc_r14 = tp->tf_r14;
2386 mcp->mc_r13 = tp->tf_r13;
2387 mcp->mc_r12 = tp->tf_r12;
2388 mcp->mc_r11 = tp->tf_r11;
2389 mcp->mc_r10 = tp->tf_r10;
2390 mcp->mc_r9 = tp->tf_r9;
2391 mcp->mc_r8 = tp->tf_r8;
2392 mcp->mc_rdi = tp->tf_rdi;
2393 mcp->mc_rsi = tp->tf_rsi;
2394 mcp->mc_rbp = tp->tf_rbp;
2395 mcp->mc_rbx = tp->tf_rbx;
2396 mcp->mc_rcx = tp->tf_rcx;
2397 mcp->mc_rflags = tp->tf_rflags;
2398 if (flags & GET_MC_CLEAR_RET) {
2401 mcp->mc_rflags &= ~PSL_C;
2403 mcp->mc_rax = tp->tf_rax;
2404 mcp->mc_rdx = tp->tf_rdx;
2406 mcp->mc_rip = tp->tf_rip;
2407 mcp->mc_cs = tp->tf_cs;
2408 mcp->mc_rsp = tp->tf_rsp;
2409 mcp->mc_ss = tp->tf_ss;
2410 mcp->mc_ds = tp->tf_ds;
2411 mcp->mc_es = tp->tf_es;
2412 mcp->mc_fs = tp->tf_fs;
2413 mcp->mc_gs = tp->tf_gs;
2414 mcp->mc_flags = tp->tf_flags;
2415 mcp->mc_len = sizeof(*mcp);
2416 get_fpcontext(td, mcp, NULL, 0);
2417 mcp->mc_fsbase = pcb->pcb_fsbase;
2418 mcp->mc_gsbase = pcb->pcb_gsbase;
2419 mcp->mc_xfpustate = 0;
2420 mcp->mc_xfpustate_len = 0;
2421 bzero(mcp->mc_spare, sizeof(mcp->mc_spare));
2426 * Set machine context.
2428 * However, we don't set any but the user modifiable flags, and we won't
2429 * touch the cs selector.
2432 set_mcontext(struct thread *td, const mcontext_t *mcp)
2435 struct trapframe *tp;
2442 if (mcp->mc_len != sizeof(*mcp) ||
2443 (mcp->mc_flags & ~_MC_FLAG_MASK) != 0)
2445 rflags = (mcp->mc_rflags & PSL_USERCHANGE) |
2446 (tp->tf_rflags & ~PSL_USERCHANGE);
2447 if (mcp->mc_flags & _MC_HASFPXSTATE) {
2448 if (mcp->mc_xfpustate_len > cpu_max_ext_state_size -
2449 sizeof(struct savefpu))
2451 xfpustate = __builtin_alloca(mcp->mc_xfpustate_len);
2452 ret = copyin((void *)mcp->mc_xfpustate, xfpustate,
2453 mcp->mc_xfpustate_len);
2458 ret = set_fpcontext(td, mcp, xfpustate, mcp->mc_xfpustate_len);
2461 tp->tf_r15 = mcp->mc_r15;
2462 tp->tf_r14 = mcp->mc_r14;
2463 tp->tf_r13 = mcp->mc_r13;
2464 tp->tf_r12 = mcp->mc_r12;
2465 tp->tf_r11 = mcp->mc_r11;
2466 tp->tf_r10 = mcp->mc_r10;
2467 tp->tf_r9 = mcp->mc_r9;
2468 tp->tf_r8 = mcp->mc_r8;
2469 tp->tf_rdi = mcp->mc_rdi;
2470 tp->tf_rsi = mcp->mc_rsi;
2471 tp->tf_rbp = mcp->mc_rbp;
2472 tp->tf_rbx = mcp->mc_rbx;
2473 tp->tf_rdx = mcp->mc_rdx;
2474 tp->tf_rcx = mcp->mc_rcx;
2475 tp->tf_rax = mcp->mc_rax;
2476 tp->tf_rip = mcp->mc_rip;
2477 tp->tf_rflags = rflags;
2478 tp->tf_rsp = mcp->mc_rsp;
2479 tp->tf_ss = mcp->mc_ss;
2480 tp->tf_flags = mcp->mc_flags;
2481 if (tp->tf_flags & TF_HASSEGS) {
2482 tp->tf_ds = mcp->mc_ds;
2483 tp->tf_es = mcp->mc_es;
2484 tp->tf_fs = mcp->mc_fs;
2485 tp->tf_gs = mcp->mc_gs;
2487 if (mcp->mc_flags & _MC_HASBASES) {
2488 pcb->pcb_fsbase = mcp->mc_fsbase;
2489 pcb->pcb_gsbase = mcp->mc_gsbase;
2491 set_pcb_flags(pcb, PCB_FULL_IRET);
2496 get_fpcontext(struct thread *td, mcontext_t *mcp, char *xfpusave,
2497 size_t xfpusave_len)
2499 size_t max_len, len;
2501 mcp->mc_ownedfp = fpugetregs(td);
2502 bcopy(get_pcb_user_save_td(td), &mcp->mc_fpstate[0],
2503 sizeof(mcp->mc_fpstate));
2504 mcp->mc_fpformat = fpuformat();
2505 if (!use_xsave || xfpusave_len == 0)
2507 max_len = cpu_max_ext_state_size - sizeof(struct savefpu);
2509 if (len > max_len) {
2511 bzero(xfpusave + max_len, len - max_len);
2513 mcp->mc_flags |= _MC_HASFPXSTATE;
2514 mcp->mc_xfpustate_len = len;
2515 bcopy(get_pcb_user_save_td(td) + 1, xfpusave, len);
2519 set_fpcontext(struct thread *td, const mcontext_t *mcp, char *xfpustate,
2520 size_t xfpustate_len)
2522 struct savefpu *fpstate;
2525 if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
2527 else if (mcp->mc_fpformat != _MC_FPFMT_XMM)
2529 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) {
2530 /* We don't care what state is left in the FPU or PCB. */
2533 } else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
2534 mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
2535 fpstate = (struct savefpu *)&mcp->mc_fpstate;
2536 fpstate->sv_env.en_mxcsr &= cpu_mxcsr_mask;
2537 error = fpusetregs(td, fpstate, xfpustate, xfpustate_len);
2544 fpstate_drop(struct thread *td)
2547 KASSERT(PCB_USER_FPU(td->td_pcb), ("fpstate_drop: kernel-owned fpu"));
2549 if (PCPU_GET(fpcurthread) == td)
2552 * XXX force a full drop of the fpu. The above only drops it if we
2555 * XXX I don't much like fpugetuserregs()'s semantics of doing a full
2556 * drop. Dropping only to the pcb matches fnsave's behaviour.
2557 * We only need to drop to !PCB_INITDONE in sendsig(). But
2558 * sendsig() is the only caller of fpugetuserregs()... perhaps we just
2559 * have too many layers.
2561 clear_pcb_flags(curthread->td_pcb,
2562 PCB_FPUINITDONE | PCB_USERFPUINITDONE);
2567 fill_dbregs(struct thread *td, struct dbreg *dbregs)
2572 dbregs->dr[0] = rdr0();
2573 dbregs->dr[1] = rdr1();
2574 dbregs->dr[2] = rdr2();
2575 dbregs->dr[3] = rdr3();
2576 dbregs->dr[6] = rdr6();
2577 dbregs->dr[7] = rdr7();
2580 dbregs->dr[0] = pcb->pcb_dr0;
2581 dbregs->dr[1] = pcb->pcb_dr1;
2582 dbregs->dr[2] = pcb->pcb_dr2;
2583 dbregs->dr[3] = pcb->pcb_dr3;
2584 dbregs->dr[6] = pcb->pcb_dr6;
2585 dbregs->dr[7] = pcb->pcb_dr7;
2601 set_dbregs(struct thread *td, struct dbreg *dbregs)
2607 load_dr0(dbregs->dr[0]);
2608 load_dr1(dbregs->dr[1]);
2609 load_dr2(dbregs->dr[2]);
2610 load_dr3(dbregs->dr[3]);
2611 load_dr6(dbregs->dr[6]);
2612 load_dr7(dbregs->dr[7]);
2615 * Don't let an illegal value for dr7 get set. Specifically,
2616 * check for undefined settings. Setting these bit patterns
2617 * result in undefined behaviour and can lead to an unexpected
2618 * TRCTRAP or a general protection fault right here.
2619 * Upper bits of dr6 and dr7 must not be set
2621 for (i = 0; i < 4; i++) {
2622 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02)
2624 if (td->td_frame->tf_cs == _ucode32sel &&
2625 DBREG_DR7_LEN(dbregs->dr[7], i) == DBREG_DR7_LEN_8)
2628 if ((dbregs->dr[6] & 0xffffffff00000000ul) != 0 ||
2629 (dbregs->dr[7] & 0xffffffff00000000ul) != 0)
2635 * Don't let a process set a breakpoint that is not within the
2636 * process's address space. If a process could do this, it
2637 * could halt the system by setting a breakpoint in the kernel
2638 * (if ddb was enabled). Thus, we need to check to make sure
2639 * that no breakpoints are being enabled for addresses outside
2640 * process's address space.
2642 * XXX - what about when the watched area of the user's
2643 * address space is written into from within the kernel
2644 * ... wouldn't that still cause a breakpoint to be generated
2645 * from within kernel mode?
2648 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) {
2649 /* dr0 is enabled */
2650 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS)
2653 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) {
2654 /* dr1 is enabled */
2655 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS)
2658 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) {
2659 /* dr2 is enabled */
2660 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS)
2663 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) {
2664 /* dr3 is enabled */
2665 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS)
2669 pcb->pcb_dr0 = dbregs->dr[0];
2670 pcb->pcb_dr1 = dbregs->dr[1];
2671 pcb->pcb_dr2 = dbregs->dr[2];
2672 pcb->pcb_dr3 = dbregs->dr[3];
2673 pcb->pcb_dr6 = dbregs->dr[6];
2674 pcb->pcb_dr7 = dbregs->dr[7];
2676 set_pcb_flags(pcb, PCB_DBREGS);
2686 load_dr7(0); /* Turn off the control bits first */
2695 * Return > 0 if a hardware breakpoint has been hit, and the
2696 * breakpoint was in user space. Return 0, otherwise.
2699 user_dbreg_trap(void)
2701 u_int64_t dr7, dr6; /* debug registers dr6 and dr7 */
2702 u_int64_t bp; /* breakpoint bits extracted from dr6 */
2703 int nbp; /* number of breakpoints that triggered */
2704 caddr_t addr[4]; /* breakpoint addresses */
2708 if ((dr7 & 0x000000ff) == 0) {
2710 * all GE and LE bits in the dr7 register are zero,
2711 * thus the trap couldn't have been caused by the
2712 * hardware debug registers
2719 bp = dr6 & 0x0000000f;
2723 * None of the breakpoint bits are set meaning this
2724 * trap was not caused by any of the debug registers
2730 * at least one of the breakpoints were hit, check to see
2731 * which ones and if any of them are user space addresses
2735 addr[nbp++] = (caddr_t)rdr0();
2738 addr[nbp++] = (caddr_t)rdr1();
2741 addr[nbp++] = (caddr_t)rdr2();
2744 addr[nbp++] = (caddr_t)rdr3();
2747 for (i = 0; i < nbp; i++) {
2748 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) {
2750 * addr[i] is in user space
2757 * None of the breakpoints are in user space.
2765 * Provide inb() and outb() as functions. They are normally only available as
2766 * inline functions, thus cannot be called from the debugger.
2769 /* silence compiler warnings */
2770 u_char inb_(u_short);
2771 void outb_(u_short, u_char);
2780 outb_(u_short port, u_char data)