2 * Copyright (c) 2003 Peter Wemm.
3 * Copyright (c) 1992 Terrence R. Lambert.
4 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
7 * This code is derived from software contributed to Berkeley by
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the University of
21 * California, Berkeley and its contributors.
22 * 4. Neither the name of the University nor the names of its contributors
23 * may be used to endorse or promote products derived from this software
24 * without specific prior written permission.
26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
41 #include <sys/cdefs.h>
42 __FBSDID("$FreeBSD$");
44 #include "opt_atpic.h"
45 #include "opt_compat.h"
50 #include "opt_kstack_pages.h"
51 #include "opt_maxmem.h"
52 #include "opt_mp_watchdog.h"
53 #include "opt_perfmon.h"
54 #include "opt_platform.h"
55 #include "opt_sched.h"
57 #include <sys/param.h>
59 #include <sys/systm.h>
63 #include <sys/callout.h>
67 #include <sys/eventhandler.h>
69 #include <sys/imgact.h>
71 #include <sys/kernel.h>
73 #include <sys/linker.h>
75 #include <sys/malloc.h>
76 #include <sys/memrange.h>
77 #include <sys/msgbuf.h>
78 #include <sys/mutex.h>
80 #include <sys/ptrace.h>
81 #include <sys/reboot.h>
82 #include <sys/rwlock.h>
83 #include <sys/sched.h>
84 #include <sys/signalvar.h>
88 #include <sys/syscallsubr.h>
89 #include <sys/sysctl.h>
90 #include <sys/sysent.h>
91 #include <sys/sysproto.h>
92 #include <sys/ucontext.h>
93 #include <sys/vmmeter.h>
96 #include <vm/vm_extern.h>
97 #include <vm/vm_kern.h>
98 #include <vm/vm_page.h>
99 #include <vm/vm_map.h>
100 #include <vm/vm_object.h>
101 #include <vm/vm_pager.h>
102 #include <vm/vm_param.h>
106 #error KDB must be enabled in order for DDB to work!
109 #include <ddb/db_sym.h>
112 #include <net/netisr.h>
114 #include <machine/clock.h>
115 #include <machine/cpu.h>
116 #include <machine/cputypes.h>
117 #include <machine/intr_machdep.h>
119 #include <machine/md_var.h>
120 #include <machine/metadata.h>
121 #include <machine/mp_watchdog.h>
122 #include <machine/pc/bios.h>
123 #include <machine/pcb.h>
124 #include <machine/proc.h>
125 #include <machine/reg.h>
126 #include <machine/sigframe.h>
127 #include <machine/specialreg.h>
129 #include <machine/perfmon.h>
131 #include <machine/tss.h>
133 #include <machine/smp.h>
140 #include <x86/isa/icu.h>
142 #include <x86/apicvar.h>
145 #include <isa/isareg.h>
147 #include <x86/init.h>
149 /* Sanity check for __curthread() */
150 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
152 extern u_int64_t hammer_time(u_int64_t, u_int64_t);
154 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
155 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
157 static void cpu_startup(void *);
158 static void get_fpcontext(struct thread *td, mcontext_t *mcp,
159 char *xfpusave, size_t xfpusave_len);
160 static int set_fpcontext(struct thread *td, const mcontext_t *mcp,
161 char *xfpustate, size_t xfpustate_len);
162 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
164 /* Preload data parse function */
165 static caddr_t native_parse_preload_data(u_int64_t);
167 /* Native function to fetch and parse the e820 map */
168 static void native_parse_memmap(caddr_t, vm_paddr_t *, int *);
170 /* Default init_ops implementation. */
171 struct init_ops init_ops = {
172 .parse_preload_data = native_parse_preload_data,
173 .early_clock_source_init = i8254_init,
174 .early_delay = i8254_delay,
175 .parse_memmap = native_parse_memmap,
177 .mp_bootaddress = mp_bootaddress,
178 .start_all_aps = native_start_all_aps,
180 .msi_init = msi_init,
184 * The file "conf/ldscript.amd64" defines the symbol "kernphys". Its value is
185 * the physical address at which the kernel is loaded.
187 extern char kernphys[];
189 struct msgbuf *msgbufp;
191 /* Intel ICH registers */
192 #define ICH_PMBASE 0x400
193 #define ICH_SMI_EN ICH_PMBASE + 0x30
195 int _udatasel, _ucodesel, _ucode32sel, _ufssel, _ugssel;
203 * The number of PHYSMAP entries must be one less than the number of
204 * PHYSSEG entries because the PHYSMAP entry that spans the largest
205 * physical address that is accessible by ISA DMA is split into two
208 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
210 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
211 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
213 /* must be 2 less so 0 0 can signal end of chunks */
214 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2)
215 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2)
217 struct kva_md_info kmi;
219 static struct trapframe proc0_tf;
220 struct region_descriptor r_gdt, r_idt;
222 struct pcpu __pcpu[MAXCPU];
226 struct mem_range_softc mem_range_softc;
228 struct mtx dt_lock; /* lock for GDT and LDT */
230 void (*vmm_resume_p)(void);
240 * On MacBooks, we need to disallow the legacy USB circuit to
241 * generate an SMI# because this can cause several problems,
242 * namely: incorrect CPU frequency detection and failure to
244 * We do this by disabling a bit in the SMI_EN (SMI Control and
245 * Enable register) of the Intel ICH LPC Interface Bridge.
247 sysenv = getenv("smbios.system.product");
248 if (sysenv != NULL) {
249 if (strncmp(sysenv, "MacBook1,1", 10) == 0 ||
250 strncmp(sysenv, "MacBook3,1", 10) == 0 ||
251 strncmp(sysenv, "MacBook4,1", 10) == 0 ||
252 strncmp(sysenv, "MacBookPro1,1", 13) == 0 ||
253 strncmp(sysenv, "MacBookPro1,2", 13) == 0 ||
254 strncmp(sysenv, "MacBookPro3,1", 13) == 0 ||
255 strncmp(sysenv, "MacBookPro4,1", 13) == 0 ||
256 strncmp(sysenv, "Macmini1,1", 10) == 0) {
258 printf("Disabling LEGACY_USB_EN bit on "
260 outl(ICH_SMI_EN, inl(ICH_SMI_EN) & ~0x8);
266 * Good {morning,afternoon,evening,night}.
270 panicifcpuunsupported();
276 * Display physical memory if SMBIOS reports reasonable amount.
279 sysenv = getenv("smbios.memory.enabled");
280 if (sysenv != NULL) {
281 memsize = (uintmax_t)strtoul(sysenv, (char **)NULL, 10) << 10;
284 if (memsize < ptoa((uintmax_t)vm_cnt.v_free_count))
285 memsize = ptoa((uintmax_t)Maxmem);
286 printf("real memory = %ju (%ju MB)\n", memsize, memsize >> 20);
287 realmem = atop(memsize);
290 * Display any holes after the first chunk of extended memory.
295 printf("Physical memory chunk(s):\n");
296 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
299 size = phys_avail[indx + 1] - phys_avail[indx];
301 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n",
302 (uintmax_t)phys_avail[indx],
303 (uintmax_t)phys_avail[indx + 1] - 1,
304 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
308 vm_ksubmap_init(&kmi);
310 printf("avail memory = %ju (%ju MB)\n",
311 ptoa((uintmax_t)vm_cnt.v_free_count),
312 ptoa((uintmax_t)vm_cnt.v_free_count) / 1048576);
315 * Set up buffers, so they can be used to read disk labels.
318 vm_pager_bufferinit();
324 * Send an interrupt to process.
326 * Stack is set up to allow sigcode stored
327 * at top to call routine, followed by call
328 * to sigreturn routine below. After sigreturn
329 * resets the signal mask, the stack, and the
330 * frame pointer, it returns to the user
334 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
336 struct sigframe sf, *sfp;
342 struct trapframe *regs;
351 PROC_LOCK_ASSERT(p, MA_OWNED);
352 sig = ksi->ksi_signo;
354 mtx_assert(&psp->ps_mtx, MA_OWNED);
356 oonstack = sigonstack(regs->tf_rsp);
358 if (cpu_max_ext_state_size > sizeof(struct savefpu) && use_xsave) {
359 xfpusave_len = cpu_max_ext_state_size - sizeof(struct savefpu);
360 xfpusave = __builtin_alloca(xfpusave_len);
366 /* Save user context. */
367 bzero(&sf, sizeof(sf));
368 sf.sf_uc.uc_sigmask = *mask;
369 sf.sf_uc.uc_stack = td->td_sigstk;
370 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
371 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
372 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
373 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(*regs));
374 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */
375 get_fpcontext(td, &sf.sf_uc.uc_mcontext, xfpusave, xfpusave_len);
377 sf.sf_uc.uc_mcontext.mc_fsbase = pcb->pcb_fsbase;
378 sf.sf_uc.uc_mcontext.mc_gsbase = pcb->pcb_gsbase;
379 bzero(sf.sf_uc.uc_mcontext.mc_spare,
380 sizeof(sf.sf_uc.uc_mcontext.mc_spare));
381 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__));
383 /* Allocate space for the signal handler context. */
384 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
385 SIGISMEMBER(psp->ps_sigonstack, sig)) {
386 sp = td->td_sigstk.ss_sp + td->td_sigstk.ss_size;
387 #if defined(COMPAT_43)
388 td->td_sigstk.ss_flags |= SS_ONSTACK;
391 sp = (char *)regs->tf_rsp - 128;
392 if (xfpusave != NULL) {
394 sp = (char *)((unsigned long)sp & ~0x3Ful);
395 sf.sf_uc.uc_mcontext.mc_xfpustate = (register_t)sp;
397 sp -= sizeof(struct sigframe);
398 /* Align to 16 bytes. */
399 sfp = (struct sigframe *)((unsigned long)sp & ~0xFul);
401 /* Translate the signal if appropriate. */
402 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
403 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
405 /* Build the argument list for the signal handler. */
406 regs->tf_rdi = sig; /* arg 1 in %rdi */
407 regs->tf_rdx = (register_t)&sfp->sf_uc; /* arg 3 in %rdx */
408 bzero(&sf.sf_si, sizeof(sf.sf_si));
409 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
410 /* Signal handler installed with SA_SIGINFO. */
411 regs->tf_rsi = (register_t)&sfp->sf_si; /* arg 2 in %rsi */
412 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
414 /* Fill in POSIX parts */
415 sf.sf_si = ksi->ksi_info;
416 sf.sf_si.si_signo = sig; /* maybe a translated signal */
417 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */
419 /* Old FreeBSD-style arguments. */
420 regs->tf_rsi = ksi->ksi_code; /* arg 2 in %rsi */
421 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */
422 sf.sf_ahu.sf_handler = catcher;
424 mtx_unlock(&psp->ps_mtx);
428 * Copy the sigframe out to the user's stack.
430 if (copyout(&sf, sfp, sizeof(*sfp)) != 0 ||
431 (xfpusave != NULL && copyout(xfpusave,
432 (void *)sf.sf_uc.uc_mcontext.mc_xfpustate, xfpusave_len)
435 printf("process %ld has trashed its stack\n", (long)p->p_pid);
441 regs->tf_rsp = (long)sfp;
442 regs->tf_rip = p->p_sysent->sv_sigcode_base;
443 regs->tf_rflags &= ~(PSL_T | PSL_D);
444 regs->tf_cs = _ucodesel;
445 regs->tf_ds = _udatasel;
446 regs->tf_es = _udatasel;
447 regs->tf_fs = _ufssel;
448 regs->tf_gs = _ugssel;
449 regs->tf_flags = TF_HASSEGS;
450 set_pcb_flags(pcb, PCB_FULL_IRET);
452 mtx_lock(&psp->ps_mtx);
456 * System call to cleanup state after a signal
457 * has been taken. Reset signal mask and
458 * stack state from context left by sendsig (above).
459 * Return to previous pc and psl as specified by
460 * context left by sendsig. Check carefully to
461 * make sure that the user has not modified the
462 * state to gain improper privileges.
467 sys_sigreturn(td, uap)
469 struct sigreturn_args /* {
470 const struct __ucontext *sigcntxp;
476 struct trapframe *regs;
479 size_t xfpustate_len;
487 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
489 uprintf("pid %d (%s): sigreturn copyin failed\n",
490 p->p_pid, td->td_name);
494 if ((ucp->uc_mcontext.mc_flags & ~_MC_FLAG_MASK) != 0) {
495 uprintf("pid %d (%s): sigreturn mc_flags %x\n", p->p_pid,
496 td->td_name, ucp->uc_mcontext.mc_flags);
500 rflags = ucp->uc_mcontext.mc_rflags;
502 * Don't allow users to change privileged or reserved flags.
504 if (!EFL_SECURE(rflags, regs->tf_rflags)) {
505 uprintf("pid %d (%s): sigreturn rflags = 0x%lx\n", p->p_pid,
506 td->td_name, rflags);
511 * Don't allow users to load a valid privileged %cs. Let the
512 * hardware check for invalid selectors, excess privilege in
513 * other selectors, invalid %eip's and invalid %esp's.
515 cs = ucp->uc_mcontext.mc_cs;
516 if (!CS_SECURE(cs)) {
517 uprintf("pid %d (%s): sigreturn cs = 0x%x\n", p->p_pid,
519 ksiginfo_init_trap(&ksi);
520 ksi.ksi_signo = SIGBUS;
521 ksi.ksi_code = BUS_OBJERR;
522 ksi.ksi_trapno = T_PROTFLT;
523 ksi.ksi_addr = (void *)regs->tf_rip;
524 trapsignal(td, &ksi);
528 if ((uc.uc_mcontext.mc_flags & _MC_HASFPXSTATE) != 0) {
529 xfpustate_len = uc.uc_mcontext.mc_xfpustate_len;
530 if (xfpustate_len > cpu_max_ext_state_size -
531 sizeof(struct savefpu)) {
532 uprintf("pid %d (%s): sigreturn xfpusave_len = 0x%zx\n",
533 p->p_pid, td->td_name, xfpustate_len);
536 xfpustate = __builtin_alloca(xfpustate_len);
537 error = copyin((const void *)uc.uc_mcontext.mc_xfpustate,
538 xfpustate, xfpustate_len);
541 "pid %d (%s): sigreturn copying xfpustate failed\n",
542 p->p_pid, td->td_name);
549 ret = set_fpcontext(td, &ucp->uc_mcontext, xfpustate, xfpustate_len);
551 uprintf("pid %d (%s): sigreturn set_fpcontext err %d\n",
552 p->p_pid, td->td_name, ret);
555 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(*regs));
556 pcb->pcb_fsbase = ucp->uc_mcontext.mc_fsbase;
557 pcb->pcb_gsbase = ucp->uc_mcontext.mc_gsbase;
559 #if defined(COMPAT_43)
560 if (ucp->uc_mcontext.mc_onstack & 1)
561 td->td_sigstk.ss_flags |= SS_ONSTACK;
563 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
566 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
567 set_pcb_flags(pcb, PCB_FULL_IRET);
568 return (EJUSTRETURN);
571 #ifdef COMPAT_FREEBSD4
573 freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap)
576 return sys_sigreturn(td, (struct sigreturn_args *)uap);
582 * Machine dependent boot() routine
584 * I haven't seen anything to put here yet
585 * Possibly some stuff might be grafted back here from boot()
593 * Flush the D-cache for non-DMA I/O so that the I-cache can
594 * be made coherent later.
597 cpu_flush_dcache(void *ptr, size_t len)
602 /* Get current clock frequency for the given cpu id. */
604 cpu_est_clockrate(int cpu_id, uint64_t *rate)
607 uint64_t acnt, mcnt, perf;
610 if (pcpu_find(cpu_id) == NULL || rate == NULL)
614 * If TSC is P-state invariant and APERF/MPERF MSRs do not exist,
615 * DELAY(9) based logic fails.
617 if (tsc_is_invariant && !tsc_perf_stat)
622 /* Schedule ourselves on the indicated cpu. */
623 thread_lock(curthread);
624 sched_bind(curthread, cpu_id);
625 thread_unlock(curthread);
629 /* Calibrate by measuring a short delay. */
630 reg = intr_disable();
631 if (tsc_is_invariant) {
636 mcnt = rdmsr(MSR_MPERF);
637 acnt = rdmsr(MSR_APERF);
640 perf = 1000 * acnt / mcnt;
641 *rate = (tsc2 - tsc1) * perf;
647 *rate = (tsc2 - tsc1) * 1000;
652 thread_lock(curthread);
653 sched_unbind(curthread);
654 thread_unlock(curthread);
662 * Shutdown the CPU as much as possible
671 void (*cpu_idle_hook)(sbintime_t) = NULL; /* ACPI idle hook. */
672 static int cpu_ident_amdc1e = 0; /* AMD C1E supported. */
673 static int idle_mwait = 1; /* Use MONITOR/MWAIT for short idle. */
674 SYSCTL_INT(_machdep, OID_AUTO, idle_mwait, CTLFLAG_RWTUN, &idle_mwait,
675 0, "Use MONITOR/MWAIT for short idle");
677 #define STATE_RUNNING 0x0
678 #define STATE_MWAIT 0x1
679 #define STATE_SLEEPING 0x2
682 cpu_idle_acpi(sbintime_t sbt)
686 state = (int *)PCPU_PTR(monitorbuf);
687 *state = STATE_SLEEPING;
689 /* See comments in cpu_idle_hlt(). */
691 if (sched_runnable())
693 else if (cpu_idle_hook)
696 __asm __volatile("sti; hlt");
697 *state = STATE_RUNNING;
701 cpu_idle_hlt(sbintime_t sbt)
705 state = (int *)PCPU_PTR(monitorbuf);
706 *state = STATE_SLEEPING;
709 * Since we may be in a critical section from cpu_idle(), if
710 * an interrupt fires during that critical section we may have
711 * a pending preemption. If the CPU halts, then that thread
712 * may not execute until a later interrupt awakens the CPU.
713 * To handle this race, check for a runnable thread after
714 * disabling interrupts and immediately return if one is
715 * found. Also, we must absolutely guarentee that hlt is
716 * the next instruction after sti. This ensures that any
717 * interrupt that fires after the call to disable_intr() will
718 * immediately awaken the CPU from hlt. Finally, please note
719 * that on x86 this works fine because of interrupts enabled only
720 * after the instruction following sti takes place, while IF is set
721 * to 1 immediately, allowing hlt instruction to acknowledge the
725 if (sched_runnable())
728 __asm __volatile("sti; hlt");
729 *state = STATE_RUNNING;
733 * MWAIT cpu power states. Lower 4 bits are sub-states.
735 #define MWAIT_C0 0xf0
736 #define MWAIT_C1 0x00
737 #define MWAIT_C2 0x10
738 #define MWAIT_C3 0x20
739 #define MWAIT_C4 0x30
742 cpu_idle_mwait(sbintime_t sbt)
746 state = (int *)PCPU_PTR(monitorbuf);
747 *state = STATE_MWAIT;
749 /* See comments in cpu_idle_hlt(). */
751 if (sched_runnable()) {
753 *state = STATE_RUNNING;
756 cpu_monitor(state, 0, 0);
757 if (*state == STATE_MWAIT)
758 __asm __volatile("sti; mwait" : : "a" (MWAIT_C1), "c" (0));
761 *state = STATE_RUNNING;
765 cpu_idle_spin(sbintime_t sbt)
770 state = (int *)PCPU_PTR(monitorbuf);
771 *state = STATE_RUNNING;
774 * The sched_runnable() call is racy but as long as there is
775 * a loop missing it one time will have just a little impact if any
776 * (and it is much better than missing the check at all).
778 for (i = 0; i < 1000; i++) {
779 if (sched_runnable())
786 * C1E renders the local APIC timer dead, so we disable it by
787 * reading the Interrupt Pending Message register and clearing
788 * both C1eOnCmpHalt (bit 28) and SmiOnCmpHalt (bit 27).
791 * "BIOS and Kernel Developer's Guide for AMD NPT Family 0Fh Processors"
792 * #32559 revision 3.00+
794 #define MSR_AMDK8_IPM 0xc0010055
795 #define AMDK8_SMIONCMPHALT (1ULL << 27)
796 #define AMDK8_C1EONCMPHALT (1ULL << 28)
797 #define AMDK8_CMPHALT (AMDK8_SMIONCMPHALT | AMDK8_C1EONCMPHALT)
800 cpu_probe_amdc1e(void)
804 * Detect the presence of C1E capability mostly on latest
805 * dual-cores (or future) k8 family.
807 if (cpu_vendor_id == CPU_VENDOR_AMD &&
808 (cpu_id & 0x00000f00) == 0x00000f00 &&
809 (cpu_id & 0x0fff0000) >= 0x00040000) {
810 cpu_ident_amdc1e = 1;
814 void (*cpu_idle_fn)(sbintime_t) = cpu_idle_acpi;
822 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d",
825 ap_watchdog(PCPU_GET(cpuid));
827 /* If we are busy - try to use fast methods. */
829 if ((cpu_feature2 & CPUID2_MON) && idle_mwait) {
830 cpu_idle_mwait(busy);
835 /* If we have time - switch timers into idle mode. */
838 sbt = cpu_idleclock();
841 /* Apply AMD APIC timer C1E workaround. */
842 if (cpu_ident_amdc1e && cpu_disable_deep_sleep) {
843 msr = rdmsr(MSR_AMDK8_IPM);
844 if (msr & AMDK8_CMPHALT)
845 wrmsr(MSR_AMDK8_IPM, msr & ~AMDK8_CMPHALT);
848 /* Call main idle method. */
851 /* Switch timers back into active mode. */
857 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done",
862 cpu_idle_wakeup(int cpu)
867 pcpu = pcpu_find(cpu);
868 state = (int *)pcpu->pc_monitorbuf;
870 * This doesn't need to be atomic since missing the race will
871 * simply result in unnecessary IPIs.
873 if (*state == STATE_SLEEPING)
875 if (*state == STATE_MWAIT)
876 *state = STATE_RUNNING;
881 * Ordered by speed/power consumption.
887 { cpu_idle_spin, "spin" },
888 { cpu_idle_mwait, "mwait" },
889 { cpu_idle_hlt, "hlt" },
890 { cpu_idle_acpi, "acpi" },
895 idle_sysctl_available(SYSCTL_HANDLER_ARGS)
901 avail = malloc(256, M_TEMP, M_WAITOK);
903 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
904 if (strstr(idle_tbl[i].id_name, "mwait") &&
905 (cpu_feature2 & CPUID2_MON) == 0)
907 if (strcmp(idle_tbl[i].id_name, "acpi") == 0 &&
908 cpu_idle_hook == NULL)
910 p += sprintf(p, "%s%s", p != avail ? ", " : "",
911 idle_tbl[i].id_name);
913 error = sysctl_handle_string(oidp, avail, 0, req);
918 SYSCTL_PROC(_machdep, OID_AUTO, idle_available, CTLTYPE_STRING | CTLFLAG_RD,
919 0, 0, idle_sysctl_available, "A", "list of available idle functions");
922 idle_sysctl(SYSCTL_HANDLER_ARGS)
930 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
931 if (idle_tbl[i].id_fn == cpu_idle_fn) {
932 p = idle_tbl[i].id_name;
936 strncpy(buf, p, sizeof(buf));
937 error = sysctl_handle_string(oidp, buf, sizeof(buf), req);
938 if (error != 0 || req->newptr == NULL)
940 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
941 if (strstr(idle_tbl[i].id_name, "mwait") &&
942 (cpu_feature2 & CPUID2_MON) == 0)
944 if (strcmp(idle_tbl[i].id_name, "acpi") == 0 &&
945 cpu_idle_hook == NULL)
947 if (strcmp(idle_tbl[i].id_name, buf))
949 cpu_idle_fn = idle_tbl[i].id_fn;
955 SYSCTL_PROC(_machdep, OID_AUTO, idle, CTLTYPE_STRING | CTLFLAG_RW, 0, 0,
956 idle_sysctl, "A", "currently selected idle function");
959 * Reset registers to default values on exec.
962 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
964 struct trapframe *regs = td->td_frame;
965 struct pcb *pcb = td->td_pcb;
968 if (td->td_proc->p_md.md_ldt != NULL)
971 mtx_unlock(&dt_lock);
975 clear_pcb_flags(pcb, PCB_32BIT);
976 pcb->pcb_initial_fpucw = __INITIAL_FPUCW__;
977 set_pcb_flags(pcb, PCB_FULL_IRET);
979 bzero((char *)regs, sizeof(struct trapframe));
980 regs->tf_rip = imgp->entry_addr;
981 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8;
982 regs->tf_rdi = stack; /* argv */
983 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T);
984 regs->tf_ss = _udatasel;
985 regs->tf_cs = _ucodesel;
986 regs->tf_ds = _udatasel;
987 regs->tf_es = _udatasel;
988 regs->tf_fs = _ufssel;
989 regs->tf_gs = _ugssel;
990 regs->tf_flags = TF_HASSEGS;
991 td->td_retval[1] = 0;
994 * Reset the hardware debug registers if they were in use.
995 * They won't have any meaning for the newly exec'd process.
997 if (pcb->pcb_flags & PCB_DBREGS) {
1004 if (pcb == curpcb) {
1006 * Clear the debug registers on the running
1007 * CPU, otherwise they will end up affecting
1008 * the next process we switch to.
1012 clear_pcb_flags(pcb, PCB_DBREGS);
1016 * Drop the FP state if we hold it, so that the process gets a
1017 * clean FP state if it uses the FPU again.
1029 * CR0_MP, CR0_NE and CR0_TS are also set by npx_probe() for the
1030 * BSP. See the comments there about why we set them.
1032 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM;
1037 * Initialize amd64 and configure to run kernel
1041 * Initialize segments & interrupt table
1044 struct user_segment_descriptor gdt[NGDT * MAXCPU];/* global descriptor tables */
1045 static struct gate_descriptor idt0[NIDT];
1046 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1048 static char dblfault_stack[PAGE_SIZE] __aligned(16);
1050 static char nmi0_stack[PAGE_SIZE] __aligned(16);
1051 CTASSERT(sizeof(struct nmi_pcpu) == 16);
1053 struct amd64tss common_tss[MAXCPU];
1056 * Software prototypes -- in more palatable form.
1058 * Keep GUFS32, GUGS32, GUCODE32 and GUDATA at the same
1059 * slots as corresponding segments for i386 kernel.
1061 struct soft_segment_descriptor gdt_segs[] = {
1062 /* GNULL_SEL 0 Null Descriptor */
1071 /* GNULL2_SEL 1 Null Descriptor */
1080 /* GUFS32_SEL 2 32 bit %gs Descriptor for user */
1082 .ssd_limit = 0xfffff,
1083 .ssd_type = SDT_MEMRWA,
1089 /* GUGS32_SEL 3 32 bit %fs Descriptor for user */
1091 .ssd_limit = 0xfffff,
1092 .ssd_type = SDT_MEMRWA,
1098 /* GCODE_SEL 4 Code Descriptor for kernel */
1100 .ssd_limit = 0xfffff,
1101 .ssd_type = SDT_MEMERA,
1107 /* GDATA_SEL 5 Data Descriptor for kernel */
1109 .ssd_limit = 0xfffff,
1110 .ssd_type = SDT_MEMRWA,
1116 /* GUCODE32_SEL 6 32 bit Code Descriptor for user */
1118 .ssd_limit = 0xfffff,
1119 .ssd_type = SDT_MEMERA,
1125 /* GUDATA_SEL 7 32/64 bit Data Descriptor for user */
1127 .ssd_limit = 0xfffff,
1128 .ssd_type = SDT_MEMRWA,
1134 /* GUCODE_SEL 8 64 bit Code Descriptor for user */
1136 .ssd_limit = 0xfffff,
1137 .ssd_type = SDT_MEMERA,
1143 /* GPROC0_SEL 9 Proc 0 Tss Descriptor */
1145 .ssd_limit = sizeof(struct amd64tss) + IOPERM_BITMAP_SIZE - 1,
1146 .ssd_type = SDT_SYSTSS,
1152 /* Actually, the TSS is a system descriptor which is double size */
1161 /* GUSERLDT_SEL 11 LDT Descriptor */
1170 /* GUSERLDT_SEL 12 LDT Descriptor, double size */
1182 setidt(idx, func, typ, dpl, ist)
1189 struct gate_descriptor *ip;
1192 ip->gd_looffset = (uintptr_t)func;
1193 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL);
1199 ip->gd_hioffset = ((uintptr_t)func)>>16 ;
1203 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1204 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1205 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1206 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1207 IDTVEC(xmm), IDTVEC(dblfault),
1208 #ifdef KDTRACE_HOOKS
1212 IDTVEC(xen_intr_upcall),
1214 IDTVEC(fast_syscall), IDTVEC(fast_syscall32);
1218 * Display the index and function name of any IDT entries that don't use
1219 * the default 'rsvd' entry point.
1221 DB_SHOW_COMMAND(idt, db_show_idt)
1223 struct gate_descriptor *ip;
1228 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) {
1229 func = ((long)ip->gd_hioffset << 16 | ip->gd_looffset);
1230 if (func != (uintptr_t)&IDTVEC(rsvd)) {
1231 db_printf("%3d\t", idx);
1232 db_printsym(func, DB_STGY_PROC);
1239 /* Show privileged registers. */
1240 DB_SHOW_COMMAND(sysregs, db_show_sysregs)
1245 } __packed idtr, gdtr;
1248 __asm __volatile("sidt %0" : "=m" (idtr));
1249 db_printf("idtr\t0x%016lx/%04x\n",
1250 (u_long)idtr.base, (u_int)idtr.limit);
1251 __asm __volatile("sgdt %0" : "=m" (gdtr));
1252 db_printf("gdtr\t0x%016lx/%04x\n",
1253 (u_long)gdtr.base, (u_int)gdtr.limit);
1254 __asm __volatile("sldt %0" : "=r" (ldt));
1255 db_printf("ldtr\t0x%04x\n", ldt);
1256 __asm __volatile("str %0" : "=r" (tr));
1257 db_printf("tr\t0x%04x\n", tr);
1258 db_printf("cr0\t0x%016lx\n", rcr0());
1259 db_printf("cr2\t0x%016lx\n", rcr2());
1260 db_printf("cr3\t0x%016lx\n", rcr3());
1261 db_printf("cr4\t0x%016lx\n", rcr4());
1262 db_printf("EFER\t%016lx\n", rdmsr(MSR_EFER));
1263 db_printf("FEATURES_CTL\t%016lx\n", rdmsr(MSR_IA32_FEATURE_CONTROL));
1264 db_printf("DEBUG_CTL\t%016lx\n", rdmsr(MSR_DEBUGCTLMSR));
1265 db_printf("PAT\t%016lx\n", rdmsr(MSR_PAT));
1266 db_printf("GSBASE\t%016lx\n", rdmsr(MSR_GSBASE));
1272 struct user_segment_descriptor *sd;
1273 struct soft_segment_descriptor *ssd;
1276 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1277 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1278 ssd->ssd_type = sd->sd_type;
1279 ssd->ssd_dpl = sd->sd_dpl;
1280 ssd->ssd_p = sd->sd_p;
1281 ssd->ssd_long = sd->sd_long;
1282 ssd->ssd_def32 = sd->sd_def32;
1283 ssd->ssd_gran = sd->sd_gran;
1288 struct soft_segment_descriptor *ssd;
1289 struct user_segment_descriptor *sd;
1292 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1293 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff;
1294 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1295 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1296 sd->sd_type = ssd->ssd_type;
1297 sd->sd_dpl = ssd->ssd_dpl;
1298 sd->sd_p = ssd->ssd_p;
1299 sd->sd_long = ssd->ssd_long;
1300 sd->sd_def32 = ssd->ssd_def32;
1301 sd->sd_gran = ssd->ssd_gran;
1306 struct soft_segment_descriptor *ssd;
1307 struct system_segment_descriptor *sd;
1310 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1311 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful;
1312 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1313 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1314 sd->sd_type = ssd->ssd_type;
1315 sd->sd_dpl = ssd->ssd_dpl;
1316 sd->sd_p = ssd->ssd_p;
1317 sd->sd_gran = ssd->ssd_gran;
1320 #if !defined(DEV_ATPIC) && defined(DEV_ISA)
1321 #include <isa/isavar.h>
1322 #include <isa/isareg.h>
1324 * Return a bitmap of the current interrupt requests. This is 8259-specific
1325 * and is only suitable for use at probe time.
1326 * This is only here to pacify sio. It is NOT FATAL if this doesn't work.
1327 * It shouldn't be here. There should probably be an APIC centric
1328 * implementation in the apic driver code, if at all.
1331 isa_irq_pending(void)
1336 irr1 = inb(IO_ICU1);
1337 irr2 = inb(IO_ICU2);
1338 return ((irr2 << 8) | irr1);
1345 add_physmap_entry(uint64_t base, uint64_t length, vm_paddr_t *physmap,
1348 int i, insert_idx, physmap_idx;
1350 physmap_idx = *physmap_idxp;
1356 * Find insertion point while checking for overlap. Start off by
1357 * assuming the new entry will be added to the end.
1359 insert_idx = physmap_idx + 2;
1360 for (i = 0; i <= physmap_idx; i += 2) {
1361 if (base < physmap[i + 1]) {
1362 if (base + length <= physmap[i]) {
1366 if (boothowto & RB_VERBOSE)
1368 "Overlapping memory regions, ignoring second region\n");
1373 /* See if we can prepend to the next entry. */
1374 if (insert_idx <= physmap_idx && base + length == physmap[insert_idx]) {
1375 physmap[insert_idx] = base;
1379 /* See if we can append to the previous entry. */
1380 if (insert_idx > 0 && base == physmap[insert_idx - 1]) {
1381 physmap[insert_idx - 1] += length;
1386 *physmap_idxp = physmap_idx;
1387 if (physmap_idx == PHYSMAP_SIZE) {
1389 "Too many segments in the physical address map, giving up\n");
1394 * Move the last 'N' entries down to make room for the new
1397 for (i = physmap_idx; i > insert_idx; i -= 2) {
1398 physmap[i] = physmap[i - 2];
1399 physmap[i + 1] = physmap[i - 1];
1402 /* Insert the new entry. */
1403 physmap[insert_idx] = base;
1404 physmap[insert_idx + 1] = base + length;
1409 bios_add_smap_entries(struct bios_smap *smapbase, u_int32_t smapsize,
1410 vm_paddr_t *physmap, int *physmap_idx)
1412 struct bios_smap *smap, *smapend;
1414 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
1416 for (smap = smapbase; smap < smapend; smap++) {
1417 if (boothowto & RB_VERBOSE)
1418 printf("SMAP type=%02x base=%016lx len=%016lx\n",
1419 smap->type, smap->base, smap->length);
1421 if (smap->type != SMAP_TYPE_MEMORY)
1424 if (!add_physmap_entry(smap->base, smap->length, physmap,
1430 #define efi_next_descriptor(ptr, size) \
1431 ((struct efi_md *)(((uint8_t *) ptr) + size))
1434 add_efi_map_entries(struct efi_map_header *efihdr, vm_paddr_t *physmap,
1437 struct efi_md *map, *p;
1442 static const char *types[] = {
1448 "RuntimeServicesCode",
1449 "RuntimeServicesData",
1450 "ConventionalMemory",
1452 "ACPIReclaimMemory",
1455 "MemoryMappedIOPortSpace",
1460 * Memory map data provided by UEFI via the GetMemoryMap
1461 * Boot Services API.
1463 efisz = (sizeof(struct efi_map_header) + 0xf) & ~0xf;
1464 map = (struct efi_md *)((uint8_t *)efihdr + efisz);
1466 if (efihdr->descriptor_size == 0)
1468 ndesc = efihdr->memory_size / efihdr->descriptor_size;
1470 if (boothowto & RB_VERBOSE)
1471 printf("%23s %12s %12s %8s %4s\n",
1472 "Type", "Physical", "Virtual", "#Pages", "Attr");
1474 for (i = 0, p = map; i < ndesc; i++,
1475 p = efi_next_descriptor(p, efihdr->descriptor_size)) {
1476 if (boothowto & RB_VERBOSE) {
1477 if (p->md_type <= EFI_MD_TYPE_PALCODE)
1478 type = types[p->md_type];
1481 printf("%23s %012lx %12p %08lx ", type, p->md_phys,
1482 p->md_virt, p->md_pages);
1483 if (p->md_attr & EFI_MD_ATTR_UC)
1485 if (p->md_attr & EFI_MD_ATTR_WC)
1487 if (p->md_attr & EFI_MD_ATTR_WT)
1489 if (p->md_attr & EFI_MD_ATTR_WB)
1491 if (p->md_attr & EFI_MD_ATTR_UCE)
1493 if (p->md_attr & EFI_MD_ATTR_WP)
1495 if (p->md_attr & EFI_MD_ATTR_RP)
1497 if (p->md_attr & EFI_MD_ATTR_XP)
1499 if (p->md_attr & EFI_MD_ATTR_RT)
1504 switch (p->md_type) {
1505 case EFI_MD_TYPE_CODE:
1506 case EFI_MD_TYPE_DATA:
1507 case EFI_MD_TYPE_BS_CODE:
1508 case EFI_MD_TYPE_BS_DATA:
1509 case EFI_MD_TYPE_FREE:
1511 * We're allowed to use any entry with these types.
1518 if (!add_physmap_entry(p->md_phys, (p->md_pages * PAGE_SIZE),
1519 physmap, physmap_idx))
1524 static char bootmethod[16] = "";
1525 SYSCTL_STRING(_machdep, OID_AUTO, bootmethod, CTLFLAG_RD, bootmethod, 0,
1526 "System firmware boot method");
1529 native_parse_memmap(caddr_t kmdp, vm_paddr_t *physmap, int *physmap_idx)
1531 struct bios_smap *smap;
1532 struct efi_map_header *efihdr;
1536 * Memory map from INT 15:E820.
1538 * subr_module.c says:
1539 * "Consumer may safely assume that size value precedes data."
1540 * ie: an int32_t immediately precedes smap.
1543 efihdr = (struct efi_map_header *)preload_search_info(kmdp,
1544 MODINFO_METADATA | MODINFOMD_EFI_MAP);
1545 smap = (struct bios_smap *)preload_search_info(kmdp,
1546 MODINFO_METADATA | MODINFOMD_SMAP);
1547 if (efihdr == NULL && smap == NULL)
1548 panic("No BIOS smap or EFI map info from loader!");
1550 if (efihdr != NULL) {
1551 add_efi_map_entries(efihdr, physmap, physmap_idx);
1552 strlcpy(bootmethod, "UEFI", sizeof(bootmethod));
1554 size = *((u_int32_t *)smap - 1);
1555 bios_add_smap_entries(smap, size, physmap, physmap_idx);
1556 strlcpy(bootmethod, "BIOS", sizeof(bootmethod));
1561 * Populate the (physmap) array with base/bound pairs describing the
1562 * available physical memory in the system, then test this memory and
1563 * build the phys_avail array describing the actually-available memory.
1565 * Total memory size may be set by the kernel environment variable
1566 * hw.physmem or the compile-time define MAXMEM.
1568 * XXX first should be vm_paddr_t.
1571 getmemsize(caddr_t kmdp, u_int64_t first)
1573 int i, physmap_idx, pa_indx, da_indx;
1574 vm_paddr_t pa, physmap[PHYSMAP_SIZE];
1575 u_long physmem_start, physmem_tunable, memtest;
1577 quad_t dcons_addr, dcons_size;
1579 bzero(physmap, sizeof(physmap));
1583 init_ops.parse_memmap(kmdp, physmap, &physmap_idx);
1586 * Find the 'base memory' segment for SMP
1589 for (i = 0; i <= physmap_idx; i += 2) {
1590 if (physmap[i] == 0x00000000) {
1591 basemem = physmap[i + 1] / 1024;
1596 panic("BIOS smap did not include a basemem segment!");
1599 * Make hole for "AP -> long mode" bootstrap code. The
1600 * mp_bootaddress vector is only available when the kernel
1601 * is configured to support APs and APs for the system start
1602 * in 32bit mode (e.g. SMP bare metal).
1604 if (init_ops.mp_bootaddress)
1605 physmap[1] = init_ops.mp_bootaddress(physmap[1] / 1024);
1608 * Maxmem isn't the "maximum memory", it's one larger than the
1609 * highest page of the physical address space. It should be
1610 * called something like "Maxphyspage". We may adjust this
1611 * based on ``hw.physmem'' and the results of the memory test.
1613 Maxmem = atop(physmap[physmap_idx + 1]);
1616 Maxmem = MAXMEM / 4;
1619 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
1620 Maxmem = atop(physmem_tunable);
1623 * The boot memory test is disabled by default, as it takes a
1624 * significant amount of time on large-memory systems, and is
1625 * unfriendly to virtual machines as it unnecessarily touches all
1628 * A general name is used as the code may be extended to support
1629 * additional tests beyond the current "page present" test.
1632 TUNABLE_ULONG_FETCH("hw.memtest.tests", &memtest);
1635 * Don't allow MAXMEM or hw.physmem to extend the amount of memory
1638 if (Maxmem > atop(physmap[physmap_idx + 1]))
1639 Maxmem = atop(physmap[physmap_idx + 1]);
1641 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1642 (boothowto & RB_VERBOSE))
1643 printf("Physical memory use set to %ldK\n", Maxmem * 4);
1645 /* call pmap initialization to make new kernel address space */
1646 pmap_bootstrap(&first);
1649 * Size up each available chunk of physical memory.
1651 * XXX Some BIOSes corrupt low 64KB between suspend and resume.
1652 * By default, mask off the first 16 pages unless we appear to be
1655 physmem_start = (vm_guest > VM_GUEST_NO ? 1 : 16) << PAGE_SHIFT;
1656 TUNABLE_ULONG_FETCH("hw.physmem.start", &physmem_start);
1657 if (physmem_start < PAGE_SIZE)
1658 physmap[0] = PAGE_SIZE;
1659 else if (physmem_start >= physmap[1])
1660 physmap[0] = round_page(physmap[1] - PAGE_SIZE);
1662 physmap[0] = round_page(physmem_start);
1665 phys_avail[pa_indx++] = physmap[0];
1666 phys_avail[pa_indx] = physmap[0];
1667 dump_avail[da_indx] = physmap[0];
1671 * Get dcons buffer address
1673 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
1674 getenv_quad("dcons.size", &dcons_size) == 0)
1678 * physmap is in bytes, so when converting to page boundaries,
1679 * round up the start address and round down the end address.
1681 for (i = 0; i <= physmap_idx; i += 2) {
1684 end = ptoa((vm_paddr_t)Maxmem);
1685 if (physmap[i + 1] < end)
1686 end = trunc_page(physmap[i + 1]);
1687 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1688 int tmp, page_bad, full;
1689 int *ptr = (int *)CADDR1;
1693 * block out kernel memory as not available.
1695 if (pa >= (vm_paddr_t)kernphys && pa < first)
1699 * block out dcons buffer
1702 && pa >= trunc_page(dcons_addr)
1703 && pa < dcons_addr + dcons_size)
1711 * map page into kernel: valid, read/write,non-cacheable
1713 *pte = pa | PG_V | PG_RW | PG_NC_PWT | PG_NC_PCD;
1718 * Test for alternating 1's and 0's
1720 *(volatile int *)ptr = 0xaaaaaaaa;
1721 if (*(volatile int *)ptr != 0xaaaaaaaa)
1724 * Test for alternating 0's and 1's
1726 *(volatile int *)ptr = 0x55555555;
1727 if (*(volatile int *)ptr != 0x55555555)
1732 *(volatile int *)ptr = 0xffffffff;
1733 if (*(volatile int *)ptr != 0xffffffff)
1738 *(volatile int *)ptr = 0x0;
1739 if (*(volatile int *)ptr != 0x0)
1742 * Restore original value.
1748 * Adjust array of valid/good pages.
1750 if (page_bad == TRUE)
1753 * If this good page is a continuation of the
1754 * previous set of good pages, then just increase
1755 * the end pointer. Otherwise start a new chunk.
1756 * Note that "end" points one higher than end,
1757 * making the range >= start and < end.
1758 * If we're also doing a speculative memory
1759 * test and we at or past the end, bump up Maxmem
1760 * so that we keep going. The first bad page
1761 * will terminate the loop.
1763 if (phys_avail[pa_indx] == pa) {
1764 phys_avail[pa_indx] += PAGE_SIZE;
1767 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1769 "Too many holes in the physical address space, giving up\n");
1774 phys_avail[pa_indx++] = pa; /* start */
1775 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1779 if (dump_avail[da_indx] == pa) {
1780 dump_avail[da_indx] += PAGE_SIZE;
1783 if (da_indx == DUMP_AVAIL_ARRAY_END) {
1787 dump_avail[da_indx++] = pa; /* start */
1788 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
1800 * The last chunk must contain at least one page plus the message
1801 * buffer to avoid complicating other code (message buffer address
1802 * calculation, etc.).
1804 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1805 round_page(msgbufsize) >= phys_avail[pa_indx]) {
1806 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1807 phys_avail[pa_indx--] = 0;
1808 phys_avail[pa_indx--] = 0;
1811 Maxmem = atop(phys_avail[pa_indx]);
1813 /* Trim off space for the message buffer. */
1814 phys_avail[pa_indx] -= round_page(msgbufsize);
1816 /* Map the message buffer. */
1817 msgbufp = (struct msgbuf *)PHYS_TO_DMAP(phys_avail[pa_indx]);
1821 native_parse_preload_data(u_int64_t modulep)
1825 vm_offset_t ksym_start;
1826 vm_offset_t ksym_end;
1829 preload_metadata = (caddr_t)(uintptr_t)(modulep + KERNBASE);
1830 preload_bootstrap_relocate(KERNBASE);
1831 kmdp = preload_search_by_type("elf kernel");
1833 kmdp = preload_search_by_type("elf64 kernel");
1834 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
1835 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *) + KERNBASE;
1837 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
1838 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
1839 db_fetch_ksymtab(ksym_start, ksym_end);
1846 hammer_time(u_int64_t modulep, u_int64_t physfree)
1851 struct nmi_pcpu *np;
1852 struct xstate_hdr *xhdr;
1857 thread0.td_kstack = physfree + KERNBASE;
1858 thread0.td_kstack_pages = KSTACK_PAGES;
1859 kstack0_sz = thread0.td_kstack_pages * PAGE_SIZE;
1860 bzero((void *)thread0.td_kstack, kstack0_sz);
1861 physfree += kstack0_sz;
1864 * This may be done better later if it gets more high level
1865 * components in it. If so just link td->td_proc here.
1867 proc_linkup0(&proc0, &thread0);
1869 kmdp = init_ops.parse_preload_data(modulep);
1871 /* Init basic tunables, hz etc */
1875 * make gdt memory segments
1877 for (x = 0; x < NGDT; x++) {
1878 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1) &&
1879 x != GUSERLDT_SEL && x != (GUSERLDT_SEL) + 1)
1880 ssdtosd(&gdt_segs[x], &gdt[x]);
1882 gdt_segs[GPROC0_SEL].ssd_base = (uintptr_t)&common_tss[0];
1883 ssdtosyssd(&gdt_segs[GPROC0_SEL],
1884 (struct system_segment_descriptor *)&gdt[GPROC0_SEL]);
1886 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1887 r_gdt.rd_base = (long) gdt;
1891 wrmsr(MSR_FSBASE, 0); /* User value */
1892 wrmsr(MSR_GSBASE, (u_int64_t)pc);
1893 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */
1895 pcpu_init(pc, 0, sizeof(struct pcpu));
1896 dpcpu_init((void *)(physfree + KERNBASE), 0);
1897 physfree += DPCPU_SIZE;
1898 PCPU_SET(prvspace, pc);
1899 PCPU_SET(curthread, &thread0);
1900 PCPU_SET(tssp, &common_tss[0]);
1901 PCPU_SET(commontssp, &common_tss[0]);
1902 PCPU_SET(tss, (struct system_segment_descriptor *)&gdt[GPROC0_SEL]);
1903 PCPU_SET(ldt, (struct system_segment_descriptor *)&gdt[GUSERLDT_SEL]);
1904 PCPU_SET(fs32p, &gdt[GUFS32_SEL]);
1905 PCPU_SET(gs32p, &gdt[GUGS32_SEL]);
1908 * Initialize mutexes.
1910 * icu_lock: in order to allow an interrupt to occur in a critical
1911 * section, to set pcpu->ipending (etc...) properly, we
1912 * must be able to get the icu lock, so it can't be
1916 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS);
1917 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_DEF);
1920 for (x = 0; x < NIDT; x++)
1921 setidt(x, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0);
1922 setidt(IDT_DE, &IDTVEC(div), SDT_SYSIGT, SEL_KPL, 0);
1923 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYSIGT, SEL_KPL, 0);
1924 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 2);
1925 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYSIGT, SEL_UPL, 0);
1926 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYSIGT, SEL_KPL, 0);
1927 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYSIGT, SEL_KPL, 0);
1928 setidt(IDT_UD, &IDTVEC(ill), SDT_SYSIGT, SEL_KPL, 0);
1929 setidt(IDT_NM, &IDTVEC(dna), SDT_SYSIGT, SEL_KPL, 0);
1930 setidt(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1);
1931 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYSIGT, SEL_KPL, 0);
1932 setidt(IDT_TS, &IDTVEC(tss), SDT_SYSIGT, SEL_KPL, 0);
1933 setidt(IDT_NP, &IDTVEC(missing), SDT_SYSIGT, SEL_KPL, 0);
1934 setidt(IDT_SS, &IDTVEC(stk), SDT_SYSIGT, SEL_KPL, 0);
1935 setidt(IDT_GP, &IDTVEC(prot), SDT_SYSIGT, SEL_KPL, 0);
1936 setidt(IDT_PF, &IDTVEC(page), SDT_SYSIGT, SEL_KPL, 0);
1937 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYSIGT, SEL_KPL, 0);
1938 setidt(IDT_AC, &IDTVEC(align), SDT_SYSIGT, SEL_KPL, 0);
1939 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 0);
1940 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYSIGT, SEL_KPL, 0);
1941 #ifdef KDTRACE_HOOKS
1942 setidt(IDT_DTRACE_RET, &IDTVEC(dtrace_ret), SDT_SYSIGT, SEL_UPL, 0);
1945 setidt(IDT_EVTCHN, &IDTVEC(xen_intr_upcall), SDT_SYSIGT, SEL_UPL, 0);
1948 r_idt.rd_limit = sizeof(idt0) - 1;
1949 r_idt.rd_base = (long) idt;
1953 * Initialize the clock before the console so that console
1954 * initialization can use DELAY().
1959 * Use vt(4) by default for UEFI boot (during the sc(4)/vt(4)
1962 if (kmdp != NULL && preload_search_info(kmdp,
1963 MODINFO_METADATA | MODINFOMD_EFI_MAP) != NULL)
1964 vty_set_preferred(VTY_VT);
1967 * Initialize the console before we print anything out.
1976 /* Reset and mask the atpics and leave them shut down. */
1980 * Point the ICU spurious interrupt vectors at the APIC spurious
1981 * interrupt handler.
1983 setidt(IDT_IO_INTS + 7, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0);
1984 setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0);
1987 #error "have you forgotten the isa device?";
1993 if (boothowto & RB_KDB)
1994 kdb_enter(KDB_WHY_BOOTFLAGS,
1995 "Boot flags requested debugger");
1998 identify_cpu(); /* Final stage of CPU initialization */
1999 initializecpu(); /* Initialize CPU registers */
2000 initializecpucache();
2002 /* doublefault stack space, runs on ist1 */
2003 common_tss[0].tss_ist1 = (long)&dblfault_stack[sizeof(dblfault_stack)];
2006 * NMI stack, runs on ist2. The pcpu pointer is stored just
2007 * above the start of the ist2 stack.
2009 np = ((struct nmi_pcpu *) &nmi0_stack[sizeof(nmi0_stack)]) - 1;
2010 np->np_pcpu = (register_t) pc;
2011 common_tss[0].tss_ist2 = (long) np;
2013 /* Set the IO permission bitmap (empty due to tss seg limit) */
2014 common_tss[0].tss_iobase = sizeof(struct amd64tss) + IOPERM_BITMAP_SIZE;
2016 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2019 /* Set up the fast syscall stuff */
2020 msr = rdmsr(MSR_EFER) | EFER_SCE;
2021 wrmsr(MSR_EFER, msr);
2022 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall));
2023 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32));
2024 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) |
2025 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48);
2026 wrmsr(MSR_STAR, msr);
2027 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D);
2029 getmemsize(kmdp, physfree);
2030 init_param2(physmem);
2032 /* now running on new page tables, configured,and u/iom is accessible */
2034 msgbufinit(msgbufp, msgbufsize);
2038 * Set up thread0 pcb after fpuinit calculated pcb + fpu save
2039 * area size. Zero out the extended state header in fpu save
2042 thread0.td_pcb = get_pcb_td(&thread0);
2043 bzero(get_pcb_user_save_td(&thread0), cpu_max_ext_state_size);
2045 xhdr = (struct xstate_hdr *)(get_pcb_user_save_td(&thread0) +
2047 xhdr->xstate_bv = xsave_mask;
2049 /* make an initial tss so cpu can get interrupt stack on syscall! */
2050 common_tss[0].tss_rsp0 = (vm_offset_t)thread0.td_pcb;
2051 /* Ensure the stack is aligned to 16 bytes */
2052 common_tss[0].tss_rsp0 &= ~0xFul;
2053 PCPU_SET(rsp0, common_tss[0].tss_rsp0);
2054 PCPU_SET(curpcb, thread0.td_pcb);
2056 /* transfer to user mode */
2058 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
2059 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
2060 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL);
2061 _ufssel = GSEL(GUFS32_SEL, SEL_UPL);
2062 _ugssel = GSEL(GUGS32_SEL, SEL_UPL);
2068 /* setup proc 0's pcb */
2069 thread0.td_pcb->pcb_flags = 0;
2070 thread0.td_pcb->pcb_cr3 = KPML4phys; /* PCID 0 is reserved for kernel */
2071 thread0.td_frame = &proc0_tf;
2073 env = getenv("kernelname");
2075 strlcpy(kernelname, env, sizeof(kernelname));
2083 /* Location of kernel stack for locore */
2084 return ((u_int64_t)thread0.td_pcb);
2088 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
2091 pcpu->pc_acpi_id = 0xffffffff;
2095 smap_sysctl_handler(SYSCTL_HANDLER_ARGS)
2097 struct bios_smap *smapbase;
2098 struct bios_smap_xattr smap;
2101 int count, error, i;
2103 /* Retrieve the system memory map from the loader. */
2104 kmdp = preload_search_by_type("elf kernel");
2106 kmdp = preload_search_by_type("elf64 kernel");
2107 smapbase = (struct bios_smap *)preload_search_info(kmdp,
2108 MODINFO_METADATA | MODINFOMD_SMAP);
2109 if (smapbase == NULL)
2111 smapattr = (uint32_t *)preload_search_info(kmdp,
2112 MODINFO_METADATA | MODINFOMD_SMAP_XATTR);
2113 count = *((uint32_t *)smapbase - 1) / sizeof(*smapbase);
2115 for (i = 0; i < count; i++) {
2116 smap.base = smapbase[i].base;
2117 smap.length = smapbase[i].length;
2118 smap.type = smapbase[i].type;
2119 if (smapattr != NULL)
2120 smap.xattr = smapattr[i];
2123 error = SYSCTL_OUT(req, &smap, sizeof(smap));
2127 SYSCTL_PROC(_machdep, OID_AUTO, smap, CTLTYPE_OPAQUE|CTLFLAG_RD, NULL, 0,
2128 smap_sysctl_handler, "S,bios_smap_xattr", "Raw BIOS SMAP data");
2131 efi_map_sysctl_handler(SYSCTL_HANDLER_ARGS)
2133 struct efi_map_header *efihdr;
2137 kmdp = preload_search_by_type("elf kernel");
2139 kmdp = preload_search_by_type("elf64 kernel");
2140 efihdr = (struct efi_map_header *)preload_search_info(kmdp,
2141 MODINFO_METADATA | MODINFOMD_EFI_MAP);
2144 efisize = *((uint32_t *)efihdr - 1);
2145 return (SYSCTL_OUT(req, efihdr, efisize));
2147 SYSCTL_PROC(_machdep, OID_AUTO, efi_map, CTLTYPE_OPAQUE|CTLFLAG_RD, NULL, 0,
2148 efi_map_sysctl_handler, "S,efi_map_header", "Raw EFI Memory Map");
2151 spinlock_enter(void)
2157 if (td->td_md.md_spinlock_count == 0) {
2158 flags = intr_disable();
2159 td->td_md.md_spinlock_count = 1;
2160 td->td_md.md_saved_flags = flags;
2162 td->td_md.md_spinlock_count++;
2174 flags = td->td_md.md_saved_flags;
2175 td->td_md.md_spinlock_count--;
2176 if (td->td_md.md_spinlock_count == 0)
2177 intr_restore(flags);
2181 * Construct a PCB from a trapframe. This is called from kdb_trap() where
2182 * we want to start a backtrace from the function that caused us to enter
2183 * the debugger. We have the context in the trapframe, but base the trace
2184 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
2185 * enough for a backtrace.
2188 makectx(struct trapframe *tf, struct pcb *pcb)
2191 pcb->pcb_r12 = tf->tf_r12;
2192 pcb->pcb_r13 = tf->tf_r13;
2193 pcb->pcb_r14 = tf->tf_r14;
2194 pcb->pcb_r15 = tf->tf_r15;
2195 pcb->pcb_rbp = tf->tf_rbp;
2196 pcb->pcb_rbx = tf->tf_rbx;
2197 pcb->pcb_rip = tf->tf_rip;
2198 pcb->pcb_rsp = tf->tf_rsp;
2202 ptrace_set_pc(struct thread *td, unsigned long addr)
2205 td->td_frame->tf_rip = addr;
2206 set_pcb_flags(td->td_pcb, PCB_FULL_IRET);
2211 ptrace_single_step(struct thread *td)
2213 td->td_frame->tf_rflags |= PSL_T;
2218 ptrace_clear_single_step(struct thread *td)
2220 td->td_frame->tf_rflags &= ~PSL_T;
2225 fill_regs(struct thread *td, struct reg *regs)
2227 struct trapframe *tp;
2230 return (fill_frame_regs(tp, regs));
2234 fill_frame_regs(struct trapframe *tp, struct reg *regs)
2236 regs->r_r15 = tp->tf_r15;
2237 regs->r_r14 = tp->tf_r14;
2238 regs->r_r13 = tp->tf_r13;
2239 regs->r_r12 = tp->tf_r12;
2240 regs->r_r11 = tp->tf_r11;
2241 regs->r_r10 = tp->tf_r10;
2242 regs->r_r9 = tp->tf_r9;
2243 regs->r_r8 = tp->tf_r8;
2244 regs->r_rdi = tp->tf_rdi;
2245 regs->r_rsi = tp->tf_rsi;
2246 regs->r_rbp = tp->tf_rbp;
2247 regs->r_rbx = tp->tf_rbx;
2248 regs->r_rdx = tp->tf_rdx;
2249 regs->r_rcx = tp->tf_rcx;
2250 regs->r_rax = tp->tf_rax;
2251 regs->r_rip = tp->tf_rip;
2252 regs->r_cs = tp->tf_cs;
2253 regs->r_rflags = tp->tf_rflags;
2254 regs->r_rsp = tp->tf_rsp;
2255 regs->r_ss = tp->tf_ss;
2256 if (tp->tf_flags & TF_HASSEGS) {
2257 regs->r_ds = tp->tf_ds;
2258 regs->r_es = tp->tf_es;
2259 regs->r_fs = tp->tf_fs;
2260 regs->r_gs = tp->tf_gs;
2271 set_regs(struct thread *td, struct reg *regs)
2273 struct trapframe *tp;
2277 rflags = regs->r_rflags & 0xffffffff;
2278 if (!EFL_SECURE(rflags, tp->tf_rflags) || !CS_SECURE(regs->r_cs))
2280 tp->tf_r15 = regs->r_r15;
2281 tp->tf_r14 = regs->r_r14;
2282 tp->tf_r13 = regs->r_r13;
2283 tp->tf_r12 = regs->r_r12;
2284 tp->tf_r11 = regs->r_r11;
2285 tp->tf_r10 = regs->r_r10;
2286 tp->tf_r9 = regs->r_r9;
2287 tp->tf_r8 = regs->r_r8;
2288 tp->tf_rdi = regs->r_rdi;
2289 tp->tf_rsi = regs->r_rsi;
2290 tp->tf_rbp = regs->r_rbp;
2291 tp->tf_rbx = regs->r_rbx;
2292 tp->tf_rdx = regs->r_rdx;
2293 tp->tf_rcx = regs->r_rcx;
2294 tp->tf_rax = regs->r_rax;
2295 tp->tf_rip = regs->r_rip;
2296 tp->tf_cs = regs->r_cs;
2297 tp->tf_rflags = rflags;
2298 tp->tf_rsp = regs->r_rsp;
2299 tp->tf_ss = regs->r_ss;
2300 if (0) { /* XXXKIB */
2301 tp->tf_ds = regs->r_ds;
2302 tp->tf_es = regs->r_es;
2303 tp->tf_fs = regs->r_fs;
2304 tp->tf_gs = regs->r_gs;
2305 tp->tf_flags = TF_HASSEGS;
2307 set_pcb_flags(td->td_pcb, PCB_FULL_IRET);
2311 /* XXX check all this stuff! */
2312 /* externalize from sv_xmm */
2314 fill_fpregs_xmm(struct savefpu *sv_xmm, struct fpreg *fpregs)
2316 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env;
2317 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2321 bzero(fpregs, sizeof(*fpregs));
2323 /* FPU control/status */
2324 penv_fpreg->en_cw = penv_xmm->en_cw;
2325 penv_fpreg->en_sw = penv_xmm->en_sw;
2326 penv_fpreg->en_tw = penv_xmm->en_tw;
2327 penv_fpreg->en_opcode = penv_xmm->en_opcode;
2328 penv_fpreg->en_rip = penv_xmm->en_rip;
2329 penv_fpreg->en_rdp = penv_xmm->en_rdp;
2330 penv_fpreg->en_mxcsr = penv_xmm->en_mxcsr;
2331 penv_fpreg->en_mxcsr_mask = penv_xmm->en_mxcsr_mask;
2334 for (i = 0; i < 8; ++i)
2335 bcopy(sv_xmm->sv_fp[i].fp_acc.fp_bytes, fpregs->fpr_acc[i], 10);
2338 for (i = 0; i < 16; ++i)
2339 bcopy(sv_xmm->sv_xmm[i].xmm_bytes, fpregs->fpr_xacc[i], 16);
2342 /* internalize from fpregs into sv_xmm */
2344 set_fpregs_xmm(struct fpreg *fpregs, struct savefpu *sv_xmm)
2346 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2347 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env;
2351 /* FPU control/status */
2352 penv_xmm->en_cw = penv_fpreg->en_cw;
2353 penv_xmm->en_sw = penv_fpreg->en_sw;
2354 penv_xmm->en_tw = penv_fpreg->en_tw;
2355 penv_xmm->en_opcode = penv_fpreg->en_opcode;
2356 penv_xmm->en_rip = penv_fpreg->en_rip;
2357 penv_xmm->en_rdp = penv_fpreg->en_rdp;
2358 penv_xmm->en_mxcsr = penv_fpreg->en_mxcsr;
2359 penv_xmm->en_mxcsr_mask = penv_fpreg->en_mxcsr_mask & cpu_mxcsr_mask;
2362 for (i = 0; i < 8; ++i)
2363 bcopy(fpregs->fpr_acc[i], sv_xmm->sv_fp[i].fp_acc.fp_bytes, 10);
2366 for (i = 0; i < 16; ++i)
2367 bcopy(fpregs->fpr_xacc[i], sv_xmm->sv_xmm[i].xmm_bytes, 16);
2370 /* externalize from td->pcb */
2372 fill_fpregs(struct thread *td, struct fpreg *fpregs)
2375 KASSERT(td == curthread || TD_IS_SUSPENDED(td) ||
2376 P_SHOULDSTOP(td->td_proc),
2377 ("not suspended thread %p", td));
2379 fill_fpregs_xmm(get_pcb_user_save_td(td), fpregs);
2383 /* internalize to td->pcb */
2385 set_fpregs(struct thread *td, struct fpreg *fpregs)
2388 set_fpregs_xmm(fpregs, get_pcb_user_save_td(td));
2394 * Get machine context.
2397 get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
2400 struct trapframe *tp;
2404 PROC_LOCK(curthread->td_proc);
2405 mcp->mc_onstack = sigonstack(tp->tf_rsp);
2406 PROC_UNLOCK(curthread->td_proc);
2407 mcp->mc_r15 = tp->tf_r15;
2408 mcp->mc_r14 = tp->tf_r14;
2409 mcp->mc_r13 = tp->tf_r13;
2410 mcp->mc_r12 = tp->tf_r12;
2411 mcp->mc_r11 = tp->tf_r11;
2412 mcp->mc_r10 = tp->tf_r10;
2413 mcp->mc_r9 = tp->tf_r9;
2414 mcp->mc_r8 = tp->tf_r8;
2415 mcp->mc_rdi = tp->tf_rdi;
2416 mcp->mc_rsi = tp->tf_rsi;
2417 mcp->mc_rbp = tp->tf_rbp;
2418 mcp->mc_rbx = tp->tf_rbx;
2419 mcp->mc_rcx = tp->tf_rcx;
2420 mcp->mc_rflags = tp->tf_rflags;
2421 if (flags & GET_MC_CLEAR_RET) {
2424 mcp->mc_rflags &= ~PSL_C;
2426 mcp->mc_rax = tp->tf_rax;
2427 mcp->mc_rdx = tp->tf_rdx;
2429 mcp->mc_rip = tp->tf_rip;
2430 mcp->mc_cs = tp->tf_cs;
2431 mcp->mc_rsp = tp->tf_rsp;
2432 mcp->mc_ss = tp->tf_ss;
2433 mcp->mc_ds = tp->tf_ds;
2434 mcp->mc_es = tp->tf_es;
2435 mcp->mc_fs = tp->tf_fs;
2436 mcp->mc_gs = tp->tf_gs;
2437 mcp->mc_flags = tp->tf_flags;
2438 mcp->mc_len = sizeof(*mcp);
2439 get_fpcontext(td, mcp, NULL, 0);
2440 mcp->mc_fsbase = pcb->pcb_fsbase;
2441 mcp->mc_gsbase = pcb->pcb_gsbase;
2442 mcp->mc_xfpustate = 0;
2443 mcp->mc_xfpustate_len = 0;
2444 bzero(mcp->mc_spare, sizeof(mcp->mc_spare));
2449 * Set machine context.
2451 * However, we don't set any but the user modifiable flags, and we won't
2452 * touch the cs selector.
2455 set_mcontext(struct thread *td, const mcontext_t *mcp)
2458 struct trapframe *tp;
2465 if (mcp->mc_len != sizeof(*mcp) ||
2466 (mcp->mc_flags & ~_MC_FLAG_MASK) != 0)
2468 rflags = (mcp->mc_rflags & PSL_USERCHANGE) |
2469 (tp->tf_rflags & ~PSL_USERCHANGE);
2470 if (mcp->mc_flags & _MC_HASFPXSTATE) {
2471 if (mcp->mc_xfpustate_len > cpu_max_ext_state_size -
2472 sizeof(struct savefpu))
2474 xfpustate = __builtin_alloca(mcp->mc_xfpustate_len);
2475 ret = copyin((void *)mcp->mc_xfpustate, xfpustate,
2476 mcp->mc_xfpustate_len);
2481 ret = set_fpcontext(td, mcp, xfpustate, mcp->mc_xfpustate_len);
2484 tp->tf_r15 = mcp->mc_r15;
2485 tp->tf_r14 = mcp->mc_r14;
2486 tp->tf_r13 = mcp->mc_r13;
2487 tp->tf_r12 = mcp->mc_r12;
2488 tp->tf_r11 = mcp->mc_r11;
2489 tp->tf_r10 = mcp->mc_r10;
2490 tp->tf_r9 = mcp->mc_r9;
2491 tp->tf_r8 = mcp->mc_r8;
2492 tp->tf_rdi = mcp->mc_rdi;
2493 tp->tf_rsi = mcp->mc_rsi;
2494 tp->tf_rbp = mcp->mc_rbp;
2495 tp->tf_rbx = mcp->mc_rbx;
2496 tp->tf_rdx = mcp->mc_rdx;
2497 tp->tf_rcx = mcp->mc_rcx;
2498 tp->tf_rax = mcp->mc_rax;
2499 tp->tf_rip = mcp->mc_rip;
2500 tp->tf_rflags = rflags;
2501 tp->tf_rsp = mcp->mc_rsp;
2502 tp->tf_ss = mcp->mc_ss;
2503 tp->tf_flags = mcp->mc_flags;
2504 if (tp->tf_flags & TF_HASSEGS) {
2505 tp->tf_ds = mcp->mc_ds;
2506 tp->tf_es = mcp->mc_es;
2507 tp->tf_fs = mcp->mc_fs;
2508 tp->tf_gs = mcp->mc_gs;
2510 if (mcp->mc_flags & _MC_HASBASES) {
2511 pcb->pcb_fsbase = mcp->mc_fsbase;
2512 pcb->pcb_gsbase = mcp->mc_gsbase;
2514 set_pcb_flags(pcb, PCB_FULL_IRET);
2519 get_fpcontext(struct thread *td, mcontext_t *mcp, char *xfpusave,
2520 size_t xfpusave_len)
2522 size_t max_len, len;
2524 mcp->mc_ownedfp = fpugetregs(td);
2525 bcopy(get_pcb_user_save_td(td), &mcp->mc_fpstate[0],
2526 sizeof(mcp->mc_fpstate));
2527 mcp->mc_fpformat = fpuformat();
2528 if (!use_xsave || xfpusave_len == 0)
2530 max_len = cpu_max_ext_state_size - sizeof(struct savefpu);
2532 if (len > max_len) {
2534 bzero(xfpusave + max_len, len - max_len);
2536 mcp->mc_flags |= _MC_HASFPXSTATE;
2537 mcp->mc_xfpustate_len = len;
2538 bcopy(get_pcb_user_save_td(td) + 1, xfpusave, len);
2542 set_fpcontext(struct thread *td, const mcontext_t *mcp, char *xfpustate,
2543 size_t xfpustate_len)
2545 struct savefpu *fpstate;
2548 if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
2550 else if (mcp->mc_fpformat != _MC_FPFMT_XMM)
2552 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) {
2553 /* We don't care what state is left in the FPU or PCB. */
2556 } else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
2557 mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
2558 fpstate = (struct savefpu *)&mcp->mc_fpstate;
2559 fpstate->sv_env.en_mxcsr &= cpu_mxcsr_mask;
2560 error = fpusetregs(td, fpstate, xfpustate, xfpustate_len);
2567 fpstate_drop(struct thread *td)
2570 KASSERT(PCB_USER_FPU(td->td_pcb), ("fpstate_drop: kernel-owned fpu"));
2572 if (PCPU_GET(fpcurthread) == td)
2575 * XXX force a full drop of the fpu. The above only drops it if we
2578 * XXX I don't much like fpugetuserregs()'s semantics of doing a full
2579 * drop. Dropping only to the pcb matches fnsave's behaviour.
2580 * We only need to drop to !PCB_INITDONE in sendsig(). But
2581 * sendsig() is the only caller of fpugetuserregs()... perhaps we just
2582 * have too many layers.
2584 clear_pcb_flags(curthread->td_pcb,
2585 PCB_FPUINITDONE | PCB_USERFPUINITDONE);
2590 fill_dbregs(struct thread *td, struct dbreg *dbregs)
2595 dbregs->dr[0] = rdr0();
2596 dbregs->dr[1] = rdr1();
2597 dbregs->dr[2] = rdr2();
2598 dbregs->dr[3] = rdr3();
2599 dbregs->dr[6] = rdr6();
2600 dbregs->dr[7] = rdr7();
2603 dbregs->dr[0] = pcb->pcb_dr0;
2604 dbregs->dr[1] = pcb->pcb_dr1;
2605 dbregs->dr[2] = pcb->pcb_dr2;
2606 dbregs->dr[3] = pcb->pcb_dr3;
2607 dbregs->dr[6] = pcb->pcb_dr6;
2608 dbregs->dr[7] = pcb->pcb_dr7;
2624 set_dbregs(struct thread *td, struct dbreg *dbregs)
2630 load_dr0(dbregs->dr[0]);
2631 load_dr1(dbregs->dr[1]);
2632 load_dr2(dbregs->dr[2]);
2633 load_dr3(dbregs->dr[3]);
2634 load_dr6(dbregs->dr[6]);
2635 load_dr7(dbregs->dr[7]);
2638 * Don't let an illegal value for dr7 get set. Specifically,
2639 * check for undefined settings. Setting these bit patterns
2640 * result in undefined behaviour and can lead to an unexpected
2641 * TRCTRAP or a general protection fault right here.
2642 * Upper bits of dr6 and dr7 must not be set
2644 for (i = 0; i < 4; i++) {
2645 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02)
2647 if (td->td_frame->tf_cs == _ucode32sel &&
2648 DBREG_DR7_LEN(dbregs->dr[7], i) == DBREG_DR7_LEN_8)
2651 if ((dbregs->dr[6] & 0xffffffff00000000ul) != 0 ||
2652 (dbregs->dr[7] & 0xffffffff00000000ul) != 0)
2658 * Don't let a process set a breakpoint that is not within the
2659 * process's address space. If a process could do this, it
2660 * could halt the system by setting a breakpoint in the kernel
2661 * (if ddb was enabled). Thus, we need to check to make sure
2662 * that no breakpoints are being enabled for addresses outside
2663 * process's address space.
2665 * XXX - what about when the watched area of the user's
2666 * address space is written into from within the kernel
2667 * ... wouldn't that still cause a breakpoint to be generated
2668 * from within kernel mode?
2671 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) {
2672 /* dr0 is enabled */
2673 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS)
2676 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) {
2677 /* dr1 is enabled */
2678 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS)
2681 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) {
2682 /* dr2 is enabled */
2683 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS)
2686 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) {
2687 /* dr3 is enabled */
2688 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS)
2692 pcb->pcb_dr0 = dbregs->dr[0];
2693 pcb->pcb_dr1 = dbregs->dr[1];
2694 pcb->pcb_dr2 = dbregs->dr[2];
2695 pcb->pcb_dr3 = dbregs->dr[3];
2696 pcb->pcb_dr6 = dbregs->dr[6];
2697 pcb->pcb_dr7 = dbregs->dr[7];
2699 set_pcb_flags(pcb, PCB_DBREGS);
2709 load_dr7(0); /* Turn off the control bits first */
2718 * Return > 0 if a hardware breakpoint has been hit, and the
2719 * breakpoint was in user space. Return 0, otherwise.
2722 user_dbreg_trap(void)
2724 u_int64_t dr7, dr6; /* debug registers dr6 and dr7 */
2725 u_int64_t bp; /* breakpoint bits extracted from dr6 */
2726 int nbp; /* number of breakpoints that triggered */
2727 caddr_t addr[4]; /* breakpoint addresses */
2731 if ((dr7 & 0x000000ff) == 0) {
2733 * all GE and LE bits in the dr7 register are zero,
2734 * thus the trap couldn't have been caused by the
2735 * hardware debug registers
2742 bp = dr6 & 0x0000000f;
2746 * None of the breakpoint bits are set meaning this
2747 * trap was not caused by any of the debug registers
2753 * at least one of the breakpoints were hit, check to see
2754 * which ones and if any of them are user space addresses
2758 addr[nbp++] = (caddr_t)rdr0();
2761 addr[nbp++] = (caddr_t)rdr1();
2764 addr[nbp++] = (caddr_t)rdr2();
2767 addr[nbp++] = (caddr_t)rdr3();
2770 for (i = 0; i < nbp; i++) {
2771 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) {
2773 * addr[i] is in user space
2780 * None of the breakpoints are in user space.
2788 * Provide inb() and outb() as functions. They are normally only available as
2789 * inline functions, thus cannot be called from the debugger.
2792 /* silence compiler warnings */
2793 u_char inb_(u_short);
2794 void outb_(u_short, u_char);
2803 outb_(u_short port, u_char data)