2 * Copyright (c) 2003 Peter Wemm.
3 * Copyright (c) 1992 Terrence R. Lambert.
4 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
7 * This code is derived from software contributed to Berkeley by
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the University of
21 * California, Berkeley and its contributors.
22 * 4. Neither the name of the University nor the names of its contributors
23 * may be used to endorse or promote products derived from this software
24 * without specific prior written permission.
26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
41 #include <sys/cdefs.h>
42 __FBSDID("$FreeBSD$");
44 #include "opt_atalk.h"
45 #include "opt_atpic.h"
46 #include "opt_compat.h"
52 #include "opt_kstack_pages.h"
53 #include "opt_maxmem.h"
54 #include "opt_mp_watchdog.h"
55 #include "opt_perfmon.h"
56 #include "opt_platform.h"
57 #include "opt_sched.h"
58 #include "opt_kdtrace.h"
60 #include <sys/param.h>
62 #include <sys/systm.h>
66 #include <sys/callout.h>
69 #include <sys/eventhandler.h>
71 #include <sys/imgact.h>
73 #include <sys/kernel.h>
75 #include <sys/linker.h>
77 #include <sys/malloc.h>
78 #include <sys/memrange.h>
79 #include <sys/msgbuf.h>
80 #include <sys/mutex.h>
82 #include <sys/ptrace.h>
83 #include <sys/reboot.h>
84 #include <sys/rwlock.h>
85 #include <sys/sched.h>
86 #include <sys/signalvar.h>
90 #include <sys/syscallsubr.h>
91 #include <sys/sysctl.h>
92 #include <sys/sysent.h>
93 #include <sys/sysproto.h>
94 #include <sys/ucontext.h>
95 #include <sys/vmmeter.h>
98 #include <vm/vm_extern.h>
99 #include <vm/vm_kern.h>
100 #include <vm/vm_page.h>
101 #include <vm/vm_map.h>
102 #include <vm/vm_object.h>
103 #include <vm/vm_pager.h>
104 #include <vm/vm_param.h>
108 #error KDB must be enabled in order for DDB to work!
111 #include <ddb/db_sym.h>
114 #include <net/netisr.h>
116 #include <machine/clock.h>
117 #include <machine/cpu.h>
118 #include <machine/cputypes.h>
119 #include <machine/intr_machdep.h>
121 #include <machine/md_var.h>
122 #include <machine/metadata.h>
123 #include <machine/mp_watchdog.h>
124 #include <machine/pc/bios.h>
125 #include <machine/pcb.h>
126 #include <machine/proc.h>
127 #include <machine/reg.h>
128 #include <machine/sigframe.h>
129 #include <machine/specialreg.h>
131 #include <machine/perfmon.h>
133 #include <machine/tss.h>
135 #include <machine/smp.h>
142 #include <x86/isa/icu.h>
144 #include <machine/apicvar.h>
147 #include <isa/isareg.h>
150 /* Sanity check for __curthread() */
151 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
153 extern u_int64_t hammer_time(u_int64_t, u_int64_t);
155 extern void printcpuinfo(void); /* XXX header file */
156 extern void identify_cpu(void);
157 extern void panicifcpuunsupported(void);
159 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
160 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
162 static void cpu_startup(void *);
163 static void get_fpcontext(struct thread *td, mcontext_t *mcp,
164 char *xfpusave, size_t xfpusave_len);
165 static int set_fpcontext(struct thread *td, const mcontext_t *mcp,
166 char *xfpustate, size_t xfpustate_len);
167 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
170 * The file "conf/ldscript.amd64" defines the symbol "kernphys". Its value is
171 * the physical address at which the kernel is loaded.
173 extern char kernphys[];
175 extern vm_offset_t ksym_start, ksym_end;
178 struct msgbuf *msgbufp;
180 /* Intel ICH registers */
181 #define ICH_PMBASE 0x400
182 #define ICH_SMI_EN ICH_PMBASE + 0x30
184 int _udatasel, _ucodesel, _ucode32sel, _ufssel, _ugssel;
192 * The number of PHYSMAP entries must be one less than the number of
193 * PHYSSEG entries because the PHYSMAP entry that spans the largest
194 * physical address that is accessible by ISA DMA is split into two
197 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
199 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
200 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
202 /* must be 2 less so 0 0 can signal end of chunks */
203 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2)
204 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2)
206 struct kva_md_info kmi;
208 static struct trapframe proc0_tf;
209 struct region_descriptor r_gdt, r_idt;
211 struct pcpu __pcpu[MAXCPU];
215 struct mem_range_softc mem_range_softc;
217 struct mtx dt_lock; /* lock for GDT and LDT */
227 * On MacBooks, we need to disallow the legacy USB circuit to
228 * generate an SMI# because this can cause several problems,
229 * namely: incorrect CPU frequency detection and failure to
231 * We do this by disabling a bit in the SMI_EN (SMI Control and
232 * Enable register) of the Intel ICH LPC Interface Bridge.
234 sysenv = getenv("smbios.system.product");
235 if (sysenv != NULL) {
236 if (strncmp(sysenv, "MacBook1,1", 10) == 0 ||
237 strncmp(sysenv, "MacBook3,1", 10) == 0 ||
238 strncmp(sysenv, "MacBookPro1,1", 13) == 0 ||
239 strncmp(sysenv, "MacBookPro1,2", 13) == 0 ||
240 strncmp(sysenv, "MacBookPro3,1", 13) == 0 ||
241 strncmp(sysenv, "Macmini1,1", 10) == 0) {
243 printf("Disabling LEGACY_USB_EN bit on "
245 outl(ICH_SMI_EN, inl(ICH_SMI_EN) & ~0x8);
251 * Good {morning,afternoon,evening,night}.
255 panicifcpuunsupported();
262 * Display physical memory if SMBIOS reports reasonable amount.
265 sysenv = getenv("smbios.memory.enabled");
266 if (sysenv != NULL) {
267 memsize = (uintmax_t)strtoul(sysenv, (char **)NULL, 10) << 10;
270 if (memsize < ptoa((uintmax_t)cnt.v_free_count))
271 memsize = ptoa((uintmax_t)Maxmem);
272 printf("real memory = %ju (%ju MB)\n", memsize, memsize >> 20);
275 * Display any holes after the first chunk of extended memory.
280 printf("Physical memory chunk(s):\n");
281 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
284 size = phys_avail[indx + 1] - phys_avail[indx];
286 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n",
287 (uintmax_t)phys_avail[indx],
288 (uintmax_t)phys_avail[indx + 1] - 1,
289 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
293 vm_ksubmap_init(&kmi);
295 printf("avail memory = %ju (%ju MB)\n",
296 ptoa((uintmax_t)cnt.v_free_count),
297 ptoa((uintmax_t)cnt.v_free_count) / 1048576);
300 * Set up buffers, so they can be used to read disk labels.
303 vm_pager_bufferinit();
309 * Send an interrupt to process.
311 * Stack is set up to allow sigcode stored
312 * at top to call routine, followed by call
313 * to sigreturn routine below. After sigreturn
314 * resets the signal mask, the stack, and the
315 * frame pointer, it returns to the user
319 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
321 struct sigframe sf, *sfp;
327 struct trapframe *regs;
336 PROC_LOCK_ASSERT(p, MA_OWNED);
337 sig = ksi->ksi_signo;
339 mtx_assert(&psp->ps_mtx, MA_OWNED);
341 oonstack = sigonstack(regs->tf_rsp);
343 if (cpu_max_ext_state_size > sizeof(struct savefpu) && use_xsave) {
344 xfpusave_len = cpu_max_ext_state_size - sizeof(struct savefpu);
345 xfpusave = __builtin_alloca(xfpusave_len);
351 /* Save user context. */
352 bzero(&sf, sizeof(sf));
353 sf.sf_uc.uc_sigmask = *mask;
354 sf.sf_uc.uc_stack = td->td_sigstk;
355 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
356 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
357 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
358 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(*regs));
359 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */
360 get_fpcontext(td, &sf.sf_uc.uc_mcontext, xfpusave, xfpusave_len);
362 sf.sf_uc.uc_mcontext.mc_fsbase = pcb->pcb_fsbase;
363 sf.sf_uc.uc_mcontext.mc_gsbase = pcb->pcb_gsbase;
364 bzero(sf.sf_uc.uc_mcontext.mc_spare,
365 sizeof(sf.sf_uc.uc_mcontext.mc_spare));
366 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__));
368 /* Allocate space for the signal handler context. */
369 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
370 SIGISMEMBER(psp->ps_sigonstack, sig)) {
371 sp = td->td_sigstk.ss_sp + td->td_sigstk.ss_size;
372 #if defined(COMPAT_43)
373 td->td_sigstk.ss_flags |= SS_ONSTACK;
376 sp = (char *)regs->tf_rsp - 128;
377 if (xfpusave != NULL) {
379 sp = (char *)((unsigned long)sp & ~0x3Ful);
380 sf.sf_uc.uc_mcontext.mc_xfpustate = (register_t)sp;
382 sp -= sizeof(struct sigframe);
383 /* Align to 16 bytes. */
384 sfp = (struct sigframe *)((unsigned long)sp & ~0xFul);
386 /* Translate the signal if appropriate. */
387 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
388 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
390 /* Build the argument list for the signal handler. */
391 regs->tf_rdi = sig; /* arg 1 in %rdi */
392 regs->tf_rdx = (register_t)&sfp->sf_uc; /* arg 3 in %rdx */
393 bzero(&sf.sf_si, sizeof(sf.sf_si));
394 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
395 /* Signal handler installed with SA_SIGINFO. */
396 regs->tf_rsi = (register_t)&sfp->sf_si; /* arg 2 in %rsi */
397 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
399 /* Fill in POSIX parts */
400 sf.sf_si = ksi->ksi_info;
401 sf.sf_si.si_signo = sig; /* maybe a translated signal */
402 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */
404 /* Old FreeBSD-style arguments. */
405 regs->tf_rsi = ksi->ksi_code; /* arg 2 in %rsi */
406 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */
407 sf.sf_ahu.sf_handler = catcher;
409 mtx_unlock(&psp->ps_mtx);
413 * Copy the sigframe out to the user's stack.
415 if (copyout(&sf, sfp, sizeof(*sfp)) != 0 ||
416 (xfpusave != NULL && copyout(xfpusave,
417 (void *)sf.sf_uc.uc_mcontext.mc_xfpustate, xfpusave_len)
420 printf("process %ld has trashed its stack\n", (long)p->p_pid);
426 regs->tf_rsp = (long)sfp;
427 regs->tf_rip = p->p_sysent->sv_sigcode_base;
428 regs->tf_rflags &= ~(PSL_T | PSL_D);
429 regs->tf_cs = _ucodesel;
430 regs->tf_ds = _udatasel;
431 regs->tf_es = _udatasel;
432 regs->tf_fs = _ufssel;
433 regs->tf_gs = _ugssel;
434 regs->tf_flags = TF_HASSEGS;
435 set_pcb_flags(pcb, PCB_FULL_IRET);
437 mtx_lock(&psp->ps_mtx);
441 * System call to cleanup state after a signal
442 * has been taken. Reset signal mask and
443 * stack state from context left by sendsig (above).
444 * Return to previous pc and psl as specified by
445 * context left by sendsig. Check carefully to
446 * make sure that the user has not modified the
447 * state to gain improper privileges.
452 sys_sigreturn(td, uap)
454 struct sigreturn_args /* {
455 const struct __ucontext *sigcntxp;
461 struct trapframe *regs;
464 size_t xfpustate_len;
472 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
474 uprintf("pid %d (%s): sigreturn copyin failed\n",
475 p->p_pid, td->td_name);
479 if ((ucp->uc_mcontext.mc_flags & ~_MC_FLAG_MASK) != 0) {
480 uprintf("pid %d (%s): sigreturn mc_flags %x\n", p->p_pid,
481 td->td_name, ucp->uc_mcontext.mc_flags);
485 rflags = ucp->uc_mcontext.mc_rflags;
487 * Don't allow users to change privileged or reserved flags.
490 * XXX do allow users to change the privileged flag PSL_RF.
491 * The cpu sets PSL_RF in tf_rflags for faults. Debuggers
492 * should sometimes set it there too. tf_rflags is kept in
493 * the signal context during signal handling and there is no
494 * other place to remember it, so the PSL_RF bit may be
495 * corrupted by the signal handler without us knowing.
496 * Corruption of the PSL_RF bit at worst causes one more or
497 * one less debugger trap, so allowing it is fairly harmless.
499 if (!EFL_SECURE(rflags & ~PSL_RF, regs->tf_rflags & ~PSL_RF)) {
500 uprintf("pid %d (%s): sigreturn rflags = 0x%lx\n", p->p_pid,
501 td->td_name, rflags);
506 * Don't allow users to load a valid privileged %cs. Let the
507 * hardware check for invalid selectors, excess privilege in
508 * other selectors, invalid %eip's and invalid %esp's.
510 cs = ucp->uc_mcontext.mc_cs;
511 if (!CS_SECURE(cs)) {
512 uprintf("pid %d (%s): sigreturn cs = 0x%x\n", p->p_pid,
514 ksiginfo_init_trap(&ksi);
515 ksi.ksi_signo = SIGBUS;
516 ksi.ksi_code = BUS_OBJERR;
517 ksi.ksi_trapno = T_PROTFLT;
518 ksi.ksi_addr = (void *)regs->tf_rip;
519 trapsignal(td, &ksi);
523 if ((uc.uc_mcontext.mc_flags & _MC_HASFPXSTATE) != 0) {
524 xfpustate_len = uc.uc_mcontext.mc_xfpustate_len;
525 if (xfpustate_len > cpu_max_ext_state_size -
526 sizeof(struct savefpu)) {
527 uprintf("pid %d (%s): sigreturn xfpusave_len = 0x%zx\n",
528 p->p_pid, td->td_name, xfpustate_len);
531 xfpustate = __builtin_alloca(xfpustate_len);
532 error = copyin((const void *)uc.uc_mcontext.mc_xfpustate,
533 xfpustate, xfpustate_len);
536 "pid %d (%s): sigreturn copying xfpustate failed\n",
537 p->p_pid, td->td_name);
544 ret = set_fpcontext(td, &ucp->uc_mcontext, xfpustate, xfpustate_len);
546 uprintf("pid %d (%s): sigreturn set_fpcontext err %d\n",
547 p->p_pid, td->td_name, ret);
550 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(*regs));
551 pcb->pcb_fsbase = ucp->uc_mcontext.mc_fsbase;
552 pcb->pcb_gsbase = ucp->uc_mcontext.mc_gsbase;
554 #if defined(COMPAT_43)
555 if (ucp->uc_mcontext.mc_onstack & 1)
556 td->td_sigstk.ss_flags |= SS_ONSTACK;
558 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
561 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
562 set_pcb_flags(pcb, PCB_FULL_IRET);
563 return (EJUSTRETURN);
566 #ifdef COMPAT_FREEBSD4
568 freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap)
571 return sys_sigreturn(td, (struct sigreturn_args *)uap);
577 * Machine dependent boot() routine
579 * I haven't seen anything to put here yet
580 * Possibly some stuff might be grafted back here from boot()
588 * Flush the D-cache for non-DMA I/O so that the I-cache can
589 * be made coherent later.
592 cpu_flush_dcache(void *ptr, size_t len)
597 /* Get current clock frequency for the given cpu id. */
599 cpu_est_clockrate(int cpu_id, uint64_t *rate)
602 uint64_t acnt, mcnt, perf;
605 if (pcpu_find(cpu_id) == NULL || rate == NULL)
609 * If TSC is P-state invariant and APERF/MPERF MSRs do not exist,
610 * DELAY(9) based logic fails.
612 if (tsc_is_invariant && !tsc_perf_stat)
617 /* Schedule ourselves on the indicated cpu. */
618 thread_lock(curthread);
619 sched_bind(curthread, cpu_id);
620 thread_unlock(curthread);
624 /* Calibrate by measuring a short delay. */
625 reg = intr_disable();
626 if (tsc_is_invariant) {
631 mcnt = rdmsr(MSR_MPERF);
632 acnt = rdmsr(MSR_APERF);
635 perf = 1000 * acnt / mcnt;
636 *rate = (tsc2 - tsc1) * perf;
642 *rate = (tsc2 - tsc1) * 1000;
647 thread_lock(curthread);
648 sched_unbind(curthread);
649 thread_unlock(curthread);
657 * Shutdown the CPU as much as possible
666 void (*cpu_idle_hook)(sbintime_t) = NULL; /* ACPI idle hook. */
667 static int cpu_ident_amdc1e = 0; /* AMD C1E supported. */
668 static int idle_mwait = 1; /* Use MONITOR/MWAIT for short idle. */
669 TUNABLE_INT("machdep.idle_mwait", &idle_mwait);
670 SYSCTL_INT(_machdep, OID_AUTO, idle_mwait, CTLFLAG_RW, &idle_mwait,
671 0, "Use MONITOR/MWAIT for short idle");
673 #define STATE_RUNNING 0x0
674 #define STATE_MWAIT 0x1
675 #define STATE_SLEEPING 0x2
678 cpu_idle_acpi(sbintime_t sbt)
682 state = (int *)PCPU_PTR(monitorbuf);
683 *state = STATE_SLEEPING;
685 /* See comments in cpu_idle_hlt(). */
687 if (sched_runnable())
689 else if (cpu_idle_hook)
692 __asm __volatile("sti; hlt");
693 *state = STATE_RUNNING;
697 cpu_idle_hlt(sbintime_t sbt)
701 state = (int *)PCPU_PTR(monitorbuf);
702 *state = STATE_SLEEPING;
705 * Since we may be in a critical section from cpu_idle(), if
706 * an interrupt fires during that critical section we may have
707 * a pending preemption. If the CPU halts, then that thread
708 * may not execute until a later interrupt awakens the CPU.
709 * To handle this race, check for a runnable thread after
710 * disabling interrupts and immediately return if one is
711 * found. Also, we must absolutely guarentee that hlt is
712 * the next instruction after sti. This ensures that any
713 * interrupt that fires after the call to disable_intr() will
714 * immediately awaken the CPU from hlt. Finally, please note
715 * that on x86 this works fine because of interrupts enabled only
716 * after the instruction following sti takes place, while IF is set
717 * to 1 immediately, allowing hlt instruction to acknowledge the
721 if (sched_runnable())
724 __asm __volatile("sti; hlt");
725 *state = STATE_RUNNING;
729 * MWAIT cpu power states. Lower 4 bits are sub-states.
731 #define MWAIT_C0 0xf0
732 #define MWAIT_C1 0x00
733 #define MWAIT_C2 0x10
734 #define MWAIT_C3 0x20
735 #define MWAIT_C4 0x30
738 cpu_idle_mwait(sbintime_t sbt)
742 state = (int *)PCPU_PTR(monitorbuf);
743 *state = STATE_MWAIT;
745 /* See comments in cpu_idle_hlt(). */
747 if (sched_runnable()) {
749 *state = STATE_RUNNING;
752 cpu_monitor(state, 0, 0);
753 if (*state == STATE_MWAIT)
754 __asm __volatile("sti; mwait" : : "a" (MWAIT_C1), "c" (0));
757 *state = STATE_RUNNING;
761 cpu_idle_spin(sbintime_t sbt)
766 state = (int *)PCPU_PTR(monitorbuf);
767 *state = STATE_RUNNING;
770 * The sched_runnable() call is racy but as long as there is
771 * a loop missing it one time will have just a little impact if any
772 * (and it is much better than missing the check at all).
774 for (i = 0; i < 1000; i++) {
775 if (sched_runnable())
782 * C1E renders the local APIC timer dead, so we disable it by
783 * reading the Interrupt Pending Message register and clearing
784 * both C1eOnCmpHalt (bit 28) and SmiOnCmpHalt (bit 27).
787 * "BIOS and Kernel Developer's Guide for AMD NPT Family 0Fh Processors"
788 * #32559 revision 3.00+
790 #define MSR_AMDK8_IPM 0xc0010055
791 #define AMDK8_SMIONCMPHALT (1ULL << 27)
792 #define AMDK8_C1EONCMPHALT (1ULL << 28)
793 #define AMDK8_CMPHALT (AMDK8_SMIONCMPHALT | AMDK8_C1EONCMPHALT)
796 cpu_probe_amdc1e(void)
800 * Detect the presence of C1E capability mostly on latest
801 * dual-cores (or future) k8 family.
803 if (cpu_vendor_id == CPU_VENDOR_AMD &&
804 (cpu_id & 0x00000f00) == 0x00000f00 &&
805 (cpu_id & 0x0fff0000) >= 0x00040000) {
806 cpu_ident_amdc1e = 1;
810 void (*cpu_idle_fn)(sbintime_t) = cpu_idle_acpi;
818 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d",
821 ap_watchdog(PCPU_GET(cpuid));
823 /* If we are busy - try to use fast methods. */
825 if ((cpu_feature2 & CPUID2_MON) && idle_mwait) {
826 cpu_idle_mwait(busy);
831 /* If we have time - switch timers into idle mode. */
834 sbt = cpu_idleclock();
837 /* Apply AMD APIC timer C1E workaround. */
838 if (cpu_ident_amdc1e && cpu_disable_deep_sleep) {
839 msr = rdmsr(MSR_AMDK8_IPM);
840 if (msr & AMDK8_CMPHALT)
841 wrmsr(MSR_AMDK8_IPM, msr & ~AMDK8_CMPHALT);
844 /* Call main idle method. */
847 /* Switch timers mack into active mode. */
853 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done",
858 cpu_idle_wakeup(int cpu)
863 pcpu = pcpu_find(cpu);
864 state = (int *)pcpu->pc_monitorbuf;
866 * This doesn't need to be atomic since missing the race will
867 * simply result in unnecessary IPIs.
869 if (*state == STATE_SLEEPING)
871 if (*state == STATE_MWAIT)
872 *state = STATE_RUNNING;
877 * Ordered by speed/power consumption.
883 { cpu_idle_spin, "spin" },
884 { cpu_idle_mwait, "mwait" },
885 { cpu_idle_hlt, "hlt" },
886 { cpu_idle_acpi, "acpi" },
891 idle_sysctl_available(SYSCTL_HANDLER_ARGS)
897 avail = malloc(256, M_TEMP, M_WAITOK);
899 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
900 if (strstr(idle_tbl[i].id_name, "mwait") &&
901 (cpu_feature2 & CPUID2_MON) == 0)
903 if (strcmp(idle_tbl[i].id_name, "acpi") == 0 &&
904 cpu_idle_hook == NULL)
906 p += sprintf(p, "%s%s", p != avail ? ", " : "",
907 idle_tbl[i].id_name);
909 error = sysctl_handle_string(oidp, avail, 0, req);
914 SYSCTL_PROC(_machdep, OID_AUTO, idle_available, CTLTYPE_STRING | CTLFLAG_RD,
915 0, 0, idle_sysctl_available, "A", "list of available idle functions");
918 idle_sysctl(SYSCTL_HANDLER_ARGS)
926 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
927 if (idle_tbl[i].id_fn == cpu_idle_fn) {
928 p = idle_tbl[i].id_name;
932 strncpy(buf, p, sizeof(buf));
933 error = sysctl_handle_string(oidp, buf, sizeof(buf), req);
934 if (error != 0 || req->newptr == NULL)
936 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
937 if (strstr(idle_tbl[i].id_name, "mwait") &&
938 (cpu_feature2 & CPUID2_MON) == 0)
940 if (strcmp(idle_tbl[i].id_name, "acpi") == 0 &&
941 cpu_idle_hook == NULL)
943 if (strcmp(idle_tbl[i].id_name, buf))
945 cpu_idle_fn = idle_tbl[i].id_fn;
951 SYSCTL_PROC(_machdep, OID_AUTO, idle, CTLTYPE_STRING | CTLFLAG_RW, 0, 0,
952 idle_sysctl, "A", "currently selected idle function");
955 * Reset registers to default values on exec.
958 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
960 struct trapframe *regs = td->td_frame;
961 struct pcb *pcb = td->td_pcb;
964 if (td->td_proc->p_md.md_ldt != NULL)
967 mtx_unlock(&dt_lock);
971 clear_pcb_flags(pcb, PCB_32BIT);
972 pcb->pcb_initial_fpucw = __INITIAL_FPUCW__;
973 set_pcb_flags(pcb, PCB_FULL_IRET);
975 bzero((char *)regs, sizeof(struct trapframe));
976 regs->tf_rip = imgp->entry_addr;
977 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8;
978 regs->tf_rdi = stack; /* argv */
979 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T);
980 regs->tf_ss = _udatasel;
981 regs->tf_cs = _ucodesel;
982 regs->tf_ds = _udatasel;
983 regs->tf_es = _udatasel;
984 regs->tf_fs = _ufssel;
985 regs->tf_gs = _ugssel;
986 regs->tf_flags = TF_HASSEGS;
987 td->td_retval[1] = 0;
990 * Reset the hardware debug registers if they were in use.
991 * They won't have any meaning for the newly exec'd process.
993 if (pcb->pcb_flags & PCB_DBREGS) {
1000 if (pcb == curpcb) {
1002 * Clear the debug registers on the running
1003 * CPU, otherwise they will end up affecting
1004 * the next process we switch to.
1008 clear_pcb_flags(pcb, PCB_DBREGS);
1012 * Drop the FP state if we hold it, so that the process gets a
1013 * clean FP state if it uses the FPU again.
1025 * CR0_MP, CR0_NE and CR0_TS are also set by npx_probe() for the
1026 * BSP. See the comments there about why we set them.
1028 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM;
1033 * Initialize amd64 and configure to run kernel
1037 * Initialize segments & interrupt table
1040 struct user_segment_descriptor gdt[NGDT * MAXCPU];/* global descriptor tables */
1041 static struct gate_descriptor idt0[NIDT];
1042 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1044 static char dblfault_stack[PAGE_SIZE] __aligned(16);
1046 static char nmi0_stack[PAGE_SIZE] __aligned(16);
1047 CTASSERT(sizeof(struct nmi_pcpu) == 16);
1049 struct amd64tss common_tss[MAXCPU];
1052 * Software prototypes -- in more palatable form.
1054 * Keep GUFS32, GUGS32, GUCODE32 and GUDATA at the same
1055 * slots as corresponding segments for i386 kernel.
1057 struct soft_segment_descriptor gdt_segs[] = {
1058 /* GNULL_SEL 0 Null Descriptor */
1067 /* GNULL2_SEL 1 Null Descriptor */
1076 /* GUFS32_SEL 2 32 bit %gs Descriptor for user */
1078 .ssd_limit = 0xfffff,
1079 .ssd_type = SDT_MEMRWA,
1085 /* GUGS32_SEL 3 32 bit %fs Descriptor for user */
1087 .ssd_limit = 0xfffff,
1088 .ssd_type = SDT_MEMRWA,
1094 /* GCODE_SEL 4 Code Descriptor for kernel */
1096 .ssd_limit = 0xfffff,
1097 .ssd_type = SDT_MEMERA,
1103 /* GDATA_SEL 5 Data Descriptor for kernel */
1105 .ssd_limit = 0xfffff,
1106 .ssd_type = SDT_MEMRWA,
1112 /* GUCODE32_SEL 6 32 bit Code Descriptor for user */
1114 .ssd_limit = 0xfffff,
1115 .ssd_type = SDT_MEMERA,
1121 /* GUDATA_SEL 7 32/64 bit Data Descriptor for user */
1123 .ssd_limit = 0xfffff,
1124 .ssd_type = SDT_MEMRWA,
1130 /* GUCODE_SEL 8 64 bit Code Descriptor for user */
1132 .ssd_limit = 0xfffff,
1133 .ssd_type = SDT_MEMERA,
1139 /* GPROC0_SEL 9 Proc 0 Tss Descriptor */
1141 .ssd_limit = sizeof(struct amd64tss) + IOPAGES * PAGE_SIZE - 1,
1142 .ssd_type = SDT_SYSTSS,
1148 /* Actually, the TSS is a system descriptor which is double size */
1157 /* GUSERLDT_SEL 11 LDT Descriptor */
1166 /* GUSERLDT_SEL 12 LDT Descriptor, double size */
1178 setidt(idx, func, typ, dpl, ist)
1185 struct gate_descriptor *ip;
1188 ip->gd_looffset = (uintptr_t)func;
1189 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL);
1195 ip->gd_hioffset = ((uintptr_t)func)>>16 ;
1199 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1200 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1201 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1202 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1203 IDTVEC(xmm), IDTVEC(dblfault),
1204 #ifdef KDTRACE_HOOKS
1207 IDTVEC(fast_syscall), IDTVEC(fast_syscall32);
1211 * Display the index and function name of any IDT entries that don't use
1212 * the default 'rsvd' entry point.
1214 DB_SHOW_COMMAND(idt, db_show_idt)
1216 struct gate_descriptor *ip;
1221 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) {
1222 func = ((long)ip->gd_hioffset << 16 | ip->gd_looffset);
1223 if (func != (uintptr_t)&IDTVEC(rsvd)) {
1224 db_printf("%3d\t", idx);
1225 db_printsym(func, DB_STGY_PROC);
1232 /* Show privileged registers. */
1233 DB_SHOW_COMMAND(sysregs, db_show_sysregs)
1238 } __packed idtr, gdtr;
1241 __asm __volatile("sidt %0" : "=m" (idtr));
1242 db_printf("idtr\t0x%016lx/%04x\n",
1243 (u_long)idtr.base, (u_int)idtr.limit);
1244 __asm __volatile("sgdt %0" : "=m" (gdtr));
1245 db_printf("gdtr\t0x%016lx/%04x\n",
1246 (u_long)gdtr.base, (u_int)gdtr.limit);
1247 __asm __volatile("sldt %0" : "=r" (ldt));
1248 db_printf("ldtr\t0x%04x\n", ldt);
1249 __asm __volatile("str %0" : "=r" (tr));
1250 db_printf("tr\t0x%04x\n", tr);
1251 db_printf("cr0\t0x%016lx\n", rcr0());
1252 db_printf("cr2\t0x%016lx\n", rcr2());
1253 db_printf("cr3\t0x%016lx\n", rcr3());
1254 db_printf("cr4\t0x%016lx\n", rcr4());
1255 db_printf("EFER\t%016lx\n", rdmsr(MSR_EFER));
1256 db_printf("FEATURES_CTL\t%016lx\n", rdmsr(MSR_IA32_FEATURE_CONTROL));
1257 db_printf("DEBUG_CTL\t%016lx\n", rdmsr(MSR_DEBUGCTLMSR));
1258 db_printf("PAT\t%016lx\n", rdmsr(MSR_PAT));
1259 db_printf("GSBASE\t%016lx\n", rdmsr(MSR_GSBASE));
1265 struct user_segment_descriptor *sd;
1266 struct soft_segment_descriptor *ssd;
1269 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1270 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1271 ssd->ssd_type = sd->sd_type;
1272 ssd->ssd_dpl = sd->sd_dpl;
1273 ssd->ssd_p = sd->sd_p;
1274 ssd->ssd_long = sd->sd_long;
1275 ssd->ssd_def32 = sd->sd_def32;
1276 ssd->ssd_gran = sd->sd_gran;
1281 struct soft_segment_descriptor *ssd;
1282 struct user_segment_descriptor *sd;
1285 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1286 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff;
1287 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1288 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1289 sd->sd_type = ssd->ssd_type;
1290 sd->sd_dpl = ssd->ssd_dpl;
1291 sd->sd_p = ssd->ssd_p;
1292 sd->sd_long = ssd->ssd_long;
1293 sd->sd_def32 = ssd->ssd_def32;
1294 sd->sd_gran = ssd->ssd_gran;
1299 struct soft_segment_descriptor *ssd;
1300 struct system_segment_descriptor *sd;
1303 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1304 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful;
1305 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1306 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1307 sd->sd_type = ssd->ssd_type;
1308 sd->sd_dpl = ssd->ssd_dpl;
1309 sd->sd_p = ssd->ssd_p;
1310 sd->sd_gran = ssd->ssd_gran;
1313 #if !defined(DEV_ATPIC) && defined(DEV_ISA)
1314 #include <isa/isavar.h>
1315 #include <isa/isareg.h>
1317 * Return a bitmap of the current interrupt requests. This is 8259-specific
1318 * and is only suitable for use at probe time.
1319 * This is only here to pacify sio. It is NOT FATAL if this doesn't work.
1320 * It shouldn't be here. There should probably be an APIC centric
1321 * implementation in the apic driver code, if at all.
1324 isa_irq_pending(void)
1329 irr1 = inb(IO_ICU1);
1330 irr2 = inb(IO_ICU2);
1331 return ((irr2 << 8) | irr1);
1338 add_smap_entry(struct bios_smap *smap, vm_paddr_t *physmap, int *physmap_idxp)
1340 int i, insert_idx, physmap_idx;
1342 physmap_idx = *physmap_idxp;
1344 if (boothowto & RB_VERBOSE)
1345 printf("SMAP type=%02x base=%016lx len=%016lx\n",
1346 smap->type, smap->base, smap->length);
1348 if (smap->type != SMAP_TYPE_MEMORY)
1351 if (smap->length == 0)
1355 * Find insertion point while checking for overlap. Start off by
1356 * assuming the new entry will be added to the end.
1358 insert_idx = physmap_idx + 2;
1359 for (i = 0; i <= physmap_idx; i += 2) {
1360 if (smap->base < physmap[i + 1]) {
1361 if (smap->base + smap->length <= physmap[i]) {
1365 if (boothowto & RB_VERBOSE)
1367 "Overlapping memory regions, ignoring second region\n");
1372 /* See if we can prepend to the next entry. */
1373 if (insert_idx <= physmap_idx &&
1374 smap->base + smap->length == physmap[insert_idx]) {
1375 physmap[insert_idx] = smap->base;
1379 /* See if we can append to the previous entry. */
1380 if (insert_idx > 0 && smap->base == physmap[insert_idx - 1]) {
1381 physmap[insert_idx - 1] += smap->length;
1386 *physmap_idxp = physmap_idx;
1387 if (physmap_idx == PHYSMAP_SIZE) {
1389 "Too many segments in the physical address map, giving up\n");
1394 * Move the last 'N' entries down to make room for the new
1397 for (i = physmap_idx; i > insert_idx; i -= 2) {
1398 physmap[i] = physmap[i - 2];
1399 physmap[i + 1] = physmap[i - 1];
1402 /* Insert the new entry. */
1403 physmap[insert_idx] = smap->base;
1404 physmap[insert_idx + 1] = smap->base + smap->length;
1409 * Populate the (physmap) array with base/bound pairs describing the
1410 * available physical memory in the system, then test this memory and
1411 * build the phys_avail array describing the actually-available memory.
1413 * Total memory size may be set by the kernel environment variable
1414 * hw.physmem or the compile-time define MAXMEM.
1416 * XXX first should be vm_paddr_t.
1419 getmemsize(caddr_t kmdp, u_int64_t first)
1421 int i, physmap_idx, pa_indx, da_indx;
1422 vm_paddr_t pa, physmap[PHYSMAP_SIZE];
1423 u_long physmem_start, physmem_tunable, memtest;
1425 struct bios_smap *smapbase, *smap, *smapend;
1427 quad_t dcons_addr, dcons_size;
1429 bzero(physmap, sizeof(physmap));
1434 * get memory map from INT 15:E820, kindly supplied by the loader.
1436 * subr_module.c says:
1437 * "Consumer may safely assume that size value precedes data."
1438 * ie: an int32_t immediately precedes smap.
1440 smapbase = (struct bios_smap *)preload_search_info(kmdp,
1441 MODINFO_METADATA | MODINFOMD_SMAP);
1442 if (smapbase == NULL)
1443 panic("No BIOS smap info from loader!");
1445 smapsize = *((u_int32_t *)smapbase - 1);
1446 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
1448 for (smap = smapbase; smap < smapend; smap++)
1449 if (!add_smap_entry(smap, physmap, &physmap_idx))
1453 * Find the 'base memory' segment for SMP
1456 for (i = 0; i <= physmap_idx; i += 2) {
1457 if (physmap[i] == 0x00000000) {
1458 basemem = physmap[i + 1] / 1024;
1463 panic("BIOS smap did not include a basemem segment!");
1466 /* make hole for AP bootstrap code */
1467 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1471 * Maxmem isn't the "maximum memory", it's one larger than the
1472 * highest page of the physical address space. It should be
1473 * called something like "Maxphyspage". We may adjust this
1474 * based on ``hw.physmem'' and the results of the memory test.
1476 Maxmem = atop(physmap[physmap_idx + 1]);
1479 Maxmem = MAXMEM / 4;
1482 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
1483 Maxmem = atop(physmem_tunable);
1486 * By default enable the memory test on real hardware, and disable
1487 * it if we appear to be running in a VM. This avoids touching all
1488 * pages unnecessarily, which doesn't matter on real hardware but is
1489 * bad for shared VM hosts. Use a general name so that
1490 * one could eventually do more with the code than just disable it.
1492 memtest = (vm_guest > VM_GUEST_NO) ? 0 : 1;
1493 TUNABLE_ULONG_FETCH("hw.memtest.tests", &memtest);
1496 * Don't allow MAXMEM or hw.physmem to extend the amount of memory
1499 if (Maxmem > atop(physmap[physmap_idx + 1]))
1500 Maxmem = atop(physmap[physmap_idx + 1]);
1502 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1503 (boothowto & RB_VERBOSE))
1504 printf("Physical memory use set to %ldK\n", Maxmem * 4);
1506 /* call pmap initialization to make new kernel address space */
1507 pmap_bootstrap(&first);
1510 * Size up each available chunk of physical memory.
1512 * XXX Some BIOSes corrupt low 64KB between suspend and resume.
1513 * By default, mask off the first 16 pages unless we appear to be
1516 physmem_start = (vm_guest > VM_GUEST_NO ? 1 : 16) << PAGE_SHIFT;
1517 TUNABLE_ULONG_FETCH("hw.physmem.start", &physmem_start);
1518 if (physmem_start < PAGE_SIZE)
1519 physmap[0] = PAGE_SIZE;
1520 else if (physmem_start >= physmap[1])
1521 physmap[0] = round_page(physmap[1] - PAGE_SIZE);
1523 physmap[0] = round_page(physmem_start);
1526 phys_avail[pa_indx++] = physmap[0];
1527 phys_avail[pa_indx] = physmap[0];
1528 dump_avail[da_indx] = physmap[0];
1532 * Get dcons buffer address
1534 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
1535 getenv_quad("dcons.size", &dcons_size) == 0)
1539 * physmap is in bytes, so when converting to page boundaries,
1540 * round up the start address and round down the end address.
1542 for (i = 0; i <= physmap_idx; i += 2) {
1545 end = ptoa((vm_paddr_t)Maxmem);
1546 if (physmap[i + 1] < end)
1547 end = trunc_page(physmap[i + 1]);
1548 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1549 int tmp, page_bad, full;
1550 int *ptr = (int *)CADDR1;
1554 * block out kernel memory as not available.
1556 if (pa >= (vm_paddr_t)kernphys && pa < first)
1560 * block out dcons buffer
1563 && pa >= trunc_page(dcons_addr)
1564 && pa < dcons_addr + dcons_size)
1572 * map page into kernel: valid, read/write,non-cacheable
1574 *pte = pa | PG_V | PG_RW | PG_N;
1579 * Test for alternating 1's and 0's
1581 *(volatile int *)ptr = 0xaaaaaaaa;
1582 if (*(volatile int *)ptr != 0xaaaaaaaa)
1585 * Test for alternating 0's and 1's
1587 *(volatile int *)ptr = 0x55555555;
1588 if (*(volatile int *)ptr != 0x55555555)
1593 *(volatile int *)ptr = 0xffffffff;
1594 if (*(volatile int *)ptr != 0xffffffff)
1599 *(volatile int *)ptr = 0x0;
1600 if (*(volatile int *)ptr != 0x0)
1603 * Restore original value.
1609 * Adjust array of valid/good pages.
1611 if (page_bad == TRUE)
1614 * If this good page is a continuation of the
1615 * previous set of good pages, then just increase
1616 * the end pointer. Otherwise start a new chunk.
1617 * Note that "end" points one higher than end,
1618 * making the range >= start and < end.
1619 * If we're also doing a speculative memory
1620 * test and we at or past the end, bump up Maxmem
1621 * so that we keep going. The first bad page
1622 * will terminate the loop.
1624 if (phys_avail[pa_indx] == pa) {
1625 phys_avail[pa_indx] += PAGE_SIZE;
1628 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1630 "Too many holes in the physical address space, giving up\n");
1635 phys_avail[pa_indx++] = pa; /* start */
1636 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1640 if (dump_avail[da_indx] == pa) {
1641 dump_avail[da_indx] += PAGE_SIZE;
1644 if (da_indx == DUMP_AVAIL_ARRAY_END) {
1648 dump_avail[da_indx++] = pa; /* start */
1649 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
1661 * The last chunk must contain at least one page plus the message
1662 * buffer to avoid complicating other code (message buffer address
1663 * calculation, etc.).
1665 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1666 round_page(msgbufsize) >= phys_avail[pa_indx]) {
1667 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1668 phys_avail[pa_indx--] = 0;
1669 phys_avail[pa_indx--] = 0;
1672 Maxmem = atop(phys_avail[pa_indx]);
1674 /* Trim off space for the message buffer. */
1675 phys_avail[pa_indx] -= round_page(msgbufsize);
1677 /* Map the message buffer. */
1678 msgbufp = (struct msgbuf *)PHYS_TO_DMAP(phys_avail[pa_indx]);
1682 hammer_time(u_int64_t modulep, u_int64_t physfree)
1687 struct nmi_pcpu *np;
1688 struct xstate_hdr *xhdr;
1693 thread0.td_kstack = physfree + KERNBASE;
1694 thread0.td_kstack_pages = KSTACK_PAGES;
1695 kstack0_sz = thread0.td_kstack_pages * PAGE_SIZE;
1696 bzero((void *)thread0.td_kstack, kstack0_sz);
1697 physfree += kstack0_sz;
1700 * This may be done better later if it gets more high level
1701 * components in it. If so just link td->td_proc here.
1703 proc_linkup0(&proc0, &thread0);
1705 preload_metadata = (caddr_t)(uintptr_t)(modulep + KERNBASE);
1706 preload_bootstrap_relocate(KERNBASE);
1707 kmdp = preload_search_by_type("elf kernel");
1709 kmdp = preload_search_by_type("elf64 kernel");
1710 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
1711 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *) + KERNBASE;
1713 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
1714 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
1717 /* Init basic tunables, hz etc */
1721 * make gdt memory segments
1723 for (x = 0; x < NGDT; x++) {
1724 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1) &&
1725 x != GUSERLDT_SEL && x != (GUSERLDT_SEL) + 1)
1726 ssdtosd(&gdt_segs[x], &gdt[x]);
1728 gdt_segs[GPROC0_SEL].ssd_base = (uintptr_t)&common_tss[0];
1729 ssdtosyssd(&gdt_segs[GPROC0_SEL],
1730 (struct system_segment_descriptor *)&gdt[GPROC0_SEL]);
1732 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1733 r_gdt.rd_base = (long) gdt;
1737 wrmsr(MSR_FSBASE, 0); /* User value */
1738 wrmsr(MSR_GSBASE, (u_int64_t)pc);
1739 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */
1741 pcpu_init(pc, 0, sizeof(struct pcpu));
1742 dpcpu_init((void *)(physfree + KERNBASE), 0);
1743 physfree += DPCPU_SIZE;
1744 PCPU_SET(prvspace, pc);
1745 PCPU_SET(curthread, &thread0);
1746 PCPU_SET(tssp, &common_tss[0]);
1747 PCPU_SET(commontssp, &common_tss[0]);
1748 PCPU_SET(tss, (struct system_segment_descriptor *)&gdt[GPROC0_SEL]);
1749 PCPU_SET(ldt, (struct system_segment_descriptor *)&gdt[GUSERLDT_SEL]);
1750 PCPU_SET(fs32p, &gdt[GUFS32_SEL]);
1751 PCPU_SET(gs32p, &gdt[GUGS32_SEL]);
1754 * Initialize mutexes.
1756 * icu_lock: in order to allow an interrupt to occur in a critical
1757 * section, to set pcpu->ipending (etc...) properly, we
1758 * must be able to get the icu lock, so it can't be
1762 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS);
1763 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_DEF);
1766 for (x = 0; x < NIDT; x++)
1767 setidt(x, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0);
1768 setidt(IDT_DE, &IDTVEC(div), SDT_SYSIGT, SEL_KPL, 0);
1769 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYSIGT, SEL_KPL, 0);
1770 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 2);
1771 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYSIGT, SEL_UPL, 0);
1772 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYSIGT, SEL_KPL, 0);
1773 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYSIGT, SEL_KPL, 0);
1774 setidt(IDT_UD, &IDTVEC(ill), SDT_SYSIGT, SEL_KPL, 0);
1775 setidt(IDT_NM, &IDTVEC(dna), SDT_SYSIGT, SEL_KPL, 0);
1776 setidt(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1);
1777 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYSIGT, SEL_KPL, 0);
1778 setidt(IDT_TS, &IDTVEC(tss), SDT_SYSIGT, SEL_KPL, 0);
1779 setidt(IDT_NP, &IDTVEC(missing), SDT_SYSIGT, SEL_KPL, 0);
1780 setidt(IDT_SS, &IDTVEC(stk), SDT_SYSIGT, SEL_KPL, 0);
1781 setidt(IDT_GP, &IDTVEC(prot), SDT_SYSIGT, SEL_KPL, 0);
1782 setidt(IDT_PF, &IDTVEC(page), SDT_SYSIGT, SEL_KPL, 0);
1783 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYSIGT, SEL_KPL, 0);
1784 setidt(IDT_AC, &IDTVEC(align), SDT_SYSIGT, SEL_KPL, 0);
1785 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 0);
1786 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYSIGT, SEL_KPL, 0);
1787 #ifdef KDTRACE_HOOKS
1788 setidt(IDT_DTRACE_RET, &IDTVEC(dtrace_ret), SDT_SYSIGT, SEL_UPL, 0);
1791 r_idt.rd_limit = sizeof(idt0) - 1;
1792 r_idt.rd_base = (long) idt;
1796 * Initialize the i8254 before the console so that console
1797 * initialization can use DELAY().
1802 * Initialize the console before we print anything out.
1811 /* Reset and mask the atpics and leave them shut down. */
1815 * Point the ICU spurious interrupt vectors at the APIC spurious
1816 * interrupt handler.
1818 setidt(IDT_IO_INTS + 7, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0);
1819 setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0);
1822 #error "have you forgotten the isa device?";
1828 if (boothowto & RB_KDB)
1829 kdb_enter(KDB_WHY_BOOTFLAGS,
1830 "Boot flags requested debugger");
1833 identify_cpu(); /* Final stage of CPU initialization */
1834 initializecpu(); /* Initialize CPU registers */
1835 initializecpucache();
1837 /* doublefault stack space, runs on ist1 */
1838 common_tss[0].tss_ist1 = (long)&dblfault_stack[sizeof(dblfault_stack)];
1841 * NMI stack, runs on ist2. The pcpu pointer is stored just
1842 * above the start of the ist2 stack.
1844 np = ((struct nmi_pcpu *) &nmi0_stack[sizeof(nmi0_stack)]) - 1;
1845 np->np_pcpu = (register_t) pc;
1846 common_tss[0].tss_ist2 = (long) np;
1848 /* Set the IO permission bitmap (empty due to tss seg limit) */
1849 common_tss[0].tss_iobase = sizeof(struct amd64tss) +
1850 IOPAGES * PAGE_SIZE;
1852 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
1855 /* Set up the fast syscall stuff */
1856 msr = rdmsr(MSR_EFER) | EFER_SCE;
1857 wrmsr(MSR_EFER, msr);
1858 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall));
1859 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32));
1860 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) |
1861 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48);
1862 wrmsr(MSR_STAR, msr);
1863 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D);
1865 getmemsize(kmdp, physfree);
1866 init_param2(physmem);
1868 /* now running on new page tables, configured,and u/iom is accessible */
1870 msgbufinit(msgbufp, msgbufsize);
1874 * Set up thread0 pcb after fpuinit calculated pcb + fpu save
1875 * area size. Zero out the extended state header in fpu save
1878 thread0.td_pcb = get_pcb_td(&thread0);
1879 bzero(get_pcb_user_save_td(&thread0), cpu_max_ext_state_size);
1881 xhdr = (struct xstate_hdr *)(get_pcb_user_save_td(&thread0) +
1883 xhdr->xstate_bv = xsave_mask;
1885 /* make an initial tss so cpu can get interrupt stack on syscall! */
1886 common_tss[0].tss_rsp0 = (vm_offset_t)thread0.td_pcb;
1887 /* Ensure the stack is aligned to 16 bytes */
1888 common_tss[0].tss_rsp0 &= ~0xFul;
1889 PCPU_SET(rsp0, common_tss[0].tss_rsp0);
1890 PCPU_SET(curpcb, thread0.td_pcb);
1892 /* transfer to user mode */
1894 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
1895 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
1896 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL);
1897 _ufssel = GSEL(GUFS32_SEL, SEL_UPL);
1898 _ugssel = GSEL(GUGS32_SEL, SEL_UPL);
1904 /* setup proc 0's pcb */
1905 thread0.td_pcb->pcb_flags = 0;
1906 thread0.td_pcb->pcb_cr3 = KPML4phys;
1907 thread0.td_frame = &proc0_tf;
1909 env = getenv("kernelname");
1911 strlcpy(kernelname, env, sizeof(kernelname));
1914 if (inw(0x10) == 0x49d2) {
1916 printf("Xen detected: disabling emulated block and network devices\n");
1927 /* Location of kernel stack for locore */
1928 return ((u_int64_t)thread0.td_pcb);
1932 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
1935 pcpu->pc_acpi_id = 0xffffffff;
1939 spinlock_enter(void)
1945 if (td->td_md.md_spinlock_count == 0) {
1946 flags = intr_disable();
1947 td->td_md.md_spinlock_count = 1;
1948 td->td_md.md_saved_flags = flags;
1950 td->td_md.md_spinlock_count++;
1962 flags = td->td_md.md_saved_flags;
1963 td->td_md.md_spinlock_count--;
1964 if (td->td_md.md_spinlock_count == 0)
1965 intr_restore(flags);
1969 * Construct a PCB from a trapframe. This is called from kdb_trap() where
1970 * we want to start a backtrace from the function that caused us to enter
1971 * the debugger. We have the context in the trapframe, but base the trace
1972 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
1973 * enough for a backtrace.
1976 makectx(struct trapframe *tf, struct pcb *pcb)
1979 pcb->pcb_r12 = tf->tf_r12;
1980 pcb->pcb_r13 = tf->tf_r13;
1981 pcb->pcb_r14 = tf->tf_r14;
1982 pcb->pcb_r15 = tf->tf_r15;
1983 pcb->pcb_rbp = tf->tf_rbp;
1984 pcb->pcb_rbx = tf->tf_rbx;
1985 pcb->pcb_rip = tf->tf_rip;
1986 pcb->pcb_rsp = tf->tf_rsp;
1990 ptrace_set_pc(struct thread *td, unsigned long addr)
1992 td->td_frame->tf_rip = addr;
1997 ptrace_single_step(struct thread *td)
1999 td->td_frame->tf_rflags |= PSL_T;
2004 ptrace_clear_single_step(struct thread *td)
2006 td->td_frame->tf_rflags &= ~PSL_T;
2011 fill_regs(struct thread *td, struct reg *regs)
2013 struct trapframe *tp;
2016 return (fill_frame_regs(tp, regs));
2020 fill_frame_regs(struct trapframe *tp, struct reg *regs)
2022 regs->r_r15 = tp->tf_r15;
2023 regs->r_r14 = tp->tf_r14;
2024 regs->r_r13 = tp->tf_r13;
2025 regs->r_r12 = tp->tf_r12;
2026 regs->r_r11 = tp->tf_r11;
2027 regs->r_r10 = tp->tf_r10;
2028 regs->r_r9 = tp->tf_r9;
2029 regs->r_r8 = tp->tf_r8;
2030 regs->r_rdi = tp->tf_rdi;
2031 regs->r_rsi = tp->tf_rsi;
2032 regs->r_rbp = tp->tf_rbp;
2033 regs->r_rbx = tp->tf_rbx;
2034 regs->r_rdx = tp->tf_rdx;
2035 regs->r_rcx = tp->tf_rcx;
2036 regs->r_rax = tp->tf_rax;
2037 regs->r_rip = tp->tf_rip;
2038 regs->r_cs = tp->tf_cs;
2039 regs->r_rflags = tp->tf_rflags;
2040 regs->r_rsp = tp->tf_rsp;
2041 regs->r_ss = tp->tf_ss;
2042 if (tp->tf_flags & TF_HASSEGS) {
2043 regs->r_ds = tp->tf_ds;
2044 regs->r_es = tp->tf_es;
2045 regs->r_fs = tp->tf_fs;
2046 regs->r_gs = tp->tf_gs;
2057 set_regs(struct thread *td, struct reg *regs)
2059 struct trapframe *tp;
2063 rflags = regs->r_rflags & 0xffffffff;
2064 if (!EFL_SECURE(rflags, tp->tf_rflags) || !CS_SECURE(regs->r_cs))
2066 tp->tf_r15 = regs->r_r15;
2067 tp->tf_r14 = regs->r_r14;
2068 tp->tf_r13 = regs->r_r13;
2069 tp->tf_r12 = regs->r_r12;
2070 tp->tf_r11 = regs->r_r11;
2071 tp->tf_r10 = regs->r_r10;
2072 tp->tf_r9 = regs->r_r9;
2073 tp->tf_r8 = regs->r_r8;
2074 tp->tf_rdi = regs->r_rdi;
2075 tp->tf_rsi = regs->r_rsi;
2076 tp->tf_rbp = regs->r_rbp;
2077 tp->tf_rbx = regs->r_rbx;
2078 tp->tf_rdx = regs->r_rdx;
2079 tp->tf_rcx = regs->r_rcx;
2080 tp->tf_rax = regs->r_rax;
2081 tp->tf_rip = regs->r_rip;
2082 tp->tf_cs = regs->r_cs;
2083 tp->tf_rflags = rflags;
2084 tp->tf_rsp = regs->r_rsp;
2085 tp->tf_ss = regs->r_ss;
2086 if (0) { /* XXXKIB */
2087 tp->tf_ds = regs->r_ds;
2088 tp->tf_es = regs->r_es;
2089 tp->tf_fs = regs->r_fs;
2090 tp->tf_gs = regs->r_gs;
2091 tp->tf_flags = TF_HASSEGS;
2092 set_pcb_flags(td->td_pcb, PCB_FULL_IRET);
2097 /* XXX check all this stuff! */
2098 /* externalize from sv_xmm */
2100 fill_fpregs_xmm(struct savefpu *sv_xmm, struct fpreg *fpregs)
2102 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env;
2103 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2107 bzero(fpregs, sizeof(*fpregs));
2109 /* FPU control/status */
2110 penv_fpreg->en_cw = penv_xmm->en_cw;
2111 penv_fpreg->en_sw = penv_xmm->en_sw;
2112 penv_fpreg->en_tw = penv_xmm->en_tw;
2113 penv_fpreg->en_opcode = penv_xmm->en_opcode;
2114 penv_fpreg->en_rip = penv_xmm->en_rip;
2115 penv_fpreg->en_rdp = penv_xmm->en_rdp;
2116 penv_fpreg->en_mxcsr = penv_xmm->en_mxcsr;
2117 penv_fpreg->en_mxcsr_mask = penv_xmm->en_mxcsr_mask;
2120 for (i = 0; i < 8; ++i)
2121 bcopy(sv_xmm->sv_fp[i].fp_acc.fp_bytes, fpregs->fpr_acc[i], 10);
2124 for (i = 0; i < 16; ++i)
2125 bcopy(sv_xmm->sv_xmm[i].xmm_bytes, fpregs->fpr_xacc[i], 16);
2128 /* internalize from fpregs into sv_xmm */
2130 set_fpregs_xmm(struct fpreg *fpregs, struct savefpu *sv_xmm)
2132 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2133 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env;
2137 /* FPU control/status */
2138 penv_xmm->en_cw = penv_fpreg->en_cw;
2139 penv_xmm->en_sw = penv_fpreg->en_sw;
2140 penv_xmm->en_tw = penv_fpreg->en_tw;
2141 penv_xmm->en_opcode = penv_fpreg->en_opcode;
2142 penv_xmm->en_rip = penv_fpreg->en_rip;
2143 penv_xmm->en_rdp = penv_fpreg->en_rdp;
2144 penv_xmm->en_mxcsr = penv_fpreg->en_mxcsr;
2145 penv_xmm->en_mxcsr_mask = penv_fpreg->en_mxcsr_mask & cpu_mxcsr_mask;
2148 for (i = 0; i < 8; ++i)
2149 bcopy(fpregs->fpr_acc[i], sv_xmm->sv_fp[i].fp_acc.fp_bytes, 10);
2152 for (i = 0; i < 16; ++i)
2153 bcopy(fpregs->fpr_xacc[i], sv_xmm->sv_xmm[i].xmm_bytes, 16);
2156 /* externalize from td->pcb */
2158 fill_fpregs(struct thread *td, struct fpreg *fpregs)
2161 KASSERT(td == curthread || TD_IS_SUSPENDED(td) ||
2162 P_SHOULDSTOP(td->td_proc),
2163 ("not suspended thread %p", td));
2165 fill_fpregs_xmm(get_pcb_user_save_td(td), fpregs);
2169 /* internalize to td->pcb */
2171 set_fpregs(struct thread *td, struct fpreg *fpregs)
2174 set_fpregs_xmm(fpregs, get_pcb_user_save_td(td));
2180 * Get machine context.
2183 get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
2186 struct trapframe *tp;
2190 PROC_LOCK(curthread->td_proc);
2191 mcp->mc_onstack = sigonstack(tp->tf_rsp);
2192 PROC_UNLOCK(curthread->td_proc);
2193 mcp->mc_r15 = tp->tf_r15;
2194 mcp->mc_r14 = tp->tf_r14;
2195 mcp->mc_r13 = tp->tf_r13;
2196 mcp->mc_r12 = tp->tf_r12;
2197 mcp->mc_r11 = tp->tf_r11;
2198 mcp->mc_r10 = tp->tf_r10;
2199 mcp->mc_r9 = tp->tf_r9;
2200 mcp->mc_r8 = tp->tf_r8;
2201 mcp->mc_rdi = tp->tf_rdi;
2202 mcp->mc_rsi = tp->tf_rsi;
2203 mcp->mc_rbp = tp->tf_rbp;
2204 mcp->mc_rbx = tp->tf_rbx;
2205 mcp->mc_rcx = tp->tf_rcx;
2206 mcp->mc_rflags = tp->tf_rflags;
2207 if (flags & GET_MC_CLEAR_RET) {
2210 mcp->mc_rflags &= ~PSL_C;
2212 mcp->mc_rax = tp->tf_rax;
2213 mcp->mc_rdx = tp->tf_rdx;
2215 mcp->mc_rip = tp->tf_rip;
2216 mcp->mc_cs = tp->tf_cs;
2217 mcp->mc_rsp = tp->tf_rsp;
2218 mcp->mc_ss = tp->tf_ss;
2219 mcp->mc_ds = tp->tf_ds;
2220 mcp->mc_es = tp->tf_es;
2221 mcp->mc_fs = tp->tf_fs;
2222 mcp->mc_gs = tp->tf_gs;
2223 mcp->mc_flags = tp->tf_flags;
2224 mcp->mc_len = sizeof(*mcp);
2225 get_fpcontext(td, mcp, NULL, 0);
2226 mcp->mc_fsbase = pcb->pcb_fsbase;
2227 mcp->mc_gsbase = pcb->pcb_gsbase;
2228 mcp->mc_xfpustate = 0;
2229 mcp->mc_xfpustate_len = 0;
2230 bzero(mcp->mc_spare, sizeof(mcp->mc_spare));
2235 * Set machine context.
2237 * However, we don't set any but the user modifiable flags, and we won't
2238 * touch the cs selector.
2241 set_mcontext(struct thread *td, const mcontext_t *mcp)
2244 struct trapframe *tp;
2251 if (mcp->mc_len != sizeof(*mcp) ||
2252 (mcp->mc_flags & ~_MC_FLAG_MASK) != 0)
2254 rflags = (mcp->mc_rflags & PSL_USERCHANGE) |
2255 (tp->tf_rflags & ~PSL_USERCHANGE);
2256 if (mcp->mc_flags & _MC_HASFPXSTATE) {
2257 if (mcp->mc_xfpustate_len > cpu_max_ext_state_size -
2258 sizeof(struct savefpu))
2260 xfpustate = __builtin_alloca(mcp->mc_xfpustate_len);
2261 ret = copyin((void *)mcp->mc_xfpustate, xfpustate,
2262 mcp->mc_xfpustate_len);
2267 ret = set_fpcontext(td, mcp, xfpustate, mcp->mc_xfpustate_len);
2270 tp->tf_r15 = mcp->mc_r15;
2271 tp->tf_r14 = mcp->mc_r14;
2272 tp->tf_r13 = mcp->mc_r13;
2273 tp->tf_r12 = mcp->mc_r12;
2274 tp->tf_r11 = mcp->mc_r11;
2275 tp->tf_r10 = mcp->mc_r10;
2276 tp->tf_r9 = mcp->mc_r9;
2277 tp->tf_r8 = mcp->mc_r8;
2278 tp->tf_rdi = mcp->mc_rdi;
2279 tp->tf_rsi = mcp->mc_rsi;
2280 tp->tf_rbp = mcp->mc_rbp;
2281 tp->tf_rbx = mcp->mc_rbx;
2282 tp->tf_rdx = mcp->mc_rdx;
2283 tp->tf_rcx = mcp->mc_rcx;
2284 tp->tf_rax = mcp->mc_rax;
2285 tp->tf_rip = mcp->mc_rip;
2286 tp->tf_rflags = rflags;
2287 tp->tf_rsp = mcp->mc_rsp;
2288 tp->tf_ss = mcp->mc_ss;
2289 tp->tf_flags = mcp->mc_flags;
2290 if (tp->tf_flags & TF_HASSEGS) {
2291 tp->tf_ds = mcp->mc_ds;
2292 tp->tf_es = mcp->mc_es;
2293 tp->tf_fs = mcp->mc_fs;
2294 tp->tf_gs = mcp->mc_gs;
2296 if (mcp->mc_flags & _MC_HASBASES) {
2297 pcb->pcb_fsbase = mcp->mc_fsbase;
2298 pcb->pcb_gsbase = mcp->mc_gsbase;
2300 set_pcb_flags(pcb, PCB_FULL_IRET);
2305 get_fpcontext(struct thread *td, mcontext_t *mcp, char *xfpusave,
2306 size_t xfpusave_len)
2308 size_t max_len, len;
2310 mcp->mc_ownedfp = fpugetregs(td);
2311 bcopy(get_pcb_user_save_td(td), &mcp->mc_fpstate[0],
2312 sizeof(mcp->mc_fpstate));
2313 mcp->mc_fpformat = fpuformat();
2314 if (!use_xsave || xfpusave_len == 0)
2316 max_len = cpu_max_ext_state_size - sizeof(struct savefpu);
2318 if (len > max_len) {
2320 bzero(xfpusave + max_len, len - max_len);
2322 mcp->mc_flags |= _MC_HASFPXSTATE;
2323 mcp->mc_xfpustate_len = len;
2324 bcopy(get_pcb_user_save_td(td) + 1, xfpusave, len);
2328 set_fpcontext(struct thread *td, const mcontext_t *mcp, char *xfpustate,
2329 size_t xfpustate_len)
2331 struct savefpu *fpstate;
2334 if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
2336 else if (mcp->mc_fpformat != _MC_FPFMT_XMM)
2338 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) {
2339 /* We don't care what state is left in the FPU or PCB. */
2342 } else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
2343 mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
2344 fpstate = (struct savefpu *)&mcp->mc_fpstate;
2345 fpstate->sv_env.en_mxcsr &= cpu_mxcsr_mask;
2346 error = fpusetregs(td, fpstate, xfpustate, xfpustate_len);
2353 fpstate_drop(struct thread *td)
2356 KASSERT(PCB_USER_FPU(td->td_pcb), ("fpstate_drop: kernel-owned fpu"));
2358 if (PCPU_GET(fpcurthread) == td)
2361 * XXX force a full drop of the fpu. The above only drops it if we
2364 * XXX I don't much like fpugetuserregs()'s semantics of doing a full
2365 * drop. Dropping only to the pcb matches fnsave's behaviour.
2366 * We only need to drop to !PCB_INITDONE in sendsig(). But
2367 * sendsig() is the only caller of fpugetuserregs()... perhaps we just
2368 * have too many layers.
2370 clear_pcb_flags(curthread->td_pcb,
2371 PCB_FPUINITDONE | PCB_USERFPUINITDONE);
2376 fill_dbregs(struct thread *td, struct dbreg *dbregs)
2381 dbregs->dr[0] = rdr0();
2382 dbregs->dr[1] = rdr1();
2383 dbregs->dr[2] = rdr2();
2384 dbregs->dr[3] = rdr3();
2385 dbregs->dr[6] = rdr6();
2386 dbregs->dr[7] = rdr7();
2389 dbregs->dr[0] = pcb->pcb_dr0;
2390 dbregs->dr[1] = pcb->pcb_dr1;
2391 dbregs->dr[2] = pcb->pcb_dr2;
2392 dbregs->dr[3] = pcb->pcb_dr3;
2393 dbregs->dr[6] = pcb->pcb_dr6;
2394 dbregs->dr[7] = pcb->pcb_dr7;
2410 set_dbregs(struct thread *td, struct dbreg *dbregs)
2416 load_dr0(dbregs->dr[0]);
2417 load_dr1(dbregs->dr[1]);
2418 load_dr2(dbregs->dr[2]);
2419 load_dr3(dbregs->dr[3]);
2420 load_dr6(dbregs->dr[6]);
2421 load_dr7(dbregs->dr[7]);
2424 * Don't let an illegal value for dr7 get set. Specifically,
2425 * check for undefined settings. Setting these bit patterns
2426 * result in undefined behaviour and can lead to an unexpected
2427 * TRCTRAP or a general protection fault right here.
2428 * Upper bits of dr6 and dr7 must not be set
2430 for (i = 0; i < 4; i++) {
2431 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02)
2433 if (td->td_frame->tf_cs == _ucode32sel &&
2434 DBREG_DR7_LEN(dbregs->dr[7], i) == DBREG_DR7_LEN_8)
2437 if ((dbregs->dr[6] & 0xffffffff00000000ul) != 0 ||
2438 (dbregs->dr[7] & 0xffffffff00000000ul) != 0)
2444 * Don't let a process set a breakpoint that is not within the
2445 * process's address space. If a process could do this, it
2446 * could halt the system by setting a breakpoint in the kernel
2447 * (if ddb was enabled). Thus, we need to check to make sure
2448 * that no breakpoints are being enabled for addresses outside
2449 * process's address space.
2451 * XXX - what about when the watched area of the user's
2452 * address space is written into from within the kernel
2453 * ... wouldn't that still cause a breakpoint to be generated
2454 * from within kernel mode?
2457 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) {
2458 /* dr0 is enabled */
2459 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS)
2462 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) {
2463 /* dr1 is enabled */
2464 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS)
2467 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) {
2468 /* dr2 is enabled */
2469 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS)
2472 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) {
2473 /* dr3 is enabled */
2474 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS)
2478 pcb->pcb_dr0 = dbregs->dr[0];
2479 pcb->pcb_dr1 = dbregs->dr[1];
2480 pcb->pcb_dr2 = dbregs->dr[2];
2481 pcb->pcb_dr3 = dbregs->dr[3];
2482 pcb->pcb_dr6 = dbregs->dr[6];
2483 pcb->pcb_dr7 = dbregs->dr[7];
2485 set_pcb_flags(pcb, PCB_DBREGS);
2495 load_dr7(0); /* Turn off the control bits first */
2504 * Return > 0 if a hardware breakpoint has been hit, and the
2505 * breakpoint was in user space. Return 0, otherwise.
2508 user_dbreg_trap(void)
2510 u_int64_t dr7, dr6; /* debug registers dr6 and dr7 */
2511 u_int64_t bp; /* breakpoint bits extracted from dr6 */
2512 int nbp; /* number of breakpoints that triggered */
2513 caddr_t addr[4]; /* breakpoint addresses */
2517 if ((dr7 & 0x000000ff) == 0) {
2519 * all GE and LE bits in the dr7 register are zero,
2520 * thus the trap couldn't have been caused by the
2521 * hardware debug registers
2528 bp = dr6 & 0x0000000f;
2532 * None of the breakpoint bits are set meaning this
2533 * trap was not caused by any of the debug registers
2539 * at least one of the breakpoints were hit, check to see
2540 * which ones and if any of them are user space addresses
2544 addr[nbp++] = (caddr_t)rdr0();
2547 addr[nbp++] = (caddr_t)rdr1();
2550 addr[nbp++] = (caddr_t)rdr2();
2553 addr[nbp++] = (caddr_t)rdr3();
2556 for (i = 0; i < nbp; i++) {
2557 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) {
2559 * addr[i] is in user space
2566 * None of the breakpoints are in user space.
2574 * Provide inb() and outb() as functions. They are normally only available as
2575 * inline functions, thus cannot be called from the debugger.
2578 /* silence compiler warnings */
2579 u_char inb_(u_short);
2580 void outb_(u_short, u_char);
2589 outb_(u_short port, u_char data)