2 * SPDX-License-Identifier: BSD-4-Clause
4 * Copyright (c) 2003 Peter Wemm.
5 * Copyright (c) 1992 Terrence R. Lambert.
6 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
9 * This code is derived from software contributed to Berkeley by
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 * 3. All advertising materials mentioning features or use of this software
21 * must display the following acknowledgement:
22 * This product includes software developed by the University of
23 * California, Berkeley and its contributors.
24 * 4. Neither the name of the University nor the names of its contributors
25 * may be used to endorse or promote products derived from this software
26 * without specific prior written permission.
28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
40 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
43 #include <sys/cdefs.h>
44 __FBSDID("$FreeBSD$");
46 #include "opt_atpic.h"
47 #include "opt_compat.h"
52 #include "opt_kstack_pages.h"
53 #include "opt_maxmem.h"
54 #include "opt_mp_watchdog.h"
55 #include "opt_platform.h"
56 #include "opt_sched.h"
58 #include <sys/param.h>
60 #include <sys/systm.h>
64 #include <sys/callout.h>
68 #include <sys/eventhandler.h>
70 #include <sys/imgact.h>
72 #include <sys/kernel.h>
74 #include <sys/linker.h>
76 #include <sys/malloc.h>
77 #include <sys/memrange.h>
78 #include <sys/msgbuf.h>
79 #include <sys/mutex.h>
81 #include <sys/ptrace.h>
82 #include <sys/reboot.h>
83 #include <sys/rwlock.h>
84 #include <sys/sched.h>
85 #include <sys/signalvar.h>
89 #include <sys/syscallsubr.h>
90 #include <sys/sysctl.h>
91 #include <sys/sysent.h>
92 #include <sys/sysproto.h>
93 #include <sys/ucontext.h>
94 #include <sys/vmmeter.h>
97 #include <vm/vm_extern.h>
98 #include <vm/vm_kern.h>
99 #include <vm/vm_page.h>
100 #include <vm/vm_map.h>
101 #include <vm/vm_object.h>
102 #include <vm/vm_pager.h>
103 #include <vm/vm_param.h>
107 #error KDB must be enabled in order for DDB to work!
110 #include <ddb/db_sym.h>
113 #include <net/netisr.h>
115 #include <machine/clock.h>
116 #include <machine/cpu.h>
117 #include <machine/cputypes.h>
118 #include <machine/frame.h>
119 #include <machine/intr_machdep.h>
121 #include <machine/md_var.h>
122 #include <machine/metadata.h>
123 #include <machine/mp_watchdog.h>
124 #include <machine/pc/bios.h>
125 #include <machine/pcb.h>
126 #include <machine/proc.h>
127 #include <machine/reg.h>
128 #include <machine/sigframe.h>
129 #include <machine/specialreg.h>
130 #include <machine/trap.h>
131 #include <machine/tss.h>
133 #include <machine/smp.h>
140 #include <x86/isa/icu.h>
142 #include <x86/apicvar.h>
145 #include <isa/isareg.h>
147 #include <x86/init.h>
149 /* Sanity check for __curthread() */
150 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
153 * The PTI trampoline stack needs enough space for a hardware trapframe and a
154 * couple of scratch registers, as well as the trapframe left behind after an
157 CTASSERT(PC_PTI_STACK_SZ * sizeof(register_t) >= 2 * sizeof(struct pti_frame) -
158 offsetof(struct pti_frame, pti_rip));
160 extern u_int64_t hammer_time(u_int64_t, u_int64_t);
162 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
163 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
165 static void cpu_startup(void *);
166 static void get_fpcontext(struct thread *td, mcontext_t *mcp,
167 char *xfpusave, size_t xfpusave_len);
168 static int set_fpcontext(struct thread *td, mcontext_t *mcp,
169 char *xfpustate, size_t xfpustate_len);
170 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
172 /* Preload data parse function */
173 static caddr_t native_parse_preload_data(u_int64_t);
175 /* Native function to fetch and parse the e820 map */
176 static void native_parse_memmap(caddr_t, vm_paddr_t *, int *);
178 /* Default init_ops implementation. */
179 struct init_ops init_ops = {
180 .parse_preload_data = native_parse_preload_data,
181 .early_clock_source_init = i8254_init,
182 .early_delay = i8254_delay,
183 .parse_memmap = native_parse_memmap,
185 .mp_bootaddress = mp_bootaddress,
186 .start_all_aps = native_start_all_aps,
188 .msi_init = msi_init,
192 * Physical address of the EFI System Table. Stashed from the metadata hints
193 * passed into the kernel and used by the EFI code to call runtime services.
195 vm_paddr_t efi_systbl_phys;
197 /* Intel ICH registers */
198 #define ICH_PMBASE 0x400
199 #define ICH_SMI_EN ICH_PMBASE + 0x30
201 int _udatasel, _ucodesel, _ucode32sel, _ufssel, _ugssel;
209 * The number of PHYSMAP entries must be one less than the number of
210 * PHYSSEG entries because the PHYSMAP entry that spans the largest
211 * physical address that is accessible by ISA DMA is split into two
214 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
216 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
217 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
219 /* must be 2 less so 0 0 can signal end of chunks */
220 #define PHYS_AVAIL_ARRAY_END (nitems(phys_avail) - 2)
221 #define DUMP_AVAIL_ARRAY_END (nitems(dump_avail) - 2)
223 struct kva_md_info kmi;
225 static struct trapframe proc0_tf;
226 struct region_descriptor r_gdt, r_idt;
228 struct pcpu __pcpu[MAXCPU];
232 struct mem_range_softc mem_range_softc;
234 struct mtx dt_lock; /* lock for GDT and LDT */
236 void (*vmm_resume_p)(void);
246 * On MacBooks, we need to disallow the legacy USB circuit to
247 * generate an SMI# because this can cause several problems,
248 * namely: incorrect CPU frequency detection and failure to
250 * We do this by disabling a bit in the SMI_EN (SMI Control and
251 * Enable register) of the Intel ICH LPC Interface Bridge.
253 sysenv = kern_getenv("smbios.system.product");
254 if (sysenv != NULL) {
255 if (strncmp(sysenv, "MacBook1,1", 10) == 0 ||
256 strncmp(sysenv, "MacBook3,1", 10) == 0 ||
257 strncmp(sysenv, "MacBook4,1", 10) == 0 ||
258 strncmp(sysenv, "MacBookPro1,1", 13) == 0 ||
259 strncmp(sysenv, "MacBookPro1,2", 13) == 0 ||
260 strncmp(sysenv, "MacBookPro3,1", 13) == 0 ||
261 strncmp(sysenv, "MacBookPro4,1", 13) == 0 ||
262 strncmp(sysenv, "Macmini1,1", 10) == 0) {
264 printf("Disabling LEGACY_USB_EN bit on "
266 outl(ICH_SMI_EN, inl(ICH_SMI_EN) & ~0x8);
272 * Good {morning,afternoon,evening,night}.
278 * Display physical memory if SMBIOS reports reasonable amount.
281 sysenv = kern_getenv("smbios.memory.enabled");
282 if (sysenv != NULL) {
283 memsize = (uintmax_t)strtoul(sysenv, (char **)NULL, 10) << 10;
286 if (memsize < ptoa((uintmax_t)vm_free_count()))
287 memsize = ptoa((uintmax_t)Maxmem);
288 printf("real memory = %ju (%ju MB)\n", memsize, memsize >> 20);
289 realmem = atop(memsize);
292 * Display any holes after the first chunk of extended memory.
297 printf("Physical memory chunk(s):\n");
298 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
301 size = phys_avail[indx + 1] - phys_avail[indx];
303 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n",
304 (uintmax_t)phys_avail[indx],
305 (uintmax_t)phys_avail[indx + 1] - 1,
306 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
310 vm_ksubmap_init(&kmi);
312 printf("avail memory = %ju (%ju MB)\n",
313 ptoa((uintmax_t)vm_free_count()),
314 ptoa((uintmax_t)vm_free_count()) / 1048576);
317 * Set up buffers, so they can be used to read disk labels.
320 vm_pager_bufferinit();
326 * Send an interrupt to process.
328 * Stack is set up to allow sigcode stored
329 * at top to call routine, followed by call
330 * to sigreturn routine below. After sigreturn
331 * resets the signal mask, the stack, and the
332 * frame pointer, it returns to the user
336 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
338 struct sigframe sf, *sfp;
344 struct trapframe *regs;
353 PROC_LOCK_ASSERT(p, MA_OWNED);
354 sig = ksi->ksi_signo;
356 mtx_assert(&psp->ps_mtx, MA_OWNED);
358 oonstack = sigonstack(regs->tf_rsp);
360 if (cpu_max_ext_state_size > sizeof(struct savefpu) && use_xsave) {
361 xfpusave_len = cpu_max_ext_state_size - sizeof(struct savefpu);
362 xfpusave = __builtin_alloca(xfpusave_len);
368 /* Save user context. */
369 bzero(&sf, sizeof(sf));
370 sf.sf_uc.uc_sigmask = *mask;
371 sf.sf_uc.uc_stack = td->td_sigstk;
372 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
373 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
374 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
375 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(*regs));
376 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */
377 get_fpcontext(td, &sf.sf_uc.uc_mcontext, xfpusave, xfpusave_len);
379 update_pcb_bases(pcb);
380 sf.sf_uc.uc_mcontext.mc_fsbase = pcb->pcb_fsbase;
381 sf.sf_uc.uc_mcontext.mc_gsbase = pcb->pcb_gsbase;
382 bzero(sf.sf_uc.uc_mcontext.mc_spare,
383 sizeof(sf.sf_uc.uc_mcontext.mc_spare));
384 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__));
386 /* Allocate space for the signal handler context. */
387 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
388 SIGISMEMBER(psp->ps_sigonstack, sig)) {
389 sp = (char *)td->td_sigstk.ss_sp + td->td_sigstk.ss_size;
390 #if defined(COMPAT_43)
391 td->td_sigstk.ss_flags |= SS_ONSTACK;
394 sp = (char *)regs->tf_rsp - 128;
395 if (xfpusave != NULL) {
397 sp = (char *)((unsigned long)sp & ~0x3Ful);
398 sf.sf_uc.uc_mcontext.mc_xfpustate = (register_t)sp;
400 sp -= sizeof(struct sigframe);
401 /* Align to 16 bytes. */
402 sfp = (struct sigframe *)((unsigned long)sp & ~0xFul);
404 /* Build the argument list for the signal handler. */
405 regs->tf_rdi = sig; /* arg 1 in %rdi */
406 regs->tf_rdx = (register_t)&sfp->sf_uc; /* arg 3 in %rdx */
407 bzero(&sf.sf_si, sizeof(sf.sf_si));
408 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
409 /* Signal handler installed with SA_SIGINFO. */
410 regs->tf_rsi = (register_t)&sfp->sf_si; /* arg 2 in %rsi */
411 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
413 /* Fill in POSIX parts */
414 sf.sf_si = ksi->ksi_info;
415 sf.sf_si.si_signo = sig; /* maybe a translated signal */
416 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */
418 /* Old FreeBSD-style arguments. */
419 regs->tf_rsi = ksi->ksi_code; /* arg 2 in %rsi */
420 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */
421 sf.sf_ahu.sf_handler = catcher;
423 mtx_unlock(&psp->ps_mtx);
427 * Copy the sigframe out to the user's stack.
429 if (copyout(&sf, sfp, sizeof(*sfp)) != 0 ||
430 (xfpusave != NULL && copyout(xfpusave,
431 (void *)sf.sf_uc.uc_mcontext.mc_xfpustate, xfpusave_len)
434 printf("process %ld has trashed its stack\n", (long)p->p_pid);
440 regs->tf_rsp = (long)sfp;
441 regs->tf_rip = p->p_sysent->sv_sigcode_base;
442 regs->tf_rflags &= ~(PSL_T | PSL_D);
443 regs->tf_cs = _ucodesel;
444 regs->tf_ds = _udatasel;
445 regs->tf_ss = _udatasel;
446 regs->tf_es = _udatasel;
447 regs->tf_fs = _ufssel;
448 regs->tf_gs = _ugssel;
449 regs->tf_flags = TF_HASSEGS;
451 mtx_lock(&psp->ps_mtx);
455 * System call to cleanup state after a signal
456 * has been taken. Reset signal mask and
457 * stack state from context left by sendsig (above).
458 * Return to previous pc and psl as specified by
459 * context left by sendsig. Check carefully to
460 * make sure that the user has not modified the
461 * state to gain improper privileges.
466 sys_sigreturn(td, uap)
468 struct sigreturn_args /* {
469 const struct __ucontext *sigcntxp;
475 struct trapframe *regs;
478 size_t xfpustate_len;
486 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
488 uprintf("pid %d (%s): sigreturn copyin failed\n",
489 p->p_pid, td->td_name);
493 if ((ucp->uc_mcontext.mc_flags & ~_MC_FLAG_MASK) != 0) {
494 uprintf("pid %d (%s): sigreturn mc_flags %x\n", p->p_pid,
495 td->td_name, ucp->uc_mcontext.mc_flags);
499 rflags = ucp->uc_mcontext.mc_rflags;
501 * Don't allow users to change privileged or reserved flags.
503 if (!EFL_SECURE(rflags, regs->tf_rflags)) {
504 uprintf("pid %d (%s): sigreturn rflags = 0x%lx\n", p->p_pid,
505 td->td_name, rflags);
510 * Don't allow users to load a valid privileged %cs. Let the
511 * hardware check for invalid selectors, excess privilege in
512 * other selectors, invalid %eip's and invalid %esp's.
514 cs = ucp->uc_mcontext.mc_cs;
515 if (!CS_SECURE(cs)) {
516 uprintf("pid %d (%s): sigreturn cs = 0x%x\n", p->p_pid,
518 ksiginfo_init_trap(&ksi);
519 ksi.ksi_signo = SIGBUS;
520 ksi.ksi_code = BUS_OBJERR;
521 ksi.ksi_trapno = T_PROTFLT;
522 ksi.ksi_addr = (void *)regs->tf_rip;
523 trapsignal(td, &ksi);
527 if ((uc.uc_mcontext.mc_flags & _MC_HASFPXSTATE) != 0) {
528 xfpustate_len = uc.uc_mcontext.mc_xfpustate_len;
529 if (xfpustate_len > cpu_max_ext_state_size -
530 sizeof(struct savefpu)) {
531 uprintf("pid %d (%s): sigreturn xfpusave_len = 0x%zx\n",
532 p->p_pid, td->td_name, xfpustate_len);
535 xfpustate = __builtin_alloca(xfpustate_len);
536 error = copyin((const void *)uc.uc_mcontext.mc_xfpustate,
537 xfpustate, xfpustate_len);
540 "pid %d (%s): sigreturn copying xfpustate failed\n",
541 p->p_pid, td->td_name);
548 ret = set_fpcontext(td, &ucp->uc_mcontext, xfpustate, xfpustate_len);
550 uprintf("pid %d (%s): sigreturn set_fpcontext err %d\n",
551 p->p_pid, td->td_name, ret);
554 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(*regs));
555 update_pcb_bases(pcb);
556 pcb->pcb_fsbase = ucp->uc_mcontext.mc_fsbase;
557 pcb->pcb_gsbase = ucp->uc_mcontext.mc_gsbase;
559 #if defined(COMPAT_43)
560 if (ucp->uc_mcontext.mc_onstack & 1)
561 td->td_sigstk.ss_flags |= SS_ONSTACK;
563 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
566 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
567 return (EJUSTRETURN);
570 #ifdef COMPAT_FREEBSD4
572 freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap)
575 return sys_sigreturn(td, (struct sigreturn_args *)uap);
580 * Reset registers to default values on exec.
583 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
585 struct trapframe *regs = td->td_frame;
586 struct pcb *pcb = td->td_pcb;
588 if (td->td_proc->p_md.md_ldt != NULL)
591 update_pcb_bases(pcb);
594 clear_pcb_flags(pcb, PCB_32BIT);
595 pcb->pcb_initial_fpucw = __INITIAL_FPUCW__;
597 bzero((char *)regs, sizeof(struct trapframe));
598 regs->tf_rip = imgp->entry_addr;
599 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8;
600 regs->tf_rdi = stack; /* argv */
601 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T);
602 regs->tf_ss = _udatasel;
603 regs->tf_cs = _ucodesel;
604 regs->tf_ds = _udatasel;
605 regs->tf_es = _udatasel;
606 regs->tf_fs = _ufssel;
607 regs->tf_gs = _ugssel;
608 regs->tf_flags = TF_HASSEGS;
611 * Reset the hardware debug registers if they were in use.
612 * They won't have any meaning for the newly exec'd process.
614 if (pcb->pcb_flags & PCB_DBREGS) {
623 * Clear the debug registers on the running
624 * CPU, otherwise they will end up affecting
625 * the next process we switch to.
629 clear_pcb_flags(pcb, PCB_DBREGS);
633 * Drop the FP state if we hold it, so that the process gets a
634 * clean FP state if it uses the FPU again.
646 * CR0_MP, CR0_NE and CR0_TS are also set by npx_probe() for the
647 * BSP. See the comments there about why we set them.
649 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM;
654 * Initialize amd64 and configure to run kernel
658 * Initialize segments & interrupt table
661 struct user_segment_descriptor gdt[NGDT * MAXCPU];/* global descriptor tables */
662 static struct gate_descriptor idt0[NIDT];
663 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
665 static char dblfault_stack[PAGE_SIZE] __aligned(16);
666 static char mce0_stack[PAGE_SIZE] __aligned(16);
667 static char nmi0_stack[PAGE_SIZE] __aligned(16);
668 CTASSERT(sizeof(struct nmi_pcpu) == 16);
670 struct amd64tss common_tss[MAXCPU];
673 * Software prototypes -- in more palatable form.
675 * Keep GUFS32, GUGS32, GUCODE32 and GUDATA at the same
676 * slots as corresponding segments for i386 kernel.
678 struct soft_segment_descriptor gdt_segs[] = {
679 /* GNULL_SEL 0 Null Descriptor */
688 /* GNULL2_SEL 1 Null Descriptor */
697 /* GUFS32_SEL 2 32 bit %gs Descriptor for user */
699 .ssd_limit = 0xfffff,
700 .ssd_type = SDT_MEMRWA,
706 /* GUGS32_SEL 3 32 bit %fs Descriptor for user */
708 .ssd_limit = 0xfffff,
709 .ssd_type = SDT_MEMRWA,
715 /* GCODE_SEL 4 Code Descriptor for kernel */
717 .ssd_limit = 0xfffff,
718 .ssd_type = SDT_MEMERA,
724 /* GDATA_SEL 5 Data Descriptor for kernel */
726 .ssd_limit = 0xfffff,
727 .ssd_type = SDT_MEMRWA,
733 /* GUCODE32_SEL 6 32 bit Code Descriptor for user */
735 .ssd_limit = 0xfffff,
736 .ssd_type = SDT_MEMERA,
742 /* GUDATA_SEL 7 32/64 bit Data Descriptor for user */
744 .ssd_limit = 0xfffff,
745 .ssd_type = SDT_MEMRWA,
751 /* GUCODE_SEL 8 64 bit Code Descriptor for user */
753 .ssd_limit = 0xfffff,
754 .ssd_type = SDT_MEMERA,
760 /* GPROC0_SEL 9 Proc 0 Tss Descriptor */
762 .ssd_limit = sizeof(struct amd64tss) + IOPERM_BITMAP_SIZE - 1,
763 .ssd_type = SDT_SYSTSS,
769 /* Actually, the TSS is a system descriptor which is double size */
778 /* GUSERLDT_SEL 11 LDT Descriptor */
787 /* GUSERLDT_SEL 12 LDT Descriptor, double size */
799 setidt(int idx, inthand_t *func, int typ, int dpl, int ist)
801 struct gate_descriptor *ip;
804 ip->gd_looffset = (uintptr_t)func;
805 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL);
811 ip->gd_hioffset = ((uintptr_t)func)>>16 ;
815 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
816 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
817 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
818 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
819 IDTVEC(xmm), IDTVEC(dblfault),
820 IDTVEC(div_pti), IDTVEC(dbg_pti), IDTVEC(bpt_pti),
821 IDTVEC(ofl_pti), IDTVEC(bnd_pti), IDTVEC(ill_pti), IDTVEC(dna_pti),
822 IDTVEC(fpusegm_pti), IDTVEC(tss_pti), IDTVEC(missing_pti),
823 IDTVEC(stk_pti), IDTVEC(prot_pti), IDTVEC(page_pti),
824 IDTVEC(rsvd_pti), IDTVEC(fpu_pti), IDTVEC(align_pti),
827 IDTVEC(dtrace_ret), IDTVEC(dtrace_ret_pti),
830 IDTVEC(xen_intr_upcall), IDTVEC(xen_intr_upcall_pti),
832 IDTVEC(fast_syscall), IDTVEC(fast_syscall32),
833 IDTVEC(fast_syscall_pti);
837 * Display the index and function name of any IDT entries that don't use
838 * the default 'rsvd' entry point.
840 DB_SHOW_COMMAND(idt, db_show_idt)
842 struct gate_descriptor *ip;
847 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) {
848 func = ((long)ip->gd_hioffset << 16 | ip->gd_looffset);
849 if (func != (uintptr_t)&IDTVEC(rsvd)) {
850 db_printf("%3d\t", idx);
851 db_printsym(func, DB_STGY_PROC);
858 /* Show privileged registers. */
859 DB_SHOW_COMMAND(sysregs, db_show_sysregs)
864 } __packed idtr, gdtr;
867 __asm __volatile("sidt %0" : "=m" (idtr));
868 db_printf("idtr\t0x%016lx/%04x\n",
869 (u_long)idtr.base, (u_int)idtr.limit);
870 __asm __volatile("sgdt %0" : "=m" (gdtr));
871 db_printf("gdtr\t0x%016lx/%04x\n",
872 (u_long)gdtr.base, (u_int)gdtr.limit);
873 __asm __volatile("sldt %0" : "=r" (ldt));
874 db_printf("ldtr\t0x%04x\n", ldt);
875 __asm __volatile("str %0" : "=r" (tr));
876 db_printf("tr\t0x%04x\n", tr);
877 db_printf("cr0\t0x%016lx\n", rcr0());
878 db_printf("cr2\t0x%016lx\n", rcr2());
879 db_printf("cr3\t0x%016lx\n", rcr3());
880 db_printf("cr4\t0x%016lx\n", rcr4());
881 if (rcr4() & CR4_XSAVE)
882 db_printf("xcr0\t0x%016lx\n", rxcr(0));
883 db_printf("EFER\t0x%016lx\n", rdmsr(MSR_EFER));
884 if (cpu_feature2 & (CPUID2_VMX | CPUID2_SMX))
885 db_printf("FEATURES_CTL\t%016lx\n",
886 rdmsr(MSR_IA32_FEATURE_CONTROL));
887 db_printf("DEBUG_CTL\t0x%016lx\n", rdmsr(MSR_DEBUGCTLMSR));
888 db_printf("PAT\t0x%016lx\n", rdmsr(MSR_PAT));
889 db_printf("GSBASE\t0x%016lx\n", rdmsr(MSR_GSBASE));
892 DB_SHOW_COMMAND(dbregs, db_show_dbregs)
895 db_printf("dr0\t0x%016lx\n", rdr0());
896 db_printf("dr1\t0x%016lx\n", rdr1());
897 db_printf("dr2\t0x%016lx\n", rdr2());
898 db_printf("dr3\t0x%016lx\n", rdr3());
899 db_printf("dr6\t0x%016lx\n", rdr6());
900 db_printf("dr7\t0x%016lx\n", rdr7());
906 struct user_segment_descriptor *sd;
907 struct soft_segment_descriptor *ssd;
910 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
911 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
912 ssd->ssd_type = sd->sd_type;
913 ssd->ssd_dpl = sd->sd_dpl;
914 ssd->ssd_p = sd->sd_p;
915 ssd->ssd_long = sd->sd_long;
916 ssd->ssd_def32 = sd->sd_def32;
917 ssd->ssd_gran = sd->sd_gran;
922 struct soft_segment_descriptor *ssd;
923 struct user_segment_descriptor *sd;
926 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
927 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff;
928 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
929 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
930 sd->sd_type = ssd->ssd_type;
931 sd->sd_dpl = ssd->ssd_dpl;
932 sd->sd_p = ssd->ssd_p;
933 sd->sd_long = ssd->ssd_long;
934 sd->sd_def32 = ssd->ssd_def32;
935 sd->sd_gran = ssd->ssd_gran;
940 struct soft_segment_descriptor *ssd;
941 struct system_segment_descriptor *sd;
944 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
945 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful;
946 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
947 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
948 sd->sd_type = ssd->ssd_type;
949 sd->sd_dpl = ssd->ssd_dpl;
950 sd->sd_p = ssd->ssd_p;
951 sd->sd_gran = ssd->ssd_gran;
954 #if !defined(DEV_ATPIC) && defined(DEV_ISA)
955 #include <isa/isavar.h>
956 #include <isa/isareg.h>
958 * Return a bitmap of the current interrupt requests. This is 8259-specific
959 * and is only suitable for use at probe time.
960 * This is only here to pacify sio. It is NOT FATAL if this doesn't work.
961 * It shouldn't be here. There should probably be an APIC centric
962 * implementation in the apic driver code, if at all.
965 isa_irq_pending(void)
972 return ((irr2 << 8) | irr1);
979 add_physmap_entry(uint64_t base, uint64_t length, vm_paddr_t *physmap,
982 int i, insert_idx, physmap_idx;
984 physmap_idx = *physmap_idxp;
990 * Find insertion point while checking for overlap. Start off by
991 * assuming the new entry will be added to the end.
993 * NB: physmap_idx points to the next free slot.
995 insert_idx = physmap_idx;
996 for (i = 0; i <= physmap_idx; i += 2) {
997 if (base < physmap[i + 1]) {
998 if (base + length <= physmap[i]) {
1002 if (boothowto & RB_VERBOSE)
1004 "Overlapping memory regions, ignoring second region\n");
1009 /* See if we can prepend to the next entry. */
1010 if (insert_idx <= physmap_idx && base + length == physmap[insert_idx]) {
1011 physmap[insert_idx] = base;
1015 /* See if we can append to the previous entry. */
1016 if (insert_idx > 0 && base == physmap[insert_idx - 1]) {
1017 physmap[insert_idx - 1] += length;
1022 *physmap_idxp = physmap_idx;
1023 if (physmap_idx == PHYSMAP_SIZE) {
1025 "Too many segments in the physical address map, giving up\n");
1030 * Move the last 'N' entries down to make room for the new
1033 for (i = (physmap_idx - 2); i > insert_idx; i -= 2) {
1034 physmap[i] = physmap[i - 2];
1035 physmap[i + 1] = physmap[i - 1];
1038 /* Insert the new entry. */
1039 physmap[insert_idx] = base;
1040 physmap[insert_idx + 1] = base + length;
1045 bios_add_smap_entries(struct bios_smap *smapbase, u_int32_t smapsize,
1046 vm_paddr_t *physmap, int *physmap_idx)
1048 struct bios_smap *smap, *smapend;
1050 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
1052 for (smap = smapbase; smap < smapend; smap++) {
1053 if (boothowto & RB_VERBOSE)
1054 printf("SMAP type=%02x base=%016lx len=%016lx\n",
1055 smap->type, smap->base, smap->length);
1057 if (smap->type != SMAP_TYPE_MEMORY)
1060 if (!add_physmap_entry(smap->base, smap->length, physmap,
1067 add_efi_map_entries(struct efi_map_header *efihdr, vm_paddr_t *physmap,
1070 struct efi_md *map, *p;
1075 static const char *types[] = {
1081 "RuntimeServicesCode",
1082 "RuntimeServicesData",
1083 "ConventionalMemory",
1085 "ACPIReclaimMemory",
1088 "MemoryMappedIOPortSpace",
1094 * Memory map data provided by UEFI via the GetMemoryMap
1095 * Boot Services API.
1097 efisz = (sizeof(struct efi_map_header) + 0xf) & ~0xf;
1098 map = (struct efi_md *)((uint8_t *)efihdr + efisz);
1100 if (efihdr->descriptor_size == 0)
1102 ndesc = efihdr->memory_size / efihdr->descriptor_size;
1104 if (boothowto & RB_VERBOSE)
1105 printf("%23s %12s %12s %8s %4s\n",
1106 "Type", "Physical", "Virtual", "#Pages", "Attr");
1108 for (i = 0, p = map; i < ndesc; i++,
1109 p = efi_next_descriptor(p, efihdr->descriptor_size)) {
1110 if (boothowto & RB_VERBOSE) {
1111 if (p->md_type < nitems(types))
1112 type = types[p->md_type];
1115 printf("%23s %012lx %12p %08lx ", type, p->md_phys,
1116 p->md_virt, p->md_pages);
1117 if (p->md_attr & EFI_MD_ATTR_UC)
1119 if (p->md_attr & EFI_MD_ATTR_WC)
1121 if (p->md_attr & EFI_MD_ATTR_WT)
1123 if (p->md_attr & EFI_MD_ATTR_WB)
1125 if (p->md_attr & EFI_MD_ATTR_UCE)
1127 if (p->md_attr & EFI_MD_ATTR_WP)
1129 if (p->md_attr & EFI_MD_ATTR_RP)
1131 if (p->md_attr & EFI_MD_ATTR_XP)
1133 if (p->md_attr & EFI_MD_ATTR_NV)
1135 if (p->md_attr & EFI_MD_ATTR_MORE_RELIABLE)
1136 printf("MORE_RELIABLE ");
1137 if (p->md_attr & EFI_MD_ATTR_RO)
1139 if (p->md_attr & EFI_MD_ATTR_RT)
1144 switch (p->md_type) {
1145 case EFI_MD_TYPE_CODE:
1146 case EFI_MD_TYPE_DATA:
1147 case EFI_MD_TYPE_BS_CODE:
1148 case EFI_MD_TYPE_BS_DATA:
1149 case EFI_MD_TYPE_FREE:
1151 * We're allowed to use any entry with these types.
1158 if (!add_physmap_entry(p->md_phys, (p->md_pages * PAGE_SIZE),
1159 physmap, physmap_idx))
1164 static char bootmethod[16] = "";
1165 SYSCTL_STRING(_machdep, OID_AUTO, bootmethod, CTLFLAG_RD, bootmethod, 0,
1166 "System firmware boot method");
1169 native_parse_memmap(caddr_t kmdp, vm_paddr_t *physmap, int *physmap_idx)
1171 struct bios_smap *smap;
1172 struct efi_map_header *efihdr;
1176 * Memory map from INT 15:E820.
1178 * subr_module.c says:
1179 * "Consumer may safely assume that size value precedes data."
1180 * ie: an int32_t immediately precedes smap.
1183 efihdr = (struct efi_map_header *)preload_search_info(kmdp,
1184 MODINFO_METADATA | MODINFOMD_EFI_MAP);
1185 smap = (struct bios_smap *)preload_search_info(kmdp,
1186 MODINFO_METADATA | MODINFOMD_SMAP);
1187 if (efihdr == NULL && smap == NULL)
1188 panic("No BIOS smap or EFI map info from loader!");
1190 if (efihdr != NULL) {
1191 add_efi_map_entries(efihdr, physmap, physmap_idx);
1192 strlcpy(bootmethod, "UEFI", sizeof(bootmethod));
1194 size = *((u_int32_t *)smap - 1);
1195 bios_add_smap_entries(smap, size, physmap, physmap_idx);
1196 strlcpy(bootmethod, "BIOS", sizeof(bootmethod));
1200 #define PAGES_PER_GB (1024 * 1024 * 1024 / PAGE_SIZE)
1203 * Populate the (physmap) array with base/bound pairs describing the
1204 * available physical memory in the system, then test this memory and
1205 * build the phys_avail array describing the actually-available memory.
1207 * Total memory size may be set by the kernel environment variable
1208 * hw.physmem or the compile-time define MAXMEM.
1210 * XXX first should be vm_paddr_t.
1213 getmemsize(caddr_t kmdp, u_int64_t first)
1215 int i, physmap_idx, pa_indx, da_indx;
1216 vm_paddr_t pa, physmap[PHYSMAP_SIZE];
1217 u_long physmem_start, physmem_tunable, memtest;
1219 quad_t dcons_addr, dcons_size;
1222 bzero(physmap, sizeof(physmap));
1225 init_ops.parse_memmap(kmdp, physmap, &physmap_idx);
1229 * Find the 'base memory' segment for SMP
1232 for (i = 0; i <= physmap_idx; i += 2) {
1233 if (physmap[i] <= 0xA0000) {
1234 basemem = physmap[i + 1] / 1024;
1238 if (basemem == 0 || basemem > 640) {
1241 "Memory map doesn't contain a basemem segment, faking it");
1246 * Make hole for "AP -> long mode" bootstrap code. The
1247 * mp_bootaddress vector is only available when the kernel
1248 * is configured to support APs and APs for the system start
1249 * in 32bit mode (e.g. SMP bare metal).
1251 if (init_ops.mp_bootaddress) {
1252 if (physmap[1] >= 0x100000000)
1254 "Basemem segment is not suitable for AP bootstrap code!");
1255 physmap[1] = init_ops.mp_bootaddress(physmap[1] / 1024);
1259 * Maxmem isn't the "maximum memory", it's one larger than the
1260 * highest page of the physical address space. It should be
1261 * called something like "Maxphyspage". We may adjust this
1262 * based on ``hw.physmem'' and the results of the memory test.
1264 Maxmem = atop(physmap[physmap_idx + 1]);
1267 Maxmem = MAXMEM / 4;
1270 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
1271 Maxmem = atop(physmem_tunable);
1274 * The boot memory test is disabled by default, as it takes a
1275 * significant amount of time on large-memory systems, and is
1276 * unfriendly to virtual machines as it unnecessarily touches all
1279 * A general name is used as the code may be extended to support
1280 * additional tests beyond the current "page present" test.
1283 TUNABLE_ULONG_FETCH("hw.memtest.tests", &memtest);
1286 * Don't allow MAXMEM or hw.physmem to extend the amount of memory
1289 if (Maxmem > atop(physmap[physmap_idx + 1]))
1290 Maxmem = atop(physmap[physmap_idx + 1]);
1292 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1293 (boothowto & RB_VERBOSE))
1294 printf("Physical memory use set to %ldK\n", Maxmem * 4);
1296 /* call pmap initialization to make new kernel address space */
1297 pmap_bootstrap(&first);
1300 * Size up each available chunk of physical memory.
1302 * XXX Some BIOSes corrupt low 64KB between suspend and resume.
1303 * By default, mask off the first 16 pages unless we appear to be
1306 physmem_start = (vm_guest > VM_GUEST_NO ? 1 : 16) << PAGE_SHIFT;
1307 TUNABLE_ULONG_FETCH("hw.physmem.start", &physmem_start);
1308 if (physmap[0] < physmem_start) {
1309 if (physmem_start < PAGE_SIZE)
1310 physmap[0] = PAGE_SIZE;
1311 else if (physmem_start >= physmap[1])
1312 physmap[0] = round_page(physmap[1] - PAGE_SIZE);
1314 physmap[0] = round_page(physmem_start);
1318 phys_avail[pa_indx++] = physmap[0];
1319 phys_avail[pa_indx] = physmap[0];
1320 dump_avail[da_indx] = physmap[0];
1324 * Get dcons buffer address
1326 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
1327 getenv_quad("dcons.size", &dcons_size) == 0)
1331 * physmap is in bytes, so when converting to page boundaries,
1332 * round up the start address and round down the end address.
1336 printf("Testing system memory");
1337 for (i = 0; i <= physmap_idx; i += 2) {
1340 end = ptoa((vm_paddr_t)Maxmem);
1341 if (physmap[i + 1] < end)
1342 end = trunc_page(physmap[i + 1]);
1343 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1344 int tmp, page_bad, full;
1345 int *ptr = (int *)CADDR1;
1349 * block out kernel memory as not available.
1351 if (pa >= (vm_paddr_t)kernphys && pa < first)
1355 * block out dcons buffer
1358 && pa >= trunc_page(dcons_addr)
1359 && pa < dcons_addr + dcons_size)
1367 * Print a "." every GB to show we're making
1371 if ((page_counter % PAGES_PER_GB) == 0)
1375 * map page into kernel: valid, read/write,non-cacheable
1377 *pte = pa | PG_V | PG_RW | PG_NC_PWT | PG_NC_PCD;
1382 * Test for alternating 1's and 0's
1384 *(volatile int *)ptr = 0xaaaaaaaa;
1385 if (*(volatile int *)ptr != 0xaaaaaaaa)
1388 * Test for alternating 0's and 1's
1390 *(volatile int *)ptr = 0x55555555;
1391 if (*(volatile int *)ptr != 0x55555555)
1396 *(volatile int *)ptr = 0xffffffff;
1397 if (*(volatile int *)ptr != 0xffffffff)
1402 *(volatile int *)ptr = 0x0;
1403 if (*(volatile int *)ptr != 0x0)
1406 * Restore original value.
1412 * Adjust array of valid/good pages.
1414 if (page_bad == TRUE)
1417 * If this good page is a continuation of the
1418 * previous set of good pages, then just increase
1419 * the end pointer. Otherwise start a new chunk.
1420 * Note that "end" points one higher than end,
1421 * making the range >= start and < end.
1422 * If we're also doing a speculative memory
1423 * test and we at or past the end, bump up Maxmem
1424 * so that we keep going. The first bad page
1425 * will terminate the loop.
1427 if (phys_avail[pa_indx] == pa) {
1428 phys_avail[pa_indx] += PAGE_SIZE;
1431 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1433 "Too many holes in the physical address space, giving up\n");
1438 phys_avail[pa_indx++] = pa; /* start */
1439 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1443 if (dump_avail[da_indx] == pa) {
1444 dump_avail[da_indx] += PAGE_SIZE;
1447 if (da_indx == DUMP_AVAIL_ARRAY_END) {
1451 dump_avail[da_indx++] = pa; /* start */
1452 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
1466 * The last chunk must contain at least one page plus the message
1467 * buffer to avoid complicating other code (message buffer address
1468 * calculation, etc.).
1470 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1471 round_page(msgbufsize) >= phys_avail[pa_indx]) {
1472 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1473 phys_avail[pa_indx--] = 0;
1474 phys_avail[pa_indx--] = 0;
1477 Maxmem = atop(phys_avail[pa_indx]);
1479 /* Trim off space for the message buffer. */
1480 phys_avail[pa_indx] -= round_page(msgbufsize);
1482 /* Map the message buffer. */
1483 msgbufp = (struct msgbuf *)PHYS_TO_DMAP(phys_avail[pa_indx]);
1487 native_parse_preload_data(u_int64_t modulep)
1492 vm_offset_t ksym_start;
1493 vm_offset_t ksym_end;
1496 preload_metadata = (caddr_t)(uintptr_t)(modulep + KERNBASE);
1497 preload_bootstrap_relocate(KERNBASE);
1498 kmdp = preload_search_by_type("elf kernel");
1500 kmdp = preload_search_by_type("elf64 kernel");
1501 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
1502 envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *);
1505 init_static_kenv(envp, 0);
1507 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
1508 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
1509 db_fetch_ksymtab(ksym_start, ksym_end);
1511 efi_systbl_phys = MD_FETCH(kmdp, MODINFOMD_FW_HANDLE, vm_paddr_t);
1517 amd64_kdb_init(void)
1521 if (boothowto & RB_KDB)
1522 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
1526 /* Set up the fast syscall stuff */
1528 amd64_conf_fast_syscall(void)
1532 msr = rdmsr(MSR_EFER) | EFER_SCE;
1533 wrmsr(MSR_EFER, msr);
1534 wrmsr(MSR_LSTAR, pti ? (u_int64_t)IDTVEC(fast_syscall_pti) :
1535 (u_int64_t)IDTVEC(fast_syscall));
1536 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32));
1537 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) |
1538 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48);
1539 wrmsr(MSR_STAR, msr);
1540 wrmsr(MSR_SF_MASK, PSL_NT | PSL_T | PSL_I | PSL_C | PSL_D);
1544 hammer_time(u_int64_t modulep, u_int64_t physfree)
1549 struct nmi_pcpu *np;
1550 struct xstate_hdr *xhdr;
1556 TSRAW(&thread0, TS_ENTER, __func__, NULL);
1559 * This may be done better later if it gets more high level
1560 * components in it. If so just link td->td_proc here.
1562 proc_linkup0(&proc0, &thread0);
1564 kmdp = init_ops.parse_preload_data(modulep);
1567 identify_hypervisor();
1569 /* Init basic tunables, hz etc */
1572 thread0.td_kstack = physfree + KERNBASE;
1573 thread0.td_kstack_pages = kstack_pages;
1574 kstack0_sz = thread0.td_kstack_pages * PAGE_SIZE;
1575 bzero((void *)thread0.td_kstack, kstack0_sz);
1576 physfree += kstack0_sz;
1579 * make gdt memory segments
1581 for (x = 0; x < NGDT; x++) {
1582 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1) &&
1583 x != GUSERLDT_SEL && x != (GUSERLDT_SEL) + 1)
1584 ssdtosd(&gdt_segs[x], &gdt[x]);
1586 gdt_segs[GPROC0_SEL].ssd_base = (uintptr_t)&common_tss[0];
1587 ssdtosyssd(&gdt_segs[GPROC0_SEL],
1588 (struct system_segment_descriptor *)&gdt[GPROC0_SEL]);
1590 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1591 r_gdt.rd_base = (long) gdt;
1595 wrmsr(MSR_FSBASE, 0); /* User value */
1596 wrmsr(MSR_GSBASE, (u_int64_t)pc);
1597 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */
1599 pcpu_init(pc, 0, sizeof(struct pcpu));
1600 dpcpu_init((void *)(physfree + KERNBASE), 0);
1601 physfree += DPCPU_SIZE;
1602 PCPU_SET(prvspace, pc);
1603 PCPU_SET(curthread, &thread0);
1604 /* Non-late cninit() and printf() can be moved up to here. */
1605 PCPU_SET(tssp, &common_tss[0]);
1606 PCPU_SET(commontssp, &common_tss[0]);
1607 PCPU_SET(tss, (struct system_segment_descriptor *)&gdt[GPROC0_SEL]);
1608 PCPU_SET(ldt, (struct system_segment_descriptor *)&gdt[GUSERLDT_SEL]);
1609 PCPU_SET(fs32p, &gdt[GUFS32_SEL]);
1610 PCPU_SET(gs32p, &gdt[GUGS32_SEL]);
1613 * Initialize mutexes.
1615 * icu_lock: in order to allow an interrupt to occur in a critical
1616 * section, to set pcpu->ipending (etc...) properly, we
1617 * must be able to get the icu lock, so it can't be
1621 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS);
1622 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_DEF);
1625 pti = pti_get_default();
1626 TUNABLE_INT_FETCH("vm.pmap.pti", &pti);
1628 for (x = 0; x < NIDT; x++)
1629 setidt(x, pti ? &IDTVEC(rsvd_pti) : &IDTVEC(rsvd), SDT_SYSIGT,
1631 setidt(IDT_DE, pti ? &IDTVEC(div_pti) : &IDTVEC(div), SDT_SYSIGT,
1633 setidt(IDT_DB, pti ? &IDTVEC(dbg_pti) : &IDTVEC(dbg), SDT_SYSIGT,
1635 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 2);
1636 setidt(IDT_BP, pti ? &IDTVEC(bpt_pti) : &IDTVEC(bpt), SDT_SYSIGT,
1638 setidt(IDT_OF, pti ? &IDTVEC(ofl_pti) : &IDTVEC(ofl), SDT_SYSIGT,
1640 setidt(IDT_BR, pti ? &IDTVEC(bnd_pti) : &IDTVEC(bnd), SDT_SYSIGT,
1642 setidt(IDT_UD, pti ? &IDTVEC(ill_pti) : &IDTVEC(ill), SDT_SYSIGT,
1644 setidt(IDT_NM, pti ? &IDTVEC(dna_pti) : &IDTVEC(dna), SDT_SYSIGT,
1646 setidt(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1);
1647 setidt(IDT_FPUGP, pti ? &IDTVEC(fpusegm_pti) : &IDTVEC(fpusegm),
1648 SDT_SYSIGT, SEL_KPL, 0);
1649 setidt(IDT_TS, pti ? &IDTVEC(tss_pti) : &IDTVEC(tss), SDT_SYSIGT,
1651 setidt(IDT_NP, pti ? &IDTVEC(missing_pti) : &IDTVEC(missing),
1652 SDT_SYSIGT, SEL_KPL, 0);
1653 setidt(IDT_SS, pti ? &IDTVEC(stk_pti) : &IDTVEC(stk), SDT_SYSIGT,
1655 setidt(IDT_GP, pti ? &IDTVEC(prot_pti) : &IDTVEC(prot), SDT_SYSIGT,
1657 setidt(IDT_PF, pti ? &IDTVEC(page_pti) : &IDTVEC(page), SDT_SYSIGT,
1659 setidt(IDT_MF, pti ? &IDTVEC(fpu_pti) : &IDTVEC(fpu), SDT_SYSIGT,
1661 setidt(IDT_AC, pti ? &IDTVEC(align_pti) : &IDTVEC(align), SDT_SYSIGT,
1663 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 3);
1664 setidt(IDT_XF, pti ? &IDTVEC(xmm_pti) : &IDTVEC(xmm), SDT_SYSIGT,
1666 #ifdef KDTRACE_HOOKS
1667 setidt(IDT_DTRACE_RET, pti ? &IDTVEC(dtrace_ret_pti) :
1668 &IDTVEC(dtrace_ret), SDT_SYSIGT, SEL_UPL, 0);
1671 setidt(IDT_EVTCHN, pti ? &IDTVEC(xen_intr_upcall_pti) :
1672 &IDTVEC(xen_intr_upcall), SDT_SYSIGT, SEL_KPL, 0);
1674 r_idt.rd_limit = sizeof(idt0) - 1;
1675 r_idt.rd_base = (long) idt;
1679 * Initialize the clock before the console so that console
1680 * initialization can use DELAY().
1685 * Use vt(4) by default for UEFI boot (during the sc(4)/vt(4)
1687 * Once bootblocks have updated, we can test directly for
1688 * efi_systbl != NULL here...
1690 if (preload_search_info(kmdp, MODINFO_METADATA | MODINFOMD_EFI_MAP)
1692 vty_set_preferred(VTY_VT);
1694 finishidentcpu(); /* Final stage of CPU initialization */
1695 initializecpu(); /* Initialize CPU registers */
1696 initializecpucache();
1698 /* doublefault stack space, runs on ist1 */
1699 common_tss[0].tss_ist1 = (long)&dblfault_stack[sizeof(dblfault_stack)];
1702 * NMI stack, runs on ist2. The pcpu pointer is stored just
1703 * above the start of the ist2 stack.
1705 np = ((struct nmi_pcpu *) &nmi0_stack[sizeof(nmi0_stack)]) - 1;
1706 np->np_pcpu = (register_t) pc;
1707 common_tss[0].tss_ist2 = (long) np;
1710 * MC# stack, runs on ist3. The pcpu pointer is stored just
1711 * above the start of the ist3 stack.
1713 np = ((struct nmi_pcpu *) &mce0_stack[sizeof(mce0_stack)]) - 1;
1714 np->np_pcpu = (register_t) pc;
1715 common_tss[0].tss_ist3 = (long) np;
1717 /* Set the IO permission bitmap (empty due to tss seg limit) */
1718 common_tss[0].tss_iobase = sizeof(struct amd64tss) + IOPERM_BITMAP_SIZE;
1720 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
1723 amd64_conf_fast_syscall();
1726 * Temporary forge some valid pointer to PCB, for exception
1727 * handlers. It is reinitialized properly below after FPU is
1728 * set up. Also set up td_critnest to short-cut the page
1731 cpu_max_ext_state_size = sizeof(struct savefpu);
1732 thread0.td_pcb = get_pcb_td(&thread0);
1733 thread0.td_critnest = 1;
1736 * The console and kdb should be initialized even earlier than here,
1737 * but some console drivers don't work until after getmemsize().
1738 * Default to late console initialization to support these drivers.
1739 * This loses mainly printf()s in getmemsize() and early debugging.
1742 TUNABLE_INT_FETCH("debug.late_console", &late_console);
1743 if (!late_console) {
1748 getmemsize(kmdp, physfree);
1749 init_param2(physmem);
1751 /* now running on new page tables, configured,and u/iom is accessible */
1761 /* Reset and mask the atpics and leave them shut down. */
1765 * Point the ICU spurious interrupt vectors at the APIC spurious
1766 * interrupt handler.
1768 setidt(IDT_IO_INTS + 7, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0);
1769 setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0);
1772 #error "have you forgotten the isa device?";
1778 msgbufinit(msgbufp, msgbufsize);
1782 * Set up thread0 pcb after fpuinit calculated pcb + fpu save
1783 * area size. Zero out the extended state header in fpu save
1786 thread0.td_pcb = get_pcb_td(&thread0);
1787 thread0.td_pcb->pcb_save = get_pcb_user_save_td(&thread0);
1788 bzero(get_pcb_user_save_td(&thread0), cpu_max_ext_state_size);
1790 xhdr = (struct xstate_hdr *)(get_pcb_user_save_td(&thread0) +
1792 xhdr->xstate_bv = xsave_mask;
1794 /* make an initial tss so cpu can get interrupt stack on syscall! */
1795 rsp0 = (vm_offset_t)thread0.td_pcb;
1796 /* Ensure the stack is aligned to 16 bytes */
1798 common_tss[0].tss_rsp0 = pti ? ((vm_offset_t)PCPU_PTR(pti_stack) +
1799 PC_PTI_STACK_SZ * sizeof(uint64_t)) & ~0xful : rsp0;
1800 PCPU_SET(rsp0, rsp0);
1801 PCPU_SET(curpcb, thread0.td_pcb);
1803 /* transfer to user mode */
1805 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
1806 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
1807 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL);
1808 _ufssel = GSEL(GUFS32_SEL, SEL_UPL);
1809 _ugssel = GSEL(GUGS32_SEL, SEL_UPL);
1815 /* setup proc 0's pcb */
1816 thread0.td_pcb->pcb_flags = 0;
1817 thread0.td_frame = &proc0_tf;
1819 env = kern_getenv("kernelname");
1821 strlcpy(kernelname, env, sizeof(kernelname));
1828 thread0.td_critnest = 0;
1830 TUNABLE_INT_FETCH("hw.ibrs_disable", &hw_ibrs_disable);
1834 /* Location of kernel stack for locore */
1835 return ((u_int64_t)thread0.td_pcb);
1839 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
1842 pcpu->pc_acpi_id = 0xffffffff;
1846 smap_sysctl_handler(SYSCTL_HANDLER_ARGS)
1848 struct bios_smap *smapbase;
1849 struct bios_smap_xattr smap;
1852 int count, error, i;
1854 /* Retrieve the system memory map from the loader. */
1855 kmdp = preload_search_by_type("elf kernel");
1857 kmdp = preload_search_by_type("elf64 kernel");
1858 smapbase = (struct bios_smap *)preload_search_info(kmdp,
1859 MODINFO_METADATA | MODINFOMD_SMAP);
1860 if (smapbase == NULL)
1862 smapattr = (uint32_t *)preload_search_info(kmdp,
1863 MODINFO_METADATA | MODINFOMD_SMAP_XATTR);
1864 count = *((uint32_t *)smapbase - 1) / sizeof(*smapbase);
1866 for (i = 0; i < count; i++) {
1867 smap.base = smapbase[i].base;
1868 smap.length = smapbase[i].length;
1869 smap.type = smapbase[i].type;
1870 if (smapattr != NULL)
1871 smap.xattr = smapattr[i];
1874 error = SYSCTL_OUT(req, &smap, sizeof(smap));
1878 SYSCTL_PROC(_machdep, OID_AUTO, smap, CTLTYPE_OPAQUE|CTLFLAG_RD, NULL, 0,
1879 smap_sysctl_handler, "S,bios_smap_xattr", "Raw BIOS SMAP data");
1882 efi_map_sysctl_handler(SYSCTL_HANDLER_ARGS)
1884 struct efi_map_header *efihdr;
1888 kmdp = preload_search_by_type("elf kernel");
1890 kmdp = preload_search_by_type("elf64 kernel");
1891 efihdr = (struct efi_map_header *)preload_search_info(kmdp,
1892 MODINFO_METADATA | MODINFOMD_EFI_MAP);
1895 efisize = *((uint32_t *)efihdr - 1);
1896 return (SYSCTL_OUT(req, efihdr, efisize));
1898 SYSCTL_PROC(_machdep, OID_AUTO, efi_map, CTLTYPE_OPAQUE|CTLFLAG_RD, NULL, 0,
1899 efi_map_sysctl_handler, "S,efi_map_header", "Raw EFI Memory Map");
1902 spinlock_enter(void)
1908 if (td->td_md.md_spinlock_count == 0) {
1909 flags = intr_disable();
1910 td->td_md.md_spinlock_count = 1;
1911 td->td_md.md_saved_flags = flags;
1914 td->td_md.md_spinlock_count++;
1924 flags = td->td_md.md_saved_flags;
1925 td->td_md.md_spinlock_count--;
1926 if (td->td_md.md_spinlock_count == 0) {
1928 intr_restore(flags);
1933 * Construct a PCB from a trapframe. This is called from kdb_trap() where
1934 * we want to start a backtrace from the function that caused us to enter
1935 * the debugger. We have the context in the trapframe, but base the trace
1936 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
1937 * enough for a backtrace.
1940 makectx(struct trapframe *tf, struct pcb *pcb)
1943 pcb->pcb_r12 = tf->tf_r12;
1944 pcb->pcb_r13 = tf->tf_r13;
1945 pcb->pcb_r14 = tf->tf_r14;
1946 pcb->pcb_r15 = tf->tf_r15;
1947 pcb->pcb_rbp = tf->tf_rbp;
1948 pcb->pcb_rbx = tf->tf_rbx;
1949 pcb->pcb_rip = tf->tf_rip;
1950 pcb->pcb_rsp = tf->tf_rsp;
1954 ptrace_set_pc(struct thread *td, unsigned long addr)
1957 td->td_frame->tf_rip = addr;
1958 set_pcb_flags(td->td_pcb, PCB_FULL_IRET);
1963 ptrace_single_step(struct thread *td)
1965 td->td_frame->tf_rflags |= PSL_T;
1970 ptrace_clear_single_step(struct thread *td)
1972 td->td_frame->tf_rflags &= ~PSL_T;
1977 fill_regs(struct thread *td, struct reg *regs)
1979 struct trapframe *tp;
1982 return (fill_frame_regs(tp, regs));
1986 fill_frame_regs(struct trapframe *tp, struct reg *regs)
1988 regs->r_r15 = tp->tf_r15;
1989 regs->r_r14 = tp->tf_r14;
1990 regs->r_r13 = tp->tf_r13;
1991 regs->r_r12 = tp->tf_r12;
1992 regs->r_r11 = tp->tf_r11;
1993 regs->r_r10 = tp->tf_r10;
1994 regs->r_r9 = tp->tf_r9;
1995 regs->r_r8 = tp->tf_r8;
1996 regs->r_rdi = tp->tf_rdi;
1997 regs->r_rsi = tp->tf_rsi;
1998 regs->r_rbp = tp->tf_rbp;
1999 regs->r_rbx = tp->tf_rbx;
2000 regs->r_rdx = tp->tf_rdx;
2001 regs->r_rcx = tp->tf_rcx;
2002 regs->r_rax = tp->tf_rax;
2003 regs->r_rip = tp->tf_rip;
2004 regs->r_cs = tp->tf_cs;
2005 regs->r_rflags = tp->tf_rflags;
2006 regs->r_rsp = tp->tf_rsp;
2007 regs->r_ss = tp->tf_ss;
2008 if (tp->tf_flags & TF_HASSEGS) {
2009 regs->r_ds = tp->tf_ds;
2010 regs->r_es = tp->tf_es;
2011 regs->r_fs = tp->tf_fs;
2012 regs->r_gs = tp->tf_gs;
2023 set_regs(struct thread *td, struct reg *regs)
2025 struct trapframe *tp;
2029 rflags = regs->r_rflags & 0xffffffff;
2030 if (!EFL_SECURE(rflags, tp->tf_rflags) || !CS_SECURE(regs->r_cs))
2032 tp->tf_r15 = regs->r_r15;
2033 tp->tf_r14 = regs->r_r14;
2034 tp->tf_r13 = regs->r_r13;
2035 tp->tf_r12 = regs->r_r12;
2036 tp->tf_r11 = regs->r_r11;
2037 tp->tf_r10 = regs->r_r10;
2038 tp->tf_r9 = regs->r_r9;
2039 tp->tf_r8 = regs->r_r8;
2040 tp->tf_rdi = regs->r_rdi;
2041 tp->tf_rsi = regs->r_rsi;
2042 tp->tf_rbp = regs->r_rbp;
2043 tp->tf_rbx = regs->r_rbx;
2044 tp->tf_rdx = regs->r_rdx;
2045 tp->tf_rcx = regs->r_rcx;
2046 tp->tf_rax = regs->r_rax;
2047 tp->tf_rip = regs->r_rip;
2048 tp->tf_cs = regs->r_cs;
2049 tp->tf_rflags = rflags;
2050 tp->tf_rsp = regs->r_rsp;
2051 tp->tf_ss = regs->r_ss;
2052 if (0) { /* XXXKIB */
2053 tp->tf_ds = regs->r_ds;
2054 tp->tf_es = regs->r_es;
2055 tp->tf_fs = regs->r_fs;
2056 tp->tf_gs = regs->r_gs;
2057 tp->tf_flags = TF_HASSEGS;
2059 set_pcb_flags(td->td_pcb, PCB_FULL_IRET);
2063 /* XXX check all this stuff! */
2064 /* externalize from sv_xmm */
2066 fill_fpregs_xmm(struct savefpu *sv_xmm, struct fpreg *fpregs)
2068 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env;
2069 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2073 bzero(fpregs, sizeof(*fpregs));
2075 /* FPU control/status */
2076 penv_fpreg->en_cw = penv_xmm->en_cw;
2077 penv_fpreg->en_sw = penv_xmm->en_sw;
2078 penv_fpreg->en_tw = penv_xmm->en_tw;
2079 penv_fpreg->en_opcode = penv_xmm->en_opcode;
2080 penv_fpreg->en_rip = penv_xmm->en_rip;
2081 penv_fpreg->en_rdp = penv_xmm->en_rdp;
2082 penv_fpreg->en_mxcsr = penv_xmm->en_mxcsr;
2083 penv_fpreg->en_mxcsr_mask = penv_xmm->en_mxcsr_mask;
2086 for (i = 0; i < 8; ++i)
2087 bcopy(sv_xmm->sv_fp[i].fp_acc.fp_bytes, fpregs->fpr_acc[i], 10);
2090 for (i = 0; i < 16; ++i)
2091 bcopy(sv_xmm->sv_xmm[i].xmm_bytes, fpregs->fpr_xacc[i], 16);
2094 /* internalize from fpregs into sv_xmm */
2096 set_fpregs_xmm(struct fpreg *fpregs, struct savefpu *sv_xmm)
2098 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2099 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env;
2103 /* FPU control/status */
2104 penv_xmm->en_cw = penv_fpreg->en_cw;
2105 penv_xmm->en_sw = penv_fpreg->en_sw;
2106 penv_xmm->en_tw = penv_fpreg->en_tw;
2107 penv_xmm->en_opcode = penv_fpreg->en_opcode;
2108 penv_xmm->en_rip = penv_fpreg->en_rip;
2109 penv_xmm->en_rdp = penv_fpreg->en_rdp;
2110 penv_xmm->en_mxcsr = penv_fpreg->en_mxcsr;
2111 penv_xmm->en_mxcsr_mask = penv_fpreg->en_mxcsr_mask & cpu_mxcsr_mask;
2114 for (i = 0; i < 8; ++i)
2115 bcopy(fpregs->fpr_acc[i], sv_xmm->sv_fp[i].fp_acc.fp_bytes, 10);
2118 for (i = 0; i < 16; ++i)
2119 bcopy(fpregs->fpr_xacc[i], sv_xmm->sv_xmm[i].xmm_bytes, 16);
2122 /* externalize from td->pcb */
2124 fill_fpregs(struct thread *td, struct fpreg *fpregs)
2127 KASSERT(td == curthread || TD_IS_SUSPENDED(td) ||
2128 P_SHOULDSTOP(td->td_proc),
2129 ("not suspended thread %p", td));
2131 fill_fpregs_xmm(get_pcb_user_save_td(td), fpregs);
2135 /* internalize to td->pcb */
2137 set_fpregs(struct thread *td, struct fpreg *fpregs)
2140 set_fpregs_xmm(fpregs, get_pcb_user_save_td(td));
2146 * Get machine context.
2149 get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
2152 struct trapframe *tp;
2156 PROC_LOCK(curthread->td_proc);
2157 mcp->mc_onstack = sigonstack(tp->tf_rsp);
2158 PROC_UNLOCK(curthread->td_proc);
2159 mcp->mc_r15 = tp->tf_r15;
2160 mcp->mc_r14 = tp->tf_r14;
2161 mcp->mc_r13 = tp->tf_r13;
2162 mcp->mc_r12 = tp->tf_r12;
2163 mcp->mc_r11 = tp->tf_r11;
2164 mcp->mc_r10 = tp->tf_r10;
2165 mcp->mc_r9 = tp->tf_r9;
2166 mcp->mc_r8 = tp->tf_r8;
2167 mcp->mc_rdi = tp->tf_rdi;
2168 mcp->mc_rsi = tp->tf_rsi;
2169 mcp->mc_rbp = tp->tf_rbp;
2170 mcp->mc_rbx = tp->tf_rbx;
2171 mcp->mc_rcx = tp->tf_rcx;
2172 mcp->mc_rflags = tp->tf_rflags;
2173 if (flags & GET_MC_CLEAR_RET) {
2176 mcp->mc_rflags &= ~PSL_C;
2178 mcp->mc_rax = tp->tf_rax;
2179 mcp->mc_rdx = tp->tf_rdx;
2181 mcp->mc_rip = tp->tf_rip;
2182 mcp->mc_cs = tp->tf_cs;
2183 mcp->mc_rsp = tp->tf_rsp;
2184 mcp->mc_ss = tp->tf_ss;
2185 mcp->mc_ds = tp->tf_ds;
2186 mcp->mc_es = tp->tf_es;
2187 mcp->mc_fs = tp->tf_fs;
2188 mcp->mc_gs = tp->tf_gs;
2189 mcp->mc_flags = tp->tf_flags;
2190 mcp->mc_len = sizeof(*mcp);
2191 get_fpcontext(td, mcp, NULL, 0);
2192 update_pcb_bases(pcb);
2193 mcp->mc_fsbase = pcb->pcb_fsbase;
2194 mcp->mc_gsbase = pcb->pcb_gsbase;
2195 mcp->mc_xfpustate = 0;
2196 mcp->mc_xfpustate_len = 0;
2197 bzero(mcp->mc_spare, sizeof(mcp->mc_spare));
2202 * Set machine context.
2204 * However, we don't set any but the user modifiable flags, and we won't
2205 * touch the cs selector.
2208 set_mcontext(struct thread *td, mcontext_t *mcp)
2211 struct trapframe *tp;
2218 if (mcp->mc_len != sizeof(*mcp) ||
2219 (mcp->mc_flags & ~_MC_FLAG_MASK) != 0)
2221 rflags = (mcp->mc_rflags & PSL_USERCHANGE) |
2222 (tp->tf_rflags & ~PSL_USERCHANGE);
2223 if (mcp->mc_flags & _MC_HASFPXSTATE) {
2224 if (mcp->mc_xfpustate_len > cpu_max_ext_state_size -
2225 sizeof(struct savefpu))
2227 xfpustate = __builtin_alloca(mcp->mc_xfpustate_len);
2228 ret = copyin((void *)mcp->mc_xfpustate, xfpustate,
2229 mcp->mc_xfpustate_len);
2234 ret = set_fpcontext(td, mcp, xfpustate, mcp->mc_xfpustate_len);
2237 tp->tf_r15 = mcp->mc_r15;
2238 tp->tf_r14 = mcp->mc_r14;
2239 tp->tf_r13 = mcp->mc_r13;
2240 tp->tf_r12 = mcp->mc_r12;
2241 tp->tf_r11 = mcp->mc_r11;
2242 tp->tf_r10 = mcp->mc_r10;
2243 tp->tf_r9 = mcp->mc_r9;
2244 tp->tf_r8 = mcp->mc_r8;
2245 tp->tf_rdi = mcp->mc_rdi;
2246 tp->tf_rsi = mcp->mc_rsi;
2247 tp->tf_rbp = mcp->mc_rbp;
2248 tp->tf_rbx = mcp->mc_rbx;
2249 tp->tf_rdx = mcp->mc_rdx;
2250 tp->tf_rcx = mcp->mc_rcx;
2251 tp->tf_rax = mcp->mc_rax;
2252 tp->tf_rip = mcp->mc_rip;
2253 tp->tf_rflags = rflags;
2254 tp->tf_rsp = mcp->mc_rsp;
2255 tp->tf_ss = mcp->mc_ss;
2256 tp->tf_flags = mcp->mc_flags;
2257 if (tp->tf_flags & TF_HASSEGS) {
2258 tp->tf_ds = mcp->mc_ds;
2259 tp->tf_es = mcp->mc_es;
2260 tp->tf_fs = mcp->mc_fs;
2261 tp->tf_gs = mcp->mc_gs;
2263 set_pcb_flags(pcb, PCB_FULL_IRET);
2264 if (mcp->mc_flags & _MC_HASBASES) {
2265 pcb->pcb_fsbase = mcp->mc_fsbase;
2266 pcb->pcb_gsbase = mcp->mc_gsbase;
2272 get_fpcontext(struct thread *td, mcontext_t *mcp, char *xfpusave,
2273 size_t xfpusave_len)
2275 size_t max_len, len;
2277 mcp->mc_ownedfp = fpugetregs(td);
2278 bcopy(get_pcb_user_save_td(td), &mcp->mc_fpstate[0],
2279 sizeof(mcp->mc_fpstate));
2280 mcp->mc_fpformat = fpuformat();
2281 if (!use_xsave || xfpusave_len == 0)
2283 max_len = cpu_max_ext_state_size - sizeof(struct savefpu);
2285 if (len > max_len) {
2287 bzero(xfpusave + max_len, len - max_len);
2289 mcp->mc_flags |= _MC_HASFPXSTATE;
2290 mcp->mc_xfpustate_len = len;
2291 bcopy(get_pcb_user_save_td(td) + 1, xfpusave, len);
2295 set_fpcontext(struct thread *td, mcontext_t *mcp, char *xfpustate,
2296 size_t xfpustate_len)
2300 if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
2302 else if (mcp->mc_fpformat != _MC_FPFMT_XMM)
2304 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) {
2305 /* We don't care what state is left in the FPU or PCB. */
2308 } else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
2309 mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
2310 error = fpusetregs(td, (struct savefpu *)&mcp->mc_fpstate,
2311 xfpustate, xfpustate_len);
2318 fpstate_drop(struct thread *td)
2321 KASSERT(PCB_USER_FPU(td->td_pcb), ("fpstate_drop: kernel-owned fpu"));
2323 if (PCPU_GET(fpcurthread) == td)
2326 * XXX force a full drop of the fpu. The above only drops it if we
2329 * XXX I don't much like fpugetuserregs()'s semantics of doing a full
2330 * drop. Dropping only to the pcb matches fnsave's behaviour.
2331 * We only need to drop to !PCB_INITDONE in sendsig(). But
2332 * sendsig() is the only caller of fpugetuserregs()... perhaps we just
2333 * have too many layers.
2335 clear_pcb_flags(curthread->td_pcb,
2336 PCB_FPUINITDONE | PCB_USERFPUINITDONE);
2341 fill_dbregs(struct thread *td, struct dbreg *dbregs)
2346 dbregs->dr[0] = rdr0();
2347 dbregs->dr[1] = rdr1();
2348 dbregs->dr[2] = rdr2();
2349 dbregs->dr[3] = rdr3();
2350 dbregs->dr[6] = rdr6();
2351 dbregs->dr[7] = rdr7();
2354 dbregs->dr[0] = pcb->pcb_dr0;
2355 dbregs->dr[1] = pcb->pcb_dr1;
2356 dbregs->dr[2] = pcb->pcb_dr2;
2357 dbregs->dr[3] = pcb->pcb_dr3;
2358 dbregs->dr[6] = pcb->pcb_dr6;
2359 dbregs->dr[7] = pcb->pcb_dr7;
2375 set_dbregs(struct thread *td, struct dbreg *dbregs)
2381 load_dr0(dbregs->dr[0]);
2382 load_dr1(dbregs->dr[1]);
2383 load_dr2(dbregs->dr[2]);
2384 load_dr3(dbregs->dr[3]);
2385 load_dr6(dbregs->dr[6]);
2386 load_dr7(dbregs->dr[7]);
2389 * Don't let an illegal value for dr7 get set. Specifically,
2390 * check for undefined settings. Setting these bit patterns
2391 * result in undefined behaviour and can lead to an unexpected
2392 * TRCTRAP or a general protection fault right here.
2393 * Upper bits of dr6 and dr7 must not be set
2395 for (i = 0; i < 4; i++) {
2396 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02)
2398 if (td->td_frame->tf_cs == _ucode32sel &&
2399 DBREG_DR7_LEN(dbregs->dr[7], i) == DBREG_DR7_LEN_8)
2402 if ((dbregs->dr[6] & 0xffffffff00000000ul) != 0 ||
2403 (dbregs->dr[7] & 0xffffffff00000000ul) != 0)
2409 * Don't let a process set a breakpoint that is not within the
2410 * process's address space. If a process could do this, it
2411 * could halt the system by setting a breakpoint in the kernel
2412 * (if ddb was enabled). Thus, we need to check to make sure
2413 * that no breakpoints are being enabled for addresses outside
2414 * process's address space.
2416 * XXX - what about when the watched area of the user's
2417 * address space is written into from within the kernel
2418 * ... wouldn't that still cause a breakpoint to be generated
2419 * from within kernel mode?
2422 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) {
2423 /* dr0 is enabled */
2424 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS)
2427 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) {
2428 /* dr1 is enabled */
2429 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS)
2432 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) {
2433 /* dr2 is enabled */
2434 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS)
2437 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) {
2438 /* dr3 is enabled */
2439 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS)
2443 pcb->pcb_dr0 = dbregs->dr[0];
2444 pcb->pcb_dr1 = dbregs->dr[1];
2445 pcb->pcb_dr2 = dbregs->dr[2];
2446 pcb->pcb_dr3 = dbregs->dr[3];
2447 pcb->pcb_dr6 = dbregs->dr[6];
2448 pcb->pcb_dr7 = dbregs->dr[7];
2450 set_pcb_flags(pcb, PCB_DBREGS);
2460 load_dr7(0); /* Turn off the control bits first */
2469 * Return > 0 if a hardware breakpoint has been hit, and the
2470 * breakpoint was in user space. Return 0, otherwise.
2473 user_dbreg_trap(void)
2475 u_int64_t dr7, dr6; /* debug registers dr6 and dr7 */
2476 u_int64_t bp; /* breakpoint bits extracted from dr6 */
2477 int nbp; /* number of breakpoints that triggered */
2478 caddr_t addr[4]; /* breakpoint addresses */
2482 if ((dr7 & 0x000000ff) == 0) {
2484 * all GE and LE bits in the dr7 register are zero,
2485 * thus the trap couldn't have been caused by the
2486 * hardware debug registers
2493 bp = dr6 & 0x0000000f;
2497 * None of the breakpoint bits are set meaning this
2498 * trap was not caused by any of the debug registers
2504 * at least one of the breakpoints were hit, check to see
2505 * which ones and if any of them are user space addresses
2509 addr[nbp++] = (caddr_t)rdr0();
2512 addr[nbp++] = (caddr_t)rdr1();
2515 addr[nbp++] = (caddr_t)rdr2();
2518 addr[nbp++] = (caddr_t)rdr3();
2521 for (i = 0; i < nbp; i++) {
2522 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) {
2524 * addr[i] is in user space
2531 * None of the breakpoints are in user space.
2537 * The pcb_flags is only modified by current thread, or by other threads
2538 * when current thread is stopped. However, current thread may change it
2539 * from the interrupt context in cpu_switch(), or in the trap handler.
2540 * When we read-modify-write pcb_flags from C sources, compiler may generate
2541 * code that is not atomic regarding the interrupt handler. If a trap or
2542 * interrupt happens and any flag is modified from the handler, it can be
2543 * clobbered with the cached value later. Therefore, we implement setting
2544 * and clearing flags with single-instruction functions, which do not race
2545 * with possible modification of the flags from the trap or interrupt context,
2546 * because traps and interrupts are executed only on instruction boundary.
2549 set_pcb_flags_raw(struct pcb *pcb, const u_int flags)
2552 __asm __volatile("orl %1,%0"
2553 : "=m" (pcb->pcb_flags) : "ir" (flags), "m" (pcb->pcb_flags)
2559 * The support for RDFSBASE, WRFSBASE and similar instructions for %gs
2560 * base requires that kernel saves MSR_FSBASE and MSR_{K,}GSBASE into
2561 * pcb if user space modified the bases. We must save on the context
2562 * switch or if the return to usermode happens through the doreti.
2564 * Tracking of both events is performed by the pcb flag PCB_FULL_IRET,
2565 * which have a consequence that the base MSRs must be saved each time
2566 * the PCB_FULL_IRET flag is set. We disable interrupts to sync with
2570 set_pcb_flags(struct pcb *pcb, const u_int flags)
2574 if (curpcb == pcb &&
2575 (flags & PCB_FULL_IRET) != 0 &&
2576 (pcb->pcb_flags & PCB_FULL_IRET) == 0 &&
2577 (cpu_stdext_feature & CPUID_STDEXT_FSGSBASE) != 0) {
2579 if ((pcb->pcb_flags & PCB_FULL_IRET) == 0) {
2580 if (rfs() == _ufssel)
2581 pcb->pcb_fsbase = rdfsbase();
2582 if (rgs() == _ugssel)
2583 pcb->pcb_gsbase = rdmsr(MSR_KGSBASE);
2585 set_pcb_flags_raw(pcb, flags);
2588 set_pcb_flags_raw(pcb, flags);
2593 clear_pcb_flags(struct pcb *pcb, const u_int flags)
2596 __asm __volatile("andl %1,%0"
2597 : "=m" (pcb->pcb_flags) : "ir" (~flags), "m" (pcb->pcb_flags)
2604 * Provide inb() and outb() as functions. They are normally only available as
2605 * inline functions, thus cannot be called from the debugger.
2608 /* silence compiler warnings */
2609 u_char inb_(u_short);
2610 void outb_(u_short, u_char);
2619 outb_(u_short port, u_char data)