2 * SPDX-License-Identifier: BSD-4-Clause
4 * Copyright (c) 2003 Peter Wemm.
5 * Copyright (c) 1992 Terrence R. Lambert.
6 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
9 * This code is derived from software contributed to Berkeley by
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 * 3. All advertising materials mentioning features or use of this software
21 * must display the following acknowledgement:
22 * This product includes software developed by the University of
23 * California, Berkeley and its contributors.
24 * 4. Neither the name of the University nor the names of its contributors
25 * may be used to endorse or promote products derived from this software
26 * without specific prior written permission.
28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
40 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
43 #include <sys/cdefs.h>
44 __FBSDID("$FreeBSD$");
46 #include "opt_atpic.h"
51 #include "opt_kstack_pages.h"
52 #include "opt_maxmem.h"
53 #include "opt_mp_watchdog.h"
54 #include "opt_platform.h"
55 #include "opt_sched.h"
57 #include <sys/param.h>
59 #include <sys/systm.h>
63 #include <sys/callout.h>
67 #include <sys/eventhandler.h>
69 #include <sys/imgact.h>
71 #include <sys/kernel.h>
73 #include <sys/linker.h>
75 #include <sys/malloc.h>
76 #include <sys/memrange.h>
77 #include <sys/msgbuf.h>
78 #include <sys/mutex.h>
80 #include <sys/ptrace.h>
81 #include <sys/reboot.h>
82 #include <sys/rwlock.h>
83 #include <sys/sched.h>
84 #include <sys/signalvar.h>
88 #include <sys/syscallsubr.h>
89 #include <sys/sysctl.h>
90 #include <sys/sysent.h>
91 #include <sys/sysproto.h>
92 #include <sys/ucontext.h>
93 #include <sys/vmmeter.h>
96 #include <vm/vm_extern.h>
97 #include <vm/vm_kern.h>
98 #include <vm/vm_page.h>
99 #include <vm/vm_map.h>
100 #include <vm/vm_object.h>
101 #include <vm/vm_pager.h>
102 #include <vm/vm_param.h>
106 #error KDB must be enabled in order for DDB to work!
109 #include <ddb/db_sym.h>
112 #include <net/netisr.h>
114 #include <machine/clock.h>
115 #include <machine/cpu.h>
116 #include <machine/cputypes.h>
117 #include <machine/frame.h>
118 #include <machine/intr_machdep.h>
120 #include <machine/md_var.h>
121 #include <machine/metadata.h>
122 #include <machine/mp_watchdog.h>
123 #include <machine/pc/bios.h>
124 #include <machine/pcb.h>
125 #include <machine/proc.h>
126 #include <machine/reg.h>
127 #include <machine/sigframe.h>
128 #include <machine/specialreg.h>
129 #include <machine/trap.h>
130 #include <machine/tss.h>
132 #include <machine/smp.h>
139 #include <x86/isa/icu.h>
141 #include <x86/apicvar.h>
144 #include <isa/isareg.h>
146 #include <x86/init.h>
148 /* Sanity check for __curthread() */
149 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
152 * The PTI trampoline stack needs enough space for a hardware trapframe and a
153 * couple of scratch registers, as well as the trapframe left behind after an
156 CTASSERT(PC_PTI_STACK_SZ * sizeof(register_t) >= 2 * sizeof(struct pti_frame) -
157 offsetof(struct pti_frame, pti_rip));
159 extern u_int64_t hammer_time(u_int64_t, u_int64_t);
161 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
162 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
164 static void cpu_startup(void *);
165 static void get_fpcontext(struct thread *td, mcontext_t *mcp,
166 char *xfpusave, size_t xfpusave_len);
167 static int set_fpcontext(struct thread *td, mcontext_t *mcp,
168 char *xfpustate, size_t xfpustate_len);
169 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
171 /* Preload data parse function */
172 static caddr_t native_parse_preload_data(u_int64_t);
174 /* Native function to fetch and parse the e820 map */
175 static void native_parse_memmap(caddr_t, vm_paddr_t *, int *);
177 /* Default init_ops implementation. */
178 struct init_ops init_ops = {
179 .parse_preload_data = native_parse_preload_data,
180 .early_clock_source_init = i8254_init,
181 .early_delay = i8254_delay,
182 .parse_memmap = native_parse_memmap,
184 .mp_bootaddress = mp_bootaddress,
185 .start_all_aps = native_start_all_aps,
187 .msi_init = msi_init,
191 * Physical address of the EFI System Table. Stashed from the metadata hints
192 * passed into the kernel and used by the EFI code to call runtime services.
194 vm_paddr_t efi_systbl_phys;
196 /* Intel ICH registers */
197 #define ICH_PMBASE 0x400
198 #define ICH_SMI_EN ICH_PMBASE + 0x30
200 int _udatasel, _ucodesel, _ucode32sel, _ufssel, _ugssel;
208 * The number of PHYSMAP entries must be one less than the number of
209 * PHYSSEG entries because the PHYSMAP entry that spans the largest
210 * physical address that is accessible by ISA DMA is split into two
213 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
215 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
216 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
218 /* must be 2 less so 0 0 can signal end of chunks */
219 #define PHYS_AVAIL_ARRAY_END (nitems(phys_avail) - 2)
220 #define DUMP_AVAIL_ARRAY_END (nitems(dump_avail) - 2)
222 struct kva_md_info kmi;
224 static struct trapframe proc0_tf;
225 struct region_descriptor r_gdt, r_idt;
227 struct pcpu __pcpu[MAXCPU];
231 struct mem_range_softc mem_range_softc;
233 struct mtx dt_lock; /* lock for GDT and LDT */
235 void (*vmm_resume_p)(void);
245 * On MacBooks, we need to disallow the legacy USB circuit to
246 * generate an SMI# because this can cause several problems,
247 * namely: incorrect CPU frequency detection and failure to
249 * We do this by disabling a bit in the SMI_EN (SMI Control and
250 * Enable register) of the Intel ICH LPC Interface Bridge.
252 sysenv = kern_getenv("smbios.system.product");
253 if (sysenv != NULL) {
254 if (strncmp(sysenv, "MacBook1,1", 10) == 0 ||
255 strncmp(sysenv, "MacBook3,1", 10) == 0 ||
256 strncmp(sysenv, "MacBook4,1", 10) == 0 ||
257 strncmp(sysenv, "MacBookPro1,1", 13) == 0 ||
258 strncmp(sysenv, "MacBookPro1,2", 13) == 0 ||
259 strncmp(sysenv, "MacBookPro3,1", 13) == 0 ||
260 strncmp(sysenv, "MacBookPro4,1", 13) == 0 ||
261 strncmp(sysenv, "Macmini1,1", 10) == 0) {
263 printf("Disabling LEGACY_USB_EN bit on "
265 outl(ICH_SMI_EN, inl(ICH_SMI_EN) & ~0x8);
271 * Good {morning,afternoon,evening,night}.
277 * Display physical memory if SMBIOS reports reasonable amount.
280 sysenv = kern_getenv("smbios.memory.enabled");
281 if (sysenv != NULL) {
282 memsize = (uintmax_t)strtoul(sysenv, (char **)NULL, 10) << 10;
285 if (memsize < ptoa((uintmax_t)vm_free_count()))
286 memsize = ptoa((uintmax_t)Maxmem);
287 printf("real memory = %ju (%ju MB)\n", memsize, memsize >> 20);
288 realmem = atop(memsize);
291 * Display any holes after the first chunk of extended memory.
296 printf("Physical memory chunk(s):\n");
297 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
300 size = phys_avail[indx + 1] - phys_avail[indx];
302 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n",
303 (uintmax_t)phys_avail[indx],
304 (uintmax_t)phys_avail[indx + 1] - 1,
305 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
309 vm_ksubmap_init(&kmi);
311 printf("avail memory = %ju (%ju MB)\n",
312 ptoa((uintmax_t)vm_free_count()),
313 ptoa((uintmax_t)vm_free_count()) / 1048576);
316 * Set up buffers, so they can be used to read disk labels.
319 vm_pager_bufferinit();
325 * Send an interrupt to process.
327 * Stack is set up to allow sigcode stored
328 * at top to call routine, followed by call
329 * to sigreturn routine below. After sigreturn
330 * resets the signal mask, the stack, and the
331 * frame pointer, it returns to the user
335 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
337 struct sigframe sf, *sfp;
343 struct trapframe *regs;
352 PROC_LOCK_ASSERT(p, MA_OWNED);
353 sig = ksi->ksi_signo;
355 mtx_assert(&psp->ps_mtx, MA_OWNED);
357 oonstack = sigonstack(regs->tf_rsp);
359 if (cpu_max_ext_state_size > sizeof(struct savefpu) && use_xsave) {
360 xfpusave_len = cpu_max_ext_state_size - sizeof(struct savefpu);
361 xfpusave = __builtin_alloca(xfpusave_len);
367 /* Save user context. */
368 bzero(&sf, sizeof(sf));
369 sf.sf_uc.uc_sigmask = *mask;
370 sf.sf_uc.uc_stack = td->td_sigstk;
371 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
372 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
373 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
374 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(*regs));
375 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */
376 get_fpcontext(td, &sf.sf_uc.uc_mcontext, xfpusave, xfpusave_len);
378 update_pcb_bases(pcb);
379 sf.sf_uc.uc_mcontext.mc_fsbase = pcb->pcb_fsbase;
380 sf.sf_uc.uc_mcontext.mc_gsbase = pcb->pcb_gsbase;
381 bzero(sf.sf_uc.uc_mcontext.mc_spare,
382 sizeof(sf.sf_uc.uc_mcontext.mc_spare));
383 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__));
385 /* Allocate space for the signal handler context. */
386 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
387 SIGISMEMBER(psp->ps_sigonstack, sig)) {
388 sp = (char *)td->td_sigstk.ss_sp + td->td_sigstk.ss_size;
389 #if defined(COMPAT_43)
390 td->td_sigstk.ss_flags |= SS_ONSTACK;
393 sp = (char *)regs->tf_rsp - 128;
394 if (xfpusave != NULL) {
396 sp = (char *)((unsigned long)sp & ~0x3Ful);
397 sf.sf_uc.uc_mcontext.mc_xfpustate = (register_t)sp;
399 sp -= sizeof(struct sigframe);
400 /* Align to 16 bytes. */
401 sfp = (struct sigframe *)((unsigned long)sp & ~0xFul);
403 /* Build the argument list for the signal handler. */
404 regs->tf_rdi = sig; /* arg 1 in %rdi */
405 regs->tf_rdx = (register_t)&sfp->sf_uc; /* arg 3 in %rdx */
406 bzero(&sf.sf_si, sizeof(sf.sf_si));
407 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
408 /* Signal handler installed with SA_SIGINFO. */
409 regs->tf_rsi = (register_t)&sfp->sf_si; /* arg 2 in %rsi */
410 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
412 /* Fill in POSIX parts */
413 sf.sf_si = ksi->ksi_info;
414 sf.sf_si.si_signo = sig; /* maybe a translated signal */
415 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */
417 /* Old FreeBSD-style arguments. */
418 regs->tf_rsi = ksi->ksi_code; /* arg 2 in %rsi */
419 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */
420 sf.sf_ahu.sf_handler = catcher;
422 mtx_unlock(&psp->ps_mtx);
426 * Copy the sigframe out to the user's stack.
428 if (copyout(&sf, sfp, sizeof(*sfp)) != 0 ||
429 (xfpusave != NULL && copyout(xfpusave,
430 (void *)sf.sf_uc.uc_mcontext.mc_xfpustate, xfpusave_len)
433 printf("process %ld has trashed its stack\n", (long)p->p_pid);
439 regs->tf_rsp = (long)sfp;
440 regs->tf_rip = p->p_sysent->sv_sigcode_base;
441 regs->tf_rflags &= ~(PSL_T | PSL_D);
442 regs->tf_cs = _ucodesel;
443 regs->tf_ds = _udatasel;
444 regs->tf_ss = _udatasel;
445 regs->tf_es = _udatasel;
446 regs->tf_fs = _ufssel;
447 regs->tf_gs = _ugssel;
448 regs->tf_flags = TF_HASSEGS;
450 mtx_lock(&psp->ps_mtx);
454 * System call to cleanup state after a signal
455 * has been taken. Reset signal mask and
456 * stack state from context left by sendsig (above).
457 * Return to previous pc and psl as specified by
458 * context left by sendsig. Check carefully to
459 * make sure that the user has not modified the
460 * state to gain improper privileges.
465 sys_sigreturn(td, uap)
467 struct sigreturn_args /* {
468 const struct __ucontext *sigcntxp;
474 struct trapframe *regs;
477 size_t xfpustate_len;
485 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
487 uprintf("pid %d (%s): sigreturn copyin failed\n",
488 p->p_pid, td->td_name);
492 if ((ucp->uc_mcontext.mc_flags & ~_MC_FLAG_MASK) != 0) {
493 uprintf("pid %d (%s): sigreturn mc_flags %x\n", p->p_pid,
494 td->td_name, ucp->uc_mcontext.mc_flags);
498 rflags = ucp->uc_mcontext.mc_rflags;
500 * Don't allow users to change privileged or reserved flags.
502 if (!EFL_SECURE(rflags, regs->tf_rflags)) {
503 uprintf("pid %d (%s): sigreturn rflags = 0x%lx\n", p->p_pid,
504 td->td_name, rflags);
509 * Don't allow users to load a valid privileged %cs. Let the
510 * hardware check for invalid selectors, excess privilege in
511 * other selectors, invalid %eip's and invalid %esp's.
513 cs = ucp->uc_mcontext.mc_cs;
514 if (!CS_SECURE(cs)) {
515 uprintf("pid %d (%s): sigreturn cs = 0x%x\n", p->p_pid,
517 ksiginfo_init_trap(&ksi);
518 ksi.ksi_signo = SIGBUS;
519 ksi.ksi_code = BUS_OBJERR;
520 ksi.ksi_trapno = T_PROTFLT;
521 ksi.ksi_addr = (void *)regs->tf_rip;
522 trapsignal(td, &ksi);
526 if ((uc.uc_mcontext.mc_flags & _MC_HASFPXSTATE) != 0) {
527 xfpustate_len = uc.uc_mcontext.mc_xfpustate_len;
528 if (xfpustate_len > cpu_max_ext_state_size -
529 sizeof(struct savefpu)) {
530 uprintf("pid %d (%s): sigreturn xfpusave_len = 0x%zx\n",
531 p->p_pid, td->td_name, xfpustate_len);
534 xfpustate = __builtin_alloca(xfpustate_len);
535 error = copyin((const void *)uc.uc_mcontext.mc_xfpustate,
536 xfpustate, xfpustate_len);
539 "pid %d (%s): sigreturn copying xfpustate failed\n",
540 p->p_pid, td->td_name);
547 ret = set_fpcontext(td, &ucp->uc_mcontext, xfpustate, xfpustate_len);
549 uprintf("pid %d (%s): sigreturn set_fpcontext err %d\n",
550 p->p_pid, td->td_name, ret);
553 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(*regs));
554 update_pcb_bases(pcb);
555 pcb->pcb_fsbase = ucp->uc_mcontext.mc_fsbase;
556 pcb->pcb_gsbase = ucp->uc_mcontext.mc_gsbase;
558 #if defined(COMPAT_43)
559 if (ucp->uc_mcontext.mc_onstack & 1)
560 td->td_sigstk.ss_flags |= SS_ONSTACK;
562 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
565 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
566 return (EJUSTRETURN);
569 #ifdef COMPAT_FREEBSD4
571 freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap)
574 return sys_sigreturn(td, (struct sigreturn_args *)uap);
579 * Reset registers to default values on exec.
582 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
584 struct trapframe *regs;
586 register_t saved_rflags;
591 if (td->td_proc->p_md.md_ldt != NULL)
594 update_pcb_bases(pcb);
597 clear_pcb_flags(pcb, PCB_32BIT);
598 pcb->pcb_initial_fpucw = __INITIAL_FPUCW__;
600 saved_rflags = regs->tf_rflags & PSL_T;
601 bzero((char *)regs, sizeof(struct trapframe));
602 regs->tf_rip = imgp->entry_addr;
603 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8;
604 regs->tf_rdi = stack; /* argv */
605 regs->tf_rflags = PSL_USER | saved_rflags;
606 regs->tf_ss = _udatasel;
607 regs->tf_cs = _ucodesel;
608 regs->tf_ds = _udatasel;
609 regs->tf_es = _udatasel;
610 regs->tf_fs = _ufssel;
611 regs->tf_gs = _ugssel;
612 regs->tf_flags = TF_HASSEGS;
615 * Reset the hardware debug registers if they were in use.
616 * They won't have any meaning for the newly exec'd process.
618 if (pcb->pcb_flags & PCB_DBREGS) {
627 * Clear the debug registers on the running
628 * CPU, otherwise they will end up affecting
629 * the next process we switch to.
633 clear_pcb_flags(pcb, PCB_DBREGS);
637 * Drop the FP state if we hold it, so that the process gets a
638 * clean FP state if it uses the FPU again.
650 * CR0_MP, CR0_NE and CR0_TS are also set by npx_probe() for the
651 * BSP. See the comments there about why we set them.
653 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM;
658 * Initialize amd64 and configure to run kernel
662 * Initialize segments & interrupt table
665 struct user_segment_descriptor gdt[NGDT * MAXCPU];/* global descriptor tables */
666 static struct gate_descriptor idt0[NIDT];
667 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
669 static char dblfault_stack[PAGE_SIZE] __aligned(16);
670 static char mce0_stack[PAGE_SIZE] __aligned(16);
671 static char nmi0_stack[PAGE_SIZE] __aligned(16);
672 CTASSERT(sizeof(struct nmi_pcpu) == 16);
674 struct amd64tss common_tss[MAXCPU];
677 * Software prototypes -- in more palatable form.
679 * Keep GUFS32, GUGS32, GUCODE32 and GUDATA at the same
680 * slots as corresponding segments for i386 kernel.
682 struct soft_segment_descriptor gdt_segs[] = {
683 /* GNULL_SEL 0 Null Descriptor */
692 /* GNULL2_SEL 1 Null Descriptor */
701 /* GUFS32_SEL 2 32 bit %gs Descriptor for user */
703 .ssd_limit = 0xfffff,
704 .ssd_type = SDT_MEMRWA,
710 /* GUGS32_SEL 3 32 bit %fs Descriptor for user */
712 .ssd_limit = 0xfffff,
713 .ssd_type = SDT_MEMRWA,
719 /* GCODE_SEL 4 Code Descriptor for kernel */
721 .ssd_limit = 0xfffff,
722 .ssd_type = SDT_MEMERA,
728 /* GDATA_SEL 5 Data Descriptor for kernel */
730 .ssd_limit = 0xfffff,
731 .ssd_type = SDT_MEMRWA,
737 /* GUCODE32_SEL 6 32 bit Code Descriptor for user */
739 .ssd_limit = 0xfffff,
740 .ssd_type = SDT_MEMERA,
746 /* GUDATA_SEL 7 32/64 bit Data Descriptor for user */
748 .ssd_limit = 0xfffff,
749 .ssd_type = SDT_MEMRWA,
755 /* GUCODE_SEL 8 64 bit Code Descriptor for user */
757 .ssd_limit = 0xfffff,
758 .ssd_type = SDT_MEMERA,
764 /* GPROC0_SEL 9 Proc 0 Tss Descriptor */
766 .ssd_limit = sizeof(struct amd64tss) + IOPERM_BITMAP_SIZE - 1,
767 .ssd_type = SDT_SYSTSS,
773 /* Actually, the TSS is a system descriptor which is double size */
782 /* GUSERLDT_SEL 11 LDT Descriptor */
791 /* GUSERLDT_SEL 12 LDT Descriptor, double size */
803 setidt(int idx, inthand_t *func, int typ, int dpl, int ist)
805 struct gate_descriptor *ip;
808 ip->gd_looffset = (uintptr_t)func;
809 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL);
815 ip->gd_hioffset = ((uintptr_t)func)>>16 ;
819 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
820 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
821 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
822 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
823 IDTVEC(xmm), IDTVEC(dblfault),
824 IDTVEC(div_pti), IDTVEC(dbg_pti), IDTVEC(bpt_pti),
825 IDTVEC(ofl_pti), IDTVEC(bnd_pti), IDTVEC(ill_pti), IDTVEC(dna_pti),
826 IDTVEC(fpusegm_pti), IDTVEC(tss_pti), IDTVEC(missing_pti),
827 IDTVEC(stk_pti), IDTVEC(prot_pti), IDTVEC(page_pti),
828 IDTVEC(rsvd_pti), IDTVEC(fpu_pti), IDTVEC(align_pti),
831 IDTVEC(dtrace_ret), IDTVEC(dtrace_ret_pti),
834 IDTVEC(xen_intr_upcall), IDTVEC(xen_intr_upcall_pti),
836 IDTVEC(fast_syscall), IDTVEC(fast_syscall32),
837 IDTVEC(fast_syscall_pti);
841 * Display the index and function name of any IDT entries that don't use
842 * the default 'rsvd' entry point.
844 DB_SHOW_COMMAND(idt, db_show_idt)
846 struct gate_descriptor *ip;
851 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) {
852 func = ((long)ip->gd_hioffset << 16 | ip->gd_looffset);
853 if (func != (uintptr_t)&IDTVEC(rsvd)) {
854 db_printf("%3d\t", idx);
855 db_printsym(func, DB_STGY_PROC);
862 /* Show privileged registers. */
863 DB_SHOW_COMMAND(sysregs, db_show_sysregs)
868 } __packed idtr, gdtr;
871 __asm __volatile("sidt %0" : "=m" (idtr));
872 db_printf("idtr\t0x%016lx/%04x\n",
873 (u_long)idtr.base, (u_int)idtr.limit);
874 __asm __volatile("sgdt %0" : "=m" (gdtr));
875 db_printf("gdtr\t0x%016lx/%04x\n",
876 (u_long)gdtr.base, (u_int)gdtr.limit);
877 __asm __volatile("sldt %0" : "=r" (ldt));
878 db_printf("ldtr\t0x%04x\n", ldt);
879 __asm __volatile("str %0" : "=r" (tr));
880 db_printf("tr\t0x%04x\n", tr);
881 db_printf("cr0\t0x%016lx\n", rcr0());
882 db_printf("cr2\t0x%016lx\n", rcr2());
883 db_printf("cr3\t0x%016lx\n", rcr3());
884 db_printf("cr4\t0x%016lx\n", rcr4());
885 if (rcr4() & CR4_XSAVE)
886 db_printf("xcr0\t0x%016lx\n", rxcr(0));
887 db_printf("EFER\t0x%016lx\n", rdmsr(MSR_EFER));
888 if (cpu_feature2 & (CPUID2_VMX | CPUID2_SMX))
889 db_printf("FEATURES_CTL\t%016lx\n",
890 rdmsr(MSR_IA32_FEATURE_CONTROL));
891 db_printf("DEBUG_CTL\t0x%016lx\n", rdmsr(MSR_DEBUGCTLMSR));
892 db_printf("PAT\t0x%016lx\n", rdmsr(MSR_PAT));
893 db_printf("GSBASE\t0x%016lx\n", rdmsr(MSR_GSBASE));
896 DB_SHOW_COMMAND(dbregs, db_show_dbregs)
899 db_printf("dr0\t0x%016lx\n", rdr0());
900 db_printf("dr1\t0x%016lx\n", rdr1());
901 db_printf("dr2\t0x%016lx\n", rdr2());
902 db_printf("dr3\t0x%016lx\n", rdr3());
903 db_printf("dr6\t0x%016lx\n", rdr6());
904 db_printf("dr7\t0x%016lx\n", rdr7());
910 struct user_segment_descriptor *sd;
911 struct soft_segment_descriptor *ssd;
914 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
915 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
916 ssd->ssd_type = sd->sd_type;
917 ssd->ssd_dpl = sd->sd_dpl;
918 ssd->ssd_p = sd->sd_p;
919 ssd->ssd_long = sd->sd_long;
920 ssd->ssd_def32 = sd->sd_def32;
921 ssd->ssd_gran = sd->sd_gran;
926 struct soft_segment_descriptor *ssd;
927 struct user_segment_descriptor *sd;
930 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
931 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff;
932 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
933 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
934 sd->sd_type = ssd->ssd_type;
935 sd->sd_dpl = ssd->ssd_dpl;
936 sd->sd_p = ssd->ssd_p;
937 sd->sd_long = ssd->ssd_long;
938 sd->sd_def32 = ssd->ssd_def32;
939 sd->sd_gran = ssd->ssd_gran;
944 struct soft_segment_descriptor *ssd;
945 struct system_segment_descriptor *sd;
948 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
949 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful;
950 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
951 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
952 sd->sd_type = ssd->ssd_type;
953 sd->sd_dpl = ssd->ssd_dpl;
954 sd->sd_p = ssd->ssd_p;
955 sd->sd_gran = ssd->ssd_gran;
958 #if !defined(DEV_ATPIC) && defined(DEV_ISA)
959 #include <isa/isavar.h>
960 #include <isa/isareg.h>
962 * Return a bitmap of the current interrupt requests. This is 8259-specific
963 * and is only suitable for use at probe time.
964 * This is only here to pacify sio. It is NOT FATAL if this doesn't work.
965 * It shouldn't be here. There should probably be an APIC centric
966 * implementation in the apic driver code, if at all.
969 isa_irq_pending(void)
976 return ((irr2 << 8) | irr1);
983 add_physmap_entry(uint64_t base, uint64_t length, vm_paddr_t *physmap,
986 int i, insert_idx, physmap_idx;
988 physmap_idx = *physmap_idxp;
994 * Find insertion point while checking for overlap. Start off by
995 * assuming the new entry will be added to the end.
997 * NB: physmap_idx points to the next free slot.
999 insert_idx = physmap_idx;
1000 for (i = 0; i <= physmap_idx; i += 2) {
1001 if (base < physmap[i + 1]) {
1002 if (base + length <= physmap[i]) {
1006 if (boothowto & RB_VERBOSE)
1008 "Overlapping memory regions, ignoring second region\n");
1013 /* See if we can prepend to the next entry. */
1014 if (insert_idx <= physmap_idx && base + length == physmap[insert_idx]) {
1015 physmap[insert_idx] = base;
1019 /* See if we can append to the previous entry. */
1020 if (insert_idx > 0 && base == physmap[insert_idx - 1]) {
1021 physmap[insert_idx - 1] += length;
1026 *physmap_idxp = physmap_idx;
1027 if (physmap_idx == PHYSMAP_SIZE) {
1029 "Too many segments in the physical address map, giving up\n");
1034 * Move the last 'N' entries down to make room for the new
1037 for (i = (physmap_idx - 2); i > insert_idx; i -= 2) {
1038 physmap[i] = physmap[i - 2];
1039 physmap[i + 1] = physmap[i - 1];
1042 /* Insert the new entry. */
1043 physmap[insert_idx] = base;
1044 physmap[insert_idx + 1] = base + length;
1049 bios_add_smap_entries(struct bios_smap *smapbase, u_int32_t smapsize,
1050 vm_paddr_t *physmap, int *physmap_idx)
1052 struct bios_smap *smap, *smapend;
1054 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
1056 for (smap = smapbase; smap < smapend; smap++) {
1057 if (boothowto & RB_VERBOSE)
1058 printf("SMAP type=%02x base=%016lx len=%016lx\n",
1059 smap->type, smap->base, smap->length);
1061 if (smap->type != SMAP_TYPE_MEMORY)
1064 if (!add_physmap_entry(smap->base, smap->length, physmap,
1071 add_efi_map_entries(struct efi_map_header *efihdr, vm_paddr_t *physmap,
1074 struct efi_md *map, *p;
1079 static const char *types[] = {
1085 "RuntimeServicesCode",
1086 "RuntimeServicesData",
1087 "ConventionalMemory",
1089 "ACPIReclaimMemory",
1092 "MemoryMappedIOPortSpace",
1098 * Memory map data provided by UEFI via the GetMemoryMap
1099 * Boot Services API.
1101 efisz = (sizeof(struct efi_map_header) + 0xf) & ~0xf;
1102 map = (struct efi_md *)((uint8_t *)efihdr + efisz);
1104 if (efihdr->descriptor_size == 0)
1106 ndesc = efihdr->memory_size / efihdr->descriptor_size;
1108 if (boothowto & RB_VERBOSE)
1109 printf("%23s %12s %12s %8s %4s\n",
1110 "Type", "Physical", "Virtual", "#Pages", "Attr");
1112 for (i = 0, p = map; i < ndesc; i++,
1113 p = efi_next_descriptor(p, efihdr->descriptor_size)) {
1114 if (boothowto & RB_VERBOSE) {
1115 if (p->md_type < nitems(types))
1116 type = types[p->md_type];
1119 printf("%23s %012lx %12p %08lx ", type, p->md_phys,
1120 p->md_virt, p->md_pages);
1121 if (p->md_attr & EFI_MD_ATTR_UC)
1123 if (p->md_attr & EFI_MD_ATTR_WC)
1125 if (p->md_attr & EFI_MD_ATTR_WT)
1127 if (p->md_attr & EFI_MD_ATTR_WB)
1129 if (p->md_attr & EFI_MD_ATTR_UCE)
1131 if (p->md_attr & EFI_MD_ATTR_WP)
1133 if (p->md_attr & EFI_MD_ATTR_RP)
1135 if (p->md_attr & EFI_MD_ATTR_XP)
1137 if (p->md_attr & EFI_MD_ATTR_NV)
1139 if (p->md_attr & EFI_MD_ATTR_MORE_RELIABLE)
1140 printf("MORE_RELIABLE ");
1141 if (p->md_attr & EFI_MD_ATTR_RO)
1143 if (p->md_attr & EFI_MD_ATTR_RT)
1148 switch (p->md_type) {
1149 case EFI_MD_TYPE_CODE:
1150 case EFI_MD_TYPE_DATA:
1151 case EFI_MD_TYPE_BS_CODE:
1152 case EFI_MD_TYPE_BS_DATA:
1153 case EFI_MD_TYPE_FREE:
1155 * We're allowed to use any entry with these types.
1162 if (!add_physmap_entry(p->md_phys, (p->md_pages * PAGE_SIZE),
1163 physmap, physmap_idx))
1168 static char bootmethod[16] = "";
1169 SYSCTL_STRING(_machdep, OID_AUTO, bootmethod, CTLFLAG_RD, bootmethod, 0,
1170 "System firmware boot method");
1173 native_parse_memmap(caddr_t kmdp, vm_paddr_t *physmap, int *physmap_idx)
1175 struct bios_smap *smap;
1176 struct efi_map_header *efihdr;
1180 * Memory map from INT 15:E820.
1182 * subr_module.c says:
1183 * "Consumer may safely assume that size value precedes data."
1184 * ie: an int32_t immediately precedes smap.
1187 efihdr = (struct efi_map_header *)preload_search_info(kmdp,
1188 MODINFO_METADATA | MODINFOMD_EFI_MAP);
1189 smap = (struct bios_smap *)preload_search_info(kmdp,
1190 MODINFO_METADATA | MODINFOMD_SMAP);
1191 if (efihdr == NULL && smap == NULL)
1192 panic("No BIOS smap or EFI map info from loader!");
1194 if (efihdr != NULL) {
1195 add_efi_map_entries(efihdr, physmap, physmap_idx);
1196 strlcpy(bootmethod, "UEFI", sizeof(bootmethod));
1198 size = *((u_int32_t *)smap - 1);
1199 bios_add_smap_entries(smap, size, physmap, physmap_idx);
1200 strlcpy(bootmethod, "BIOS", sizeof(bootmethod));
1204 #define PAGES_PER_GB (1024 * 1024 * 1024 / PAGE_SIZE)
1207 * Populate the (physmap) array with base/bound pairs describing the
1208 * available physical memory in the system, then test this memory and
1209 * build the phys_avail array describing the actually-available memory.
1211 * Total memory size may be set by the kernel environment variable
1212 * hw.physmem or the compile-time define MAXMEM.
1214 * XXX first should be vm_paddr_t.
1217 getmemsize(caddr_t kmdp, u_int64_t first)
1219 int i, physmap_idx, pa_indx, da_indx;
1220 vm_paddr_t pa, physmap[PHYSMAP_SIZE];
1221 u_long physmem_start, physmem_tunable, memtest;
1223 quad_t dcons_addr, dcons_size;
1226 bzero(physmap, sizeof(physmap));
1229 init_ops.parse_memmap(kmdp, physmap, &physmap_idx);
1233 * Find the 'base memory' segment for SMP
1236 for (i = 0; i <= physmap_idx; i += 2) {
1237 if (physmap[i] <= 0xA0000) {
1238 basemem = physmap[i + 1] / 1024;
1242 if (basemem == 0 || basemem > 640) {
1245 "Memory map doesn't contain a basemem segment, faking it");
1250 * Make hole for "AP -> long mode" bootstrap code. The
1251 * mp_bootaddress vector is only available when the kernel
1252 * is configured to support APs and APs for the system start
1253 * in real mode mode (e.g. SMP bare metal).
1255 if (init_ops.mp_bootaddress)
1256 init_ops.mp_bootaddress(physmap, &physmap_idx);
1259 * Maxmem isn't the "maximum memory", it's one larger than the
1260 * highest page of the physical address space. It should be
1261 * called something like "Maxphyspage". We may adjust this
1262 * based on ``hw.physmem'' and the results of the memory test.
1264 Maxmem = atop(physmap[physmap_idx + 1]);
1267 Maxmem = MAXMEM / 4;
1270 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
1271 Maxmem = atop(physmem_tunable);
1274 * The boot memory test is disabled by default, as it takes a
1275 * significant amount of time on large-memory systems, and is
1276 * unfriendly to virtual machines as it unnecessarily touches all
1279 * A general name is used as the code may be extended to support
1280 * additional tests beyond the current "page present" test.
1283 TUNABLE_ULONG_FETCH("hw.memtest.tests", &memtest);
1286 * Don't allow MAXMEM or hw.physmem to extend the amount of memory
1289 if (Maxmem > atop(physmap[physmap_idx + 1]))
1290 Maxmem = atop(physmap[physmap_idx + 1]);
1292 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1293 (boothowto & RB_VERBOSE))
1294 printf("Physical memory use set to %ldK\n", Maxmem * 4);
1296 /* call pmap initialization to make new kernel address space */
1297 pmap_bootstrap(&first);
1300 * Size up each available chunk of physical memory.
1302 * XXX Some BIOSes corrupt low 64KB between suspend and resume.
1303 * By default, mask off the first 16 pages unless we appear to be
1306 physmem_start = (vm_guest > VM_GUEST_NO ? 1 : 16) << PAGE_SHIFT;
1307 TUNABLE_ULONG_FETCH("hw.physmem.start", &physmem_start);
1308 if (physmap[0] < physmem_start) {
1309 if (physmem_start < PAGE_SIZE)
1310 physmap[0] = PAGE_SIZE;
1311 else if (physmem_start >= physmap[1])
1312 physmap[0] = round_page(physmap[1] - PAGE_SIZE);
1314 physmap[0] = round_page(physmem_start);
1318 phys_avail[pa_indx++] = physmap[0];
1319 phys_avail[pa_indx] = physmap[0];
1320 dump_avail[da_indx] = physmap[0];
1324 * Get dcons buffer address
1326 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
1327 getenv_quad("dcons.size", &dcons_size) == 0)
1331 * physmap is in bytes, so when converting to page boundaries,
1332 * round up the start address and round down the end address.
1336 printf("Testing system memory");
1337 for (i = 0; i <= physmap_idx; i += 2) {
1340 end = ptoa((vm_paddr_t)Maxmem);
1341 if (physmap[i + 1] < end)
1342 end = trunc_page(physmap[i + 1]);
1343 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1344 int tmp, page_bad, full;
1345 int *ptr = (int *)CADDR1;
1349 * block out kernel memory as not available.
1351 if (pa >= (vm_paddr_t)kernphys && pa < first)
1355 * block out dcons buffer
1358 && pa >= trunc_page(dcons_addr)
1359 && pa < dcons_addr + dcons_size)
1367 * Print a "." every GB to show we're making
1371 if ((page_counter % PAGES_PER_GB) == 0)
1375 * map page into kernel: valid, read/write,non-cacheable
1377 *pte = pa | PG_V | PG_RW | PG_NC_PWT | PG_NC_PCD;
1382 * Test for alternating 1's and 0's
1384 *(volatile int *)ptr = 0xaaaaaaaa;
1385 if (*(volatile int *)ptr != 0xaaaaaaaa)
1388 * Test for alternating 0's and 1's
1390 *(volatile int *)ptr = 0x55555555;
1391 if (*(volatile int *)ptr != 0x55555555)
1396 *(volatile int *)ptr = 0xffffffff;
1397 if (*(volatile int *)ptr != 0xffffffff)
1402 *(volatile int *)ptr = 0x0;
1403 if (*(volatile int *)ptr != 0x0)
1406 * Restore original value.
1412 * Adjust array of valid/good pages.
1414 if (page_bad == TRUE)
1417 * If this good page is a continuation of the
1418 * previous set of good pages, then just increase
1419 * the end pointer. Otherwise start a new chunk.
1420 * Note that "end" points one higher than end,
1421 * making the range >= start and < end.
1422 * If we're also doing a speculative memory
1423 * test and we at or past the end, bump up Maxmem
1424 * so that we keep going. The first bad page
1425 * will terminate the loop.
1427 if (phys_avail[pa_indx] == pa) {
1428 phys_avail[pa_indx] += PAGE_SIZE;
1431 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1433 "Too many holes in the physical address space, giving up\n");
1438 phys_avail[pa_indx++] = pa; /* start */
1439 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1443 if (dump_avail[da_indx] == pa) {
1444 dump_avail[da_indx] += PAGE_SIZE;
1447 if (da_indx == DUMP_AVAIL_ARRAY_END) {
1451 dump_avail[da_indx++] = pa; /* start */
1452 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
1466 * The last chunk must contain at least one page plus the message
1467 * buffer to avoid complicating other code (message buffer address
1468 * calculation, etc.).
1470 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1471 round_page(msgbufsize) >= phys_avail[pa_indx]) {
1472 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1473 phys_avail[pa_indx--] = 0;
1474 phys_avail[pa_indx--] = 0;
1477 Maxmem = atop(phys_avail[pa_indx]);
1479 /* Trim off space for the message buffer. */
1480 phys_avail[pa_indx] -= round_page(msgbufsize);
1482 /* Map the message buffer. */
1483 msgbufp = (struct msgbuf *)PHYS_TO_DMAP(phys_avail[pa_indx]);
1487 native_parse_preload_data(u_int64_t modulep)
1492 vm_offset_t ksym_start;
1493 vm_offset_t ksym_end;
1496 preload_metadata = (caddr_t)(uintptr_t)(modulep + KERNBASE);
1497 preload_bootstrap_relocate(KERNBASE);
1498 kmdp = preload_search_by_type("elf kernel");
1500 kmdp = preload_search_by_type("elf64 kernel");
1501 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
1502 envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *);
1505 init_static_kenv(envp, 0);
1507 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
1508 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
1509 db_fetch_ksymtab(ksym_start, ksym_end);
1511 efi_systbl_phys = MD_FETCH(kmdp, MODINFOMD_FW_HANDLE, vm_paddr_t);
1517 amd64_kdb_init(void)
1521 if (boothowto & RB_KDB)
1522 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
1526 /* Set up the fast syscall stuff */
1528 amd64_conf_fast_syscall(void)
1532 msr = rdmsr(MSR_EFER) | EFER_SCE;
1533 wrmsr(MSR_EFER, msr);
1534 wrmsr(MSR_LSTAR, pti ? (u_int64_t)IDTVEC(fast_syscall_pti) :
1535 (u_int64_t)IDTVEC(fast_syscall));
1536 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32));
1537 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) |
1538 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48);
1539 wrmsr(MSR_STAR, msr);
1540 wrmsr(MSR_SF_MASK, PSL_NT | PSL_T | PSL_I | PSL_C | PSL_D);
1544 hammer_time(u_int64_t modulep, u_int64_t physfree)
1549 struct nmi_pcpu *np;
1550 struct xstate_hdr *xhdr;
1556 TSRAW(&thread0, TS_ENTER, __func__, NULL);
1559 * This may be done better later if it gets more high level
1560 * components in it. If so just link td->td_proc here.
1562 proc_linkup0(&proc0, &thread0);
1564 kmdp = init_ops.parse_preload_data(modulep);
1567 identify_hypervisor();
1569 /* link_elf_ireloc(kmdp); */
1571 /* Init basic tunables, hz etc */
1574 thread0.td_kstack = physfree + KERNBASE;
1575 thread0.td_kstack_pages = kstack_pages;
1576 kstack0_sz = thread0.td_kstack_pages * PAGE_SIZE;
1577 bzero((void *)thread0.td_kstack, kstack0_sz);
1578 physfree += kstack0_sz;
1581 * make gdt memory segments
1583 for (x = 0; x < NGDT; x++) {
1584 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1) &&
1585 x != GUSERLDT_SEL && x != (GUSERLDT_SEL) + 1)
1586 ssdtosd(&gdt_segs[x], &gdt[x]);
1588 gdt_segs[GPROC0_SEL].ssd_base = (uintptr_t)&common_tss[0];
1589 ssdtosyssd(&gdt_segs[GPROC0_SEL],
1590 (struct system_segment_descriptor *)&gdt[GPROC0_SEL]);
1592 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1593 r_gdt.rd_base = (long) gdt;
1597 wrmsr(MSR_FSBASE, 0); /* User value */
1598 wrmsr(MSR_GSBASE, (u_int64_t)pc);
1599 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */
1601 pcpu_init(pc, 0, sizeof(struct pcpu));
1602 dpcpu_init((void *)(physfree + KERNBASE), 0);
1603 physfree += DPCPU_SIZE;
1604 PCPU_SET(prvspace, pc);
1605 PCPU_SET(curthread, &thread0);
1606 /* Non-late cninit() and printf() can be moved up to here. */
1607 PCPU_SET(tssp, &common_tss[0]);
1608 PCPU_SET(commontssp, &common_tss[0]);
1609 PCPU_SET(tss, (struct system_segment_descriptor *)&gdt[GPROC0_SEL]);
1610 PCPU_SET(ldt, (struct system_segment_descriptor *)&gdt[GUSERLDT_SEL]);
1611 PCPU_SET(fs32p, &gdt[GUFS32_SEL]);
1612 PCPU_SET(gs32p, &gdt[GUGS32_SEL]);
1615 * Initialize mutexes.
1617 * icu_lock: in order to allow an interrupt to occur in a critical
1618 * section, to set pcpu->ipending (etc...) properly, we
1619 * must be able to get the icu lock, so it can't be
1623 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS);
1624 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_DEF);
1627 pti = pti_get_default();
1628 TUNABLE_INT_FETCH("vm.pmap.pti", &pti);
1630 for (x = 0; x < NIDT; x++)
1631 setidt(x, pti ? &IDTVEC(rsvd_pti) : &IDTVEC(rsvd), SDT_SYSIGT,
1633 setidt(IDT_DE, pti ? &IDTVEC(div_pti) : &IDTVEC(div), SDT_SYSIGT,
1635 setidt(IDT_DB, pti ? &IDTVEC(dbg_pti) : &IDTVEC(dbg), SDT_SYSIGT,
1637 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 2);
1638 setidt(IDT_BP, pti ? &IDTVEC(bpt_pti) : &IDTVEC(bpt), SDT_SYSIGT,
1640 setidt(IDT_OF, pti ? &IDTVEC(ofl_pti) : &IDTVEC(ofl), SDT_SYSIGT,
1642 setidt(IDT_BR, pti ? &IDTVEC(bnd_pti) : &IDTVEC(bnd), SDT_SYSIGT,
1644 setidt(IDT_UD, pti ? &IDTVEC(ill_pti) : &IDTVEC(ill), SDT_SYSIGT,
1646 setidt(IDT_NM, pti ? &IDTVEC(dna_pti) : &IDTVEC(dna), SDT_SYSIGT,
1648 setidt(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1);
1649 setidt(IDT_FPUGP, pti ? &IDTVEC(fpusegm_pti) : &IDTVEC(fpusegm),
1650 SDT_SYSIGT, SEL_KPL, 0);
1651 setidt(IDT_TS, pti ? &IDTVEC(tss_pti) : &IDTVEC(tss), SDT_SYSIGT,
1653 setidt(IDT_NP, pti ? &IDTVEC(missing_pti) : &IDTVEC(missing),
1654 SDT_SYSIGT, SEL_KPL, 0);
1655 setidt(IDT_SS, pti ? &IDTVEC(stk_pti) : &IDTVEC(stk), SDT_SYSIGT,
1657 setidt(IDT_GP, pti ? &IDTVEC(prot_pti) : &IDTVEC(prot), SDT_SYSIGT,
1659 setidt(IDT_PF, pti ? &IDTVEC(page_pti) : &IDTVEC(page), SDT_SYSIGT,
1661 setidt(IDT_MF, pti ? &IDTVEC(fpu_pti) : &IDTVEC(fpu), SDT_SYSIGT,
1663 setidt(IDT_AC, pti ? &IDTVEC(align_pti) : &IDTVEC(align), SDT_SYSIGT,
1665 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 3);
1666 setidt(IDT_XF, pti ? &IDTVEC(xmm_pti) : &IDTVEC(xmm), SDT_SYSIGT,
1668 #ifdef KDTRACE_HOOKS
1669 setidt(IDT_DTRACE_RET, pti ? &IDTVEC(dtrace_ret_pti) :
1670 &IDTVEC(dtrace_ret), SDT_SYSIGT, SEL_UPL, 0);
1673 setidt(IDT_EVTCHN, pti ? &IDTVEC(xen_intr_upcall_pti) :
1674 &IDTVEC(xen_intr_upcall), SDT_SYSIGT, SEL_KPL, 0);
1676 r_idt.rd_limit = sizeof(idt0) - 1;
1677 r_idt.rd_base = (long) idt;
1681 * Initialize the clock before the console so that console
1682 * initialization can use DELAY().
1687 * Use vt(4) by default for UEFI boot (during the sc(4)/vt(4)
1689 * Once bootblocks have updated, we can test directly for
1690 * efi_systbl != NULL here...
1692 if (preload_search_info(kmdp, MODINFO_METADATA | MODINFOMD_EFI_MAP)
1694 vty_set_preferred(VTY_VT);
1696 finishidentcpu(); /* Final stage of CPU initialization */
1697 initializecpu(); /* Initialize CPU registers */
1698 initializecpucache();
1700 /* doublefault stack space, runs on ist1 */
1701 common_tss[0].tss_ist1 = (long)&dblfault_stack[sizeof(dblfault_stack)];
1704 * NMI stack, runs on ist2. The pcpu pointer is stored just
1705 * above the start of the ist2 stack.
1707 np = ((struct nmi_pcpu *) &nmi0_stack[sizeof(nmi0_stack)]) - 1;
1708 np->np_pcpu = (register_t) pc;
1709 common_tss[0].tss_ist2 = (long) np;
1712 * MC# stack, runs on ist3. The pcpu pointer is stored just
1713 * above the start of the ist3 stack.
1715 np = ((struct nmi_pcpu *) &mce0_stack[sizeof(mce0_stack)]) - 1;
1716 np->np_pcpu = (register_t) pc;
1717 common_tss[0].tss_ist3 = (long) np;
1719 /* Set the IO permission bitmap (empty due to tss seg limit) */
1720 common_tss[0].tss_iobase = sizeof(struct amd64tss) + IOPERM_BITMAP_SIZE;
1722 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
1725 amd64_conf_fast_syscall();
1728 * Temporary forge some valid pointer to PCB, for exception
1729 * handlers. It is reinitialized properly below after FPU is
1730 * set up. Also set up td_critnest to short-cut the page
1733 cpu_max_ext_state_size = sizeof(struct savefpu);
1734 thread0.td_pcb = get_pcb_td(&thread0);
1735 thread0.td_critnest = 1;
1738 * The console and kdb should be initialized even earlier than here,
1739 * but some console drivers don't work until after getmemsize().
1740 * Default to late console initialization to support these drivers.
1741 * This loses mainly printf()s in getmemsize() and early debugging.
1744 TUNABLE_INT_FETCH("debug.late_console", &late_console);
1745 if (!late_console) {
1749 link_elf_ireloc(kmdp);
1751 getmemsize(kmdp, physfree);
1752 init_param2(physmem);
1754 /* now running on new page tables, configured,and u/iom is accessible */
1764 /* Reset and mask the atpics and leave them shut down. */
1768 * Point the ICU spurious interrupt vectors at the APIC spurious
1769 * interrupt handler.
1771 setidt(IDT_IO_INTS + 7, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0);
1772 setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0);
1775 #error "have you forgotten the isa device?";
1781 msgbufinit(msgbufp, msgbufsize);
1785 * Set up thread0 pcb after fpuinit calculated pcb + fpu save
1786 * area size. Zero out the extended state header in fpu save
1789 thread0.td_pcb = get_pcb_td(&thread0);
1790 thread0.td_pcb->pcb_save = get_pcb_user_save_td(&thread0);
1791 bzero(get_pcb_user_save_td(&thread0), cpu_max_ext_state_size);
1793 xhdr = (struct xstate_hdr *)(get_pcb_user_save_td(&thread0) +
1795 xhdr->xstate_bv = xsave_mask;
1797 /* make an initial tss so cpu can get interrupt stack on syscall! */
1798 rsp0 = (vm_offset_t)thread0.td_pcb;
1799 /* Ensure the stack is aligned to 16 bytes */
1801 common_tss[0].tss_rsp0 = rsp0;
1802 PCPU_SET(rsp0, rsp0);
1803 PCPU_SET(pti_rsp0, ((vm_offset_t)PCPU_PTR(pti_stack) +
1804 PC_PTI_STACK_SZ * sizeof(uint64_t)) & ~0xful);
1805 PCPU_SET(curpcb, thread0.td_pcb);
1807 /* transfer to user mode */
1809 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
1810 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
1811 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL);
1812 _ufssel = GSEL(GUFS32_SEL, SEL_UPL);
1813 _ugssel = GSEL(GUGS32_SEL, SEL_UPL);
1819 /* setup proc 0's pcb */
1820 thread0.td_pcb->pcb_flags = 0;
1821 thread0.td_frame = &proc0_tf;
1823 env = kern_getenv("kernelname");
1825 strlcpy(kernelname, env, sizeof(kernelname));
1832 thread0.td_critnest = 0;
1834 TUNABLE_INT_FETCH("hw.ibrs_disable", &hw_ibrs_disable);
1838 /* Location of kernel stack for locore */
1839 return ((u_int64_t)thread0.td_pcb);
1843 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
1846 pcpu->pc_acpi_id = 0xffffffff;
1850 smap_sysctl_handler(SYSCTL_HANDLER_ARGS)
1852 struct bios_smap *smapbase;
1853 struct bios_smap_xattr smap;
1856 int count, error, i;
1858 /* Retrieve the system memory map from the loader. */
1859 kmdp = preload_search_by_type("elf kernel");
1861 kmdp = preload_search_by_type("elf64 kernel");
1862 smapbase = (struct bios_smap *)preload_search_info(kmdp,
1863 MODINFO_METADATA | MODINFOMD_SMAP);
1864 if (smapbase == NULL)
1866 smapattr = (uint32_t *)preload_search_info(kmdp,
1867 MODINFO_METADATA | MODINFOMD_SMAP_XATTR);
1868 count = *((uint32_t *)smapbase - 1) / sizeof(*smapbase);
1870 for (i = 0; i < count; i++) {
1871 smap.base = smapbase[i].base;
1872 smap.length = smapbase[i].length;
1873 smap.type = smapbase[i].type;
1874 if (smapattr != NULL)
1875 smap.xattr = smapattr[i];
1878 error = SYSCTL_OUT(req, &smap, sizeof(smap));
1882 SYSCTL_PROC(_machdep, OID_AUTO, smap, CTLTYPE_OPAQUE|CTLFLAG_RD, NULL, 0,
1883 smap_sysctl_handler, "S,bios_smap_xattr", "Raw BIOS SMAP data");
1886 efi_map_sysctl_handler(SYSCTL_HANDLER_ARGS)
1888 struct efi_map_header *efihdr;
1892 kmdp = preload_search_by_type("elf kernel");
1894 kmdp = preload_search_by_type("elf64 kernel");
1895 efihdr = (struct efi_map_header *)preload_search_info(kmdp,
1896 MODINFO_METADATA | MODINFOMD_EFI_MAP);
1899 efisize = *((uint32_t *)efihdr - 1);
1900 return (SYSCTL_OUT(req, efihdr, efisize));
1902 SYSCTL_PROC(_machdep, OID_AUTO, efi_map, CTLTYPE_OPAQUE|CTLFLAG_RD, NULL, 0,
1903 efi_map_sysctl_handler, "S,efi_map_header", "Raw EFI Memory Map");
1906 spinlock_enter(void)
1912 if (td->td_md.md_spinlock_count == 0) {
1913 flags = intr_disable();
1914 td->td_md.md_spinlock_count = 1;
1915 td->td_md.md_saved_flags = flags;
1918 td->td_md.md_spinlock_count++;
1928 flags = td->td_md.md_saved_flags;
1929 td->td_md.md_spinlock_count--;
1930 if (td->td_md.md_spinlock_count == 0) {
1932 intr_restore(flags);
1937 * Construct a PCB from a trapframe. This is called from kdb_trap() where
1938 * we want to start a backtrace from the function that caused us to enter
1939 * the debugger. We have the context in the trapframe, but base the trace
1940 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
1941 * enough for a backtrace.
1944 makectx(struct trapframe *tf, struct pcb *pcb)
1947 pcb->pcb_r12 = tf->tf_r12;
1948 pcb->pcb_r13 = tf->tf_r13;
1949 pcb->pcb_r14 = tf->tf_r14;
1950 pcb->pcb_r15 = tf->tf_r15;
1951 pcb->pcb_rbp = tf->tf_rbp;
1952 pcb->pcb_rbx = tf->tf_rbx;
1953 pcb->pcb_rip = tf->tf_rip;
1954 pcb->pcb_rsp = tf->tf_rsp;
1958 ptrace_set_pc(struct thread *td, unsigned long addr)
1961 td->td_frame->tf_rip = addr;
1962 set_pcb_flags(td->td_pcb, PCB_FULL_IRET);
1967 ptrace_single_step(struct thread *td)
1969 td->td_frame->tf_rflags |= PSL_T;
1974 ptrace_clear_single_step(struct thread *td)
1976 td->td_frame->tf_rflags &= ~PSL_T;
1981 fill_regs(struct thread *td, struct reg *regs)
1983 struct trapframe *tp;
1986 return (fill_frame_regs(tp, regs));
1990 fill_frame_regs(struct trapframe *tp, struct reg *regs)
1992 regs->r_r15 = tp->tf_r15;
1993 regs->r_r14 = tp->tf_r14;
1994 regs->r_r13 = tp->tf_r13;
1995 regs->r_r12 = tp->tf_r12;
1996 regs->r_r11 = tp->tf_r11;
1997 regs->r_r10 = tp->tf_r10;
1998 regs->r_r9 = tp->tf_r9;
1999 regs->r_r8 = tp->tf_r8;
2000 regs->r_rdi = tp->tf_rdi;
2001 regs->r_rsi = tp->tf_rsi;
2002 regs->r_rbp = tp->tf_rbp;
2003 regs->r_rbx = tp->tf_rbx;
2004 regs->r_rdx = tp->tf_rdx;
2005 regs->r_rcx = tp->tf_rcx;
2006 regs->r_rax = tp->tf_rax;
2007 regs->r_rip = tp->tf_rip;
2008 regs->r_cs = tp->tf_cs;
2009 regs->r_rflags = tp->tf_rflags;
2010 regs->r_rsp = tp->tf_rsp;
2011 regs->r_ss = tp->tf_ss;
2012 if (tp->tf_flags & TF_HASSEGS) {
2013 regs->r_ds = tp->tf_ds;
2014 regs->r_es = tp->tf_es;
2015 regs->r_fs = tp->tf_fs;
2016 regs->r_gs = tp->tf_gs;
2027 set_regs(struct thread *td, struct reg *regs)
2029 struct trapframe *tp;
2033 rflags = regs->r_rflags & 0xffffffff;
2034 if (!EFL_SECURE(rflags, tp->tf_rflags) || !CS_SECURE(regs->r_cs))
2036 tp->tf_r15 = regs->r_r15;
2037 tp->tf_r14 = regs->r_r14;
2038 tp->tf_r13 = regs->r_r13;
2039 tp->tf_r12 = regs->r_r12;
2040 tp->tf_r11 = regs->r_r11;
2041 tp->tf_r10 = regs->r_r10;
2042 tp->tf_r9 = regs->r_r9;
2043 tp->tf_r8 = regs->r_r8;
2044 tp->tf_rdi = regs->r_rdi;
2045 tp->tf_rsi = regs->r_rsi;
2046 tp->tf_rbp = regs->r_rbp;
2047 tp->tf_rbx = regs->r_rbx;
2048 tp->tf_rdx = regs->r_rdx;
2049 tp->tf_rcx = regs->r_rcx;
2050 tp->tf_rax = regs->r_rax;
2051 tp->tf_rip = regs->r_rip;
2052 tp->tf_cs = regs->r_cs;
2053 tp->tf_rflags = rflags;
2054 tp->tf_rsp = regs->r_rsp;
2055 tp->tf_ss = regs->r_ss;
2056 if (0) { /* XXXKIB */
2057 tp->tf_ds = regs->r_ds;
2058 tp->tf_es = regs->r_es;
2059 tp->tf_fs = regs->r_fs;
2060 tp->tf_gs = regs->r_gs;
2061 tp->tf_flags = TF_HASSEGS;
2063 set_pcb_flags(td->td_pcb, PCB_FULL_IRET);
2067 /* XXX check all this stuff! */
2068 /* externalize from sv_xmm */
2070 fill_fpregs_xmm(struct savefpu *sv_xmm, struct fpreg *fpregs)
2072 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env;
2073 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2077 bzero(fpregs, sizeof(*fpregs));
2079 /* FPU control/status */
2080 penv_fpreg->en_cw = penv_xmm->en_cw;
2081 penv_fpreg->en_sw = penv_xmm->en_sw;
2082 penv_fpreg->en_tw = penv_xmm->en_tw;
2083 penv_fpreg->en_opcode = penv_xmm->en_opcode;
2084 penv_fpreg->en_rip = penv_xmm->en_rip;
2085 penv_fpreg->en_rdp = penv_xmm->en_rdp;
2086 penv_fpreg->en_mxcsr = penv_xmm->en_mxcsr;
2087 penv_fpreg->en_mxcsr_mask = penv_xmm->en_mxcsr_mask;
2090 for (i = 0; i < 8; ++i)
2091 bcopy(sv_xmm->sv_fp[i].fp_acc.fp_bytes, fpregs->fpr_acc[i], 10);
2094 for (i = 0; i < 16; ++i)
2095 bcopy(sv_xmm->sv_xmm[i].xmm_bytes, fpregs->fpr_xacc[i], 16);
2098 /* internalize from fpregs into sv_xmm */
2100 set_fpregs_xmm(struct fpreg *fpregs, struct savefpu *sv_xmm)
2102 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2103 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env;
2107 /* FPU control/status */
2108 penv_xmm->en_cw = penv_fpreg->en_cw;
2109 penv_xmm->en_sw = penv_fpreg->en_sw;
2110 penv_xmm->en_tw = penv_fpreg->en_tw;
2111 penv_xmm->en_opcode = penv_fpreg->en_opcode;
2112 penv_xmm->en_rip = penv_fpreg->en_rip;
2113 penv_xmm->en_rdp = penv_fpreg->en_rdp;
2114 penv_xmm->en_mxcsr = penv_fpreg->en_mxcsr;
2115 penv_xmm->en_mxcsr_mask = penv_fpreg->en_mxcsr_mask & cpu_mxcsr_mask;
2118 for (i = 0; i < 8; ++i)
2119 bcopy(fpregs->fpr_acc[i], sv_xmm->sv_fp[i].fp_acc.fp_bytes, 10);
2122 for (i = 0; i < 16; ++i)
2123 bcopy(fpregs->fpr_xacc[i], sv_xmm->sv_xmm[i].xmm_bytes, 16);
2126 /* externalize from td->pcb */
2128 fill_fpregs(struct thread *td, struct fpreg *fpregs)
2131 KASSERT(td == curthread || TD_IS_SUSPENDED(td) ||
2132 P_SHOULDSTOP(td->td_proc),
2133 ("not suspended thread %p", td));
2135 fill_fpregs_xmm(get_pcb_user_save_td(td), fpregs);
2139 /* internalize to td->pcb */
2141 set_fpregs(struct thread *td, struct fpreg *fpregs)
2144 set_fpregs_xmm(fpregs, get_pcb_user_save_td(td));
2150 * Get machine context.
2153 get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
2156 struct trapframe *tp;
2160 PROC_LOCK(curthread->td_proc);
2161 mcp->mc_onstack = sigonstack(tp->tf_rsp);
2162 PROC_UNLOCK(curthread->td_proc);
2163 mcp->mc_r15 = tp->tf_r15;
2164 mcp->mc_r14 = tp->tf_r14;
2165 mcp->mc_r13 = tp->tf_r13;
2166 mcp->mc_r12 = tp->tf_r12;
2167 mcp->mc_r11 = tp->tf_r11;
2168 mcp->mc_r10 = tp->tf_r10;
2169 mcp->mc_r9 = tp->tf_r9;
2170 mcp->mc_r8 = tp->tf_r8;
2171 mcp->mc_rdi = tp->tf_rdi;
2172 mcp->mc_rsi = tp->tf_rsi;
2173 mcp->mc_rbp = tp->tf_rbp;
2174 mcp->mc_rbx = tp->tf_rbx;
2175 mcp->mc_rcx = tp->tf_rcx;
2176 mcp->mc_rflags = tp->tf_rflags;
2177 if (flags & GET_MC_CLEAR_RET) {
2180 mcp->mc_rflags &= ~PSL_C;
2182 mcp->mc_rax = tp->tf_rax;
2183 mcp->mc_rdx = tp->tf_rdx;
2185 mcp->mc_rip = tp->tf_rip;
2186 mcp->mc_cs = tp->tf_cs;
2187 mcp->mc_rsp = tp->tf_rsp;
2188 mcp->mc_ss = tp->tf_ss;
2189 mcp->mc_ds = tp->tf_ds;
2190 mcp->mc_es = tp->tf_es;
2191 mcp->mc_fs = tp->tf_fs;
2192 mcp->mc_gs = tp->tf_gs;
2193 mcp->mc_flags = tp->tf_flags;
2194 mcp->mc_len = sizeof(*mcp);
2195 get_fpcontext(td, mcp, NULL, 0);
2196 update_pcb_bases(pcb);
2197 mcp->mc_fsbase = pcb->pcb_fsbase;
2198 mcp->mc_gsbase = pcb->pcb_gsbase;
2199 mcp->mc_xfpustate = 0;
2200 mcp->mc_xfpustate_len = 0;
2201 bzero(mcp->mc_spare, sizeof(mcp->mc_spare));
2206 * Set machine context.
2208 * However, we don't set any but the user modifiable flags, and we won't
2209 * touch the cs selector.
2212 set_mcontext(struct thread *td, mcontext_t *mcp)
2215 struct trapframe *tp;
2222 if (mcp->mc_len != sizeof(*mcp) ||
2223 (mcp->mc_flags & ~_MC_FLAG_MASK) != 0)
2225 rflags = (mcp->mc_rflags & PSL_USERCHANGE) |
2226 (tp->tf_rflags & ~PSL_USERCHANGE);
2227 if (mcp->mc_flags & _MC_HASFPXSTATE) {
2228 if (mcp->mc_xfpustate_len > cpu_max_ext_state_size -
2229 sizeof(struct savefpu))
2231 xfpustate = __builtin_alloca(mcp->mc_xfpustate_len);
2232 ret = copyin((void *)mcp->mc_xfpustate, xfpustate,
2233 mcp->mc_xfpustate_len);
2238 ret = set_fpcontext(td, mcp, xfpustate, mcp->mc_xfpustate_len);
2241 tp->tf_r15 = mcp->mc_r15;
2242 tp->tf_r14 = mcp->mc_r14;
2243 tp->tf_r13 = mcp->mc_r13;
2244 tp->tf_r12 = mcp->mc_r12;
2245 tp->tf_r11 = mcp->mc_r11;
2246 tp->tf_r10 = mcp->mc_r10;
2247 tp->tf_r9 = mcp->mc_r9;
2248 tp->tf_r8 = mcp->mc_r8;
2249 tp->tf_rdi = mcp->mc_rdi;
2250 tp->tf_rsi = mcp->mc_rsi;
2251 tp->tf_rbp = mcp->mc_rbp;
2252 tp->tf_rbx = mcp->mc_rbx;
2253 tp->tf_rdx = mcp->mc_rdx;
2254 tp->tf_rcx = mcp->mc_rcx;
2255 tp->tf_rax = mcp->mc_rax;
2256 tp->tf_rip = mcp->mc_rip;
2257 tp->tf_rflags = rflags;
2258 tp->tf_rsp = mcp->mc_rsp;
2259 tp->tf_ss = mcp->mc_ss;
2260 tp->tf_flags = mcp->mc_flags;
2261 if (tp->tf_flags & TF_HASSEGS) {
2262 tp->tf_ds = mcp->mc_ds;
2263 tp->tf_es = mcp->mc_es;
2264 tp->tf_fs = mcp->mc_fs;
2265 tp->tf_gs = mcp->mc_gs;
2267 set_pcb_flags(pcb, PCB_FULL_IRET);
2268 if (mcp->mc_flags & _MC_HASBASES) {
2269 pcb->pcb_fsbase = mcp->mc_fsbase;
2270 pcb->pcb_gsbase = mcp->mc_gsbase;
2276 get_fpcontext(struct thread *td, mcontext_t *mcp, char *xfpusave,
2277 size_t xfpusave_len)
2279 size_t max_len, len;
2281 mcp->mc_ownedfp = fpugetregs(td);
2282 bcopy(get_pcb_user_save_td(td), &mcp->mc_fpstate[0],
2283 sizeof(mcp->mc_fpstate));
2284 mcp->mc_fpformat = fpuformat();
2285 if (!use_xsave || xfpusave_len == 0)
2287 max_len = cpu_max_ext_state_size - sizeof(struct savefpu);
2289 if (len > max_len) {
2291 bzero(xfpusave + max_len, len - max_len);
2293 mcp->mc_flags |= _MC_HASFPXSTATE;
2294 mcp->mc_xfpustate_len = len;
2295 bcopy(get_pcb_user_save_td(td) + 1, xfpusave, len);
2299 set_fpcontext(struct thread *td, mcontext_t *mcp, char *xfpustate,
2300 size_t xfpustate_len)
2304 if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
2306 else if (mcp->mc_fpformat != _MC_FPFMT_XMM)
2308 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) {
2309 /* We don't care what state is left in the FPU or PCB. */
2312 } else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
2313 mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
2314 error = fpusetregs(td, (struct savefpu *)&mcp->mc_fpstate,
2315 xfpustate, xfpustate_len);
2322 fpstate_drop(struct thread *td)
2325 KASSERT(PCB_USER_FPU(td->td_pcb), ("fpstate_drop: kernel-owned fpu"));
2327 if (PCPU_GET(fpcurthread) == td)
2330 * XXX force a full drop of the fpu. The above only drops it if we
2333 * XXX I don't much like fpugetuserregs()'s semantics of doing a full
2334 * drop. Dropping only to the pcb matches fnsave's behaviour.
2335 * We only need to drop to !PCB_INITDONE in sendsig(). But
2336 * sendsig() is the only caller of fpugetuserregs()... perhaps we just
2337 * have too many layers.
2339 clear_pcb_flags(curthread->td_pcb,
2340 PCB_FPUINITDONE | PCB_USERFPUINITDONE);
2345 fill_dbregs(struct thread *td, struct dbreg *dbregs)
2350 dbregs->dr[0] = rdr0();
2351 dbregs->dr[1] = rdr1();
2352 dbregs->dr[2] = rdr2();
2353 dbregs->dr[3] = rdr3();
2354 dbregs->dr[6] = rdr6();
2355 dbregs->dr[7] = rdr7();
2358 dbregs->dr[0] = pcb->pcb_dr0;
2359 dbregs->dr[1] = pcb->pcb_dr1;
2360 dbregs->dr[2] = pcb->pcb_dr2;
2361 dbregs->dr[3] = pcb->pcb_dr3;
2362 dbregs->dr[6] = pcb->pcb_dr6;
2363 dbregs->dr[7] = pcb->pcb_dr7;
2379 set_dbregs(struct thread *td, struct dbreg *dbregs)
2385 load_dr0(dbregs->dr[0]);
2386 load_dr1(dbregs->dr[1]);
2387 load_dr2(dbregs->dr[2]);
2388 load_dr3(dbregs->dr[3]);
2389 load_dr6(dbregs->dr[6]);
2390 load_dr7(dbregs->dr[7]);
2393 * Don't let an illegal value for dr7 get set. Specifically,
2394 * check for undefined settings. Setting these bit patterns
2395 * result in undefined behaviour and can lead to an unexpected
2396 * TRCTRAP or a general protection fault right here.
2397 * Upper bits of dr6 and dr7 must not be set
2399 for (i = 0; i < 4; i++) {
2400 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02)
2402 if (td->td_frame->tf_cs == _ucode32sel &&
2403 DBREG_DR7_LEN(dbregs->dr[7], i) == DBREG_DR7_LEN_8)
2406 if ((dbregs->dr[6] & 0xffffffff00000000ul) != 0 ||
2407 (dbregs->dr[7] & 0xffffffff00000000ul) != 0)
2413 * Don't let a process set a breakpoint that is not within the
2414 * process's address space. If a process could do this, it
2415 * could halt the system by setting a breakpoint in the kernel
2416 * (if ddb was enabled). Thus, we need to check to make sure
2417 * that no breakpoints are being enabled for addresses outside
2418 * process's address space.
2420 * XXX - what about when the watched area of the user's
2421 * address space is written into from within the kernel
2422 * ... wouldn't that still cause a breakpoint to be generated
2423 * from within kernel mode?
2426 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) {
2427 /* dr0 is enabled */
2428 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS)
2431 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) {
2432 /* dr1 is enabled */
2433 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS)
2436 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) {
2437 /* dr2 is enabled */
2438 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS)
2441 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) {
2442 /* dr3 is enabled */
2443 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS)
2447 pcb->pcb_dr0 = dbregs->dr[0];
2448 pcb->pcb_dr1 = dbregs->dr[1];
2449 pcb->pcb_dr2 = dbregs->dr[2];
2450 pcb->pcb_dr3 = dbregs->dr[3];
2451 pcb->pcb_dr6 = dbregs->dr[6];
2452 pcb->pcb_dr7 = dbregs->dr[7];
2454 set_pcb_flags(pcb, PCB_DBREGS);
2464 load_dr7(0); /* Turn off the control bits first */
2473 * Return > 0 if a hardware breakpoint has been hit, and the
2474 * breakpoint was in user space. Return 0, otherwise.
2477 user_dbreg_trap(void)
2479 u_int64_t dr7, dr6; /* debug registers dr6 and dr7 */
2480 u_int64_t bp; /* breakpoint bits extracted from dr6 */
2481 int nbp; /* number of breakpoints that triggered */
2482 caddr_t addr[4]; /* breakpoint addresses */
2486 if ((dr7 & 0x000000ff) == 0) {
2488 * all GE and LE bits in the dr7 register are zero,
2489 * thus the trap couldn't have been caused by the
2490 * hardware debug registers
2497 bp = dr6 & 0x0000000f;
2501 * None of the breakpoint bits are set meaning this
2502 * trap was not caused by any of the debug registers
2508 * at least one of the breakpoints were hit, check to see
2509 * which ones and if any of them are user space addresses
2513 addr[nbp++] = (caddr_t)rdr0();
2516 addr[nbp++] = (caddr_t)rdr1();
2519 addr[nbp++] = (caddr_t)rdr2();
2522 addr[nbp++] = (caddr_t)rdr3();
2525 for (i = 0; i < nbp; i++) {
2526 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) {
2528 * addr[i] is in user space
2535 * None of the breakpoints are in user space.
2541 * The pcb_flags is only modified by current thread, or by other threads
2542 * when current thread is stopped. However, current thread may change it
2543 * from the interrupt context in cpu_switch(), or in the trap handler.
2544 * When we read-modify-write pcb_flags from C sources, compiler may generate
2545 * code that is not atomic regarding the interrupt handler. If a trap or
2546 * interrupt happens and any flag is modified from the handler, it can be
2547 * clobbered with the cached value later. Therefore, we implement setting
2548 * and clearing flags with single-instruction functions, which do not race
2549 * with possible modification of the flags from the trap or interrupt context,
2550 * because traps and interrupts are executed only on instruction boundary.
2553 set_pcb_flags_raw(struct pcb *pcb, const u_int flags)
2556 __asm __volatile("orl %1,%0"
2557 : "=m" (pcb->pcb_flags) : "ir" (flags), "m" (pcb->pcb_flags)
2563 * The support for RDFSBASE, WRFSBASE and similar instructions for %gs
2564 * base requires that kernel saves MSR_FSBASE and MSR_{K,}GSBASE into
2565 * pcb if user space modified the bases. We must save on the context
2566 * switch or if the return to usermode happens through the doreti.
2568 * Tracking of both events is performed by the pcb flag PCB_FULL_IRET,
2569 * which have a consequence that the base MSRs must be saved each time
2570 * the PCB_FULL_IRET flag is set. We disable interrupts to sync with
2574 set_pcb_flags(struct pcb *pcb, const u_int flags)
2578 if (curpcb == pcb &&
2579 (flags & PCB_FULL_IRET) != 0 &&
2580 (pcb->pcb_flags & PCB_FULL_IRET) == 0 &&
2581 (cpu_stdext_feature & CPUID_STDEXT_FSGSBASE) != 0) {
2583 if ((pcb->pcb_flags & PCB_FULL_IRET) == 0) {
2584 if (rfs() == _ufssel)
2585 pcb->pcb_fsbase = rdfsbase();
2586 if (rgs() == _ugssel)
2587 pcb->pcb_gsbase = rdmsr(MSR_KGSBASE);
2589 set_pcb_flags_raw(pcb, flags);
2592 set_pcb_flags_raw(pcb, flags);
2597 clear_pcb_flags(struct pcb *pcb, const u_int flags)
2600 __asm __volatile("andl %1,%0"
2601 : "=m" (pcb->pcb_flags) : "ir" (~flags), "m" (pcb->pcb_flags)
2608 * Provide inb() and outb() as functions. They are normally only available as
2609 * inline functions, thus cannot be called from the debugger.
2612 /* silence compiler warnings */
2613 u_char inb_(u_short);
2614 void outb_(u_short, u_char);
2623 outb_(u_short port, u_char data)