2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 1996, by Steve Passe
5 * Copyright (c) 2003, by Peter Wemm
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. The name of the developer may NOT be used to endorse or promote products
14 * derived from this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
34 #include "opt_kstack_pages.h"
35 #include "opt_sched.h"
38 #include <sys/param.h>
39 #include <sys/systm.h>
41 #include <sys/cpuset.h>
45 #include <sys/kernel.h>
48 #include <sys/malloc.h>
49 #include <sys/memrange.h>
50 #include <sys/mutex.h>
53 #include <sys/sched.h>
55 #include <sys/sysctl.h>
58 #include <vm/vm_param.h>
60 #include <vm/vm_kern.h>
61 #include <vm/vm_extern.h>
63 #include <x86/apicreg.h>
64 #include <machine/clock.h>
65 #include <machine/cputypes.h>
66 #include <machine/cpufunc.h>
68 #include <machine/md_var.h>
69 #include <machine/pcb.h>
70 #include <machine/psl.h>
71 #include <machine/smp.h>
72 #include <machine/specialreg.h>
73 #include <machine/tss.h>
74 #include <machine/cpu.h>
77 #define WARMBOOT_TARGET 0
78 #define WARMBOOT_OFF (KERNBASE + 0x0467)
79 #define WARMBOOT_SEG (KERNBASE + 0x0469)
81 #define CMOS_REG (0x70)
82 #define CMOS_DATA (0x71)
83 #define BIOS_RESET (0x0f)
84 #define BIOS_WARM (0x0a)
86 extern struct pcpu __pcpu[];
88 /* Temporary variables for init_secondary() */
89 char *doublefault_stack;
92 extern inthand_t IDTVEC(fast_syscall), IDTVEC(fast_syscall32);
95 * Local data and functions.
98 static int start_ap(int apic_id);
100 static u_int bootMP_size;
101 static u_int boot_address;
104 * Calculate usable address in base memory for AP trampoline code.
107 mp_bootaddress(u_int basemem)
110 bootMP_size = mptramp_end - mptramp_start;
111 boot_address = trunc_page(basemem * 1024); /* round down to 4k boundary */
112 if (((basemem * 1024) - boot_address) < bootMP_size)
113 boot_address -= PAGE_SIZE; /* not enough, lower by 4k */
114 /* 3 levels of page table pages */
115 mptramp_pagetables = boot_address - (PAGE_SIZE * 3);
117 return mptramp_pagetables;
121 * Initialize the IPI handlers and start up the AP's.
128 /* Initialize the logical ID to APIC ID table. */
129 for (i = 0; i < MAXCPU; i++) {
130 cpu_apic_ids[i] = -1;
131 cpu_ipi_pending[i] = 0;
134 /* Install an inter-CPU IPI for TLB invalidation */
135 if (pmap_pcid_enabled) {
137 setidt(IPI_INVLTLB, IDTVEC(invltlb_invpcid),
138 SDT_SYSIGT, SEL_KPL, 0);
140 setidt(IPI_INVLTLB, IDTVEC(invltlb_pcid), SDT_SYSIGT,
144 setidt(IPI_INVLTLB, IDTVEC(invltlb), SDT_SYSIGT, SEL_KPL, 0);
146 setidt(IPI_INVLPG, IDTVEC(invlpg), SDT_SYSIGT, SEL_KPL, 0);
147 setidt(IPI_INVLRNG, IDTVEC(invlrng), SDT_SYSIGT, SEL_KPL, 0);
149 /* Install an inter-CPU IPI for cache invalidation. */
150 setidt(IPI_INVLCACHE, IDTVEC(invlcache), SDT_SYSIGT, SEL_KPL, 0);
152 /* Install an inter-CPU IPI for all-CPU rendezvous */
153 setidt(IPI_RENDEZVOUS, IDTVEC(rendezvous), SDT_SYSIGT, SEL_KPL, 0);
155 /* Install generic inter-CPU IPI handler */
156 setidt(IPI_BITMAP_VECTOR, IDTVEC(ipi_intr_bitmap_handler),
157 SDT_SYSIGT, SEL_KPL, 0);
159 /* Install an inter-CPU IPI for CPU stop/restart */
160 setidt(IPI_STOP, IDTVEC(cpustop), SDT_SYSIGT, SEL_KPL, 0);
162 /* Install an inter-CPU IPI for CPU suspend/resume */
163 setidt(IPI_SUSPEND, IDTVEC(cpususpend), SDT_SYSIGT, SEL_KPL, 0);
165 /* Set boot_cpu_id if needed. */
166 if (boot_cpu_id == -1) {
167 boot_cpu_id = PCPU_GET(apic_id);
168 cpu_info[boot_cpu_id].cpu_bsp = 1;
170 KASSERT(boot_cpu_id == PCPU_GET(apic_id),
171 ("BSP's APIC ID doesn't match boot_cpu_id"));
173 /* Probe logical/physical core configuration. */
178 /* Start each Application Processor */
179 init_ops.start_all_aps();
181 set_interrupt_apic_ids();
186 * AP CPU's call this to initialize themselves.
194 int cpu, gsel_tss, x;
195 struct region_descriptor ap_gdt;
197 /* Set by the startup code for us to use */
201 common_tss[cpu] = common_tss[0];
202 common_tss[cpu].tss_rsp0 = 0; /* not used until after switch */
203 common_tss[cpu].tss_iobase = sizeof(struct amd64tss) +
205 common_tss[cpu].tss_ist1 = (long)&doublefault_stack[PAGE_SIZE];
207 /* The NMI stack runs on IST2. */
208 np = ((struct nmi_pcpu *) &nmi_stack[PAGE_SIZE]) - 1;
209 common_tss[cpu].tss_ist2 = (long) np;
211 /* Prepare private GDT */
212 gdt_segs[GPROC0_SEL].ssd_base = (long) &common_tss[cpu];
213 for (x = 0; x < NGDT; x++) {
214 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1) &&
215 x != GUSERLDT_SEL && x != (GUSERLDT_SEL + 1))
216 ssdtosd(&gdt_segs[x], &gdt[NGDT * cpu + x]);
218 ssdtosyssd(&gdt_segs[GPROC0_SEL],
219 (struct system_segment_descriptor *)&gdt[NGDT * cpu + GPROC0_SEL]);
220 ap_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
221 ap_gdt.rd_base = (long) &gdt[NGDT * cpu];
222 lgdt(&ap_gdt); /* does magic intra-segment return */
224 /* Get per-cpu data */
227 /* prime data page for it to use */
228 pcpu_init(pc, cpu, sizeof(struct pcpu));
229 dpcpu_init(dpcpu, cpu);
230 pc->pc_apic_id = cpu_apic_ids[cpu];
231 pc->pc_prvspace = pc;
232 pc->pc_curthread = 0;
233 pc->pc_tssp = &common_tss[cpu];
234 pc->pc_commontssp = &common_tss[cpu];
236 pc->pc_tss = (struct system_segment_descriptor *)&gdt[NGDT * cpu +
238 pc->pc_fs32p = &gdt[NGDT * cpu + GUFS32_SEL];
239 pc->pc_gs32p = &gdt[NGDT * cpu + GUGS32_SEL];
240 pc->pc_ldt = (struct system_segment_descriptor *)&gdt[NGDT * cpu +
242 pc->pc_curpmap = kernel_pmap;
244 pc->pc_pcid_next = PMAP_PCID_KERN + 1;
246 /* Save the per-cpu pointer for use by the NMI handler. */
247 np->np_pcpu = (register_t) pc;
249 wrmsr(MSR_FSBASE, 0); /* User value */
250 wrmsr(MSR_GSBASE, (u_int64_t)pc);
251 wrmsr(MSR_KGSBASE, (u_int64_t)pc); /* XXX User value while we're in the kernel */
256 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
260 * Set to a known state:
261 * Set by mpboot.s: CR0_PG, CR0_PE
262 * Set by cpu_setregs: CR0_NE, CR0_MP, CR0_TS, CR0_WP, CR0_AM
265 cr0 &= ~(CR0_CD | CR0_NW | CR0_EM);
268 /* Set up the fast syscall stuff */
269 msr = rdmsr(MSR_EFER) | EFER_SCE;
270 wrmsr(MSR_EFER, msr);
271 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall));
272 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32));
273 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) |
274 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48);
275 wrmsr(MSR_STAR, msr);
276 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D);
278 /* signal our startup to the BSP. */
281 /* Spin until the BSP releases the AP's. */
282 while (atomic_load_acq_int(&aps_ready) == 0)
285 init_secondary_tail();
288 /*******************************************************************
289 * local functions and data
293 * start each AP in our list
296 native_start_all_aps(void)
298 vm_offset_t va = boot_address + KERNBASE;
299 u_int64_t *pt4, *pt3, *pt2;
300 u_int32_t mpbioswarmvec;
304 mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN);
306 /* install the AP 1st level boot code */
307 pmap_kenter(va, boot_address);
308 pmap_invalidate_page(kernel_pmap, va);
309 bcopy(mptramp_start, (void *)va, bootMP_size);
311 /* Locate the page tables, they'll be below the trampoline */
312 pt4 = (u_int64_t *)(uintptr_t)(mptramp_pagetables + KERNBASE);
313 pt3 = pt4 + (PAGE_SIZE) / sizeof(u_int64_t);
314 pt2 = pt3 + (PAGE_SIZE) / sizeof(u_int64_t);
316 /* Create the initial 1GB replicated page tables */
317 for (i = 0; i < 512; i++) {
318 /* Each slot of the level 4 pages points to the same level 3 page */
319 pt4[i] = (u_int64_t)(uintptr_t)(mptramp_pagetables + PAGE_SIZE);
320 pt4[i] |= PG_V | PG_RW | PG_U;
322 /* Each slot of the level 3 pages points to the same level 2 page */
323 pt3[i] = (u_int64_t)(uintptr_t)(mptramp_pagetables + (2 * PAGE_SIZE));
324 pt3[i] |= PG_V | PG_RW | PG_U;
326 /* The level 2 page slots are mapped with 2MB pages for 1GB. */
327 pt2[i] = i * (2 * 1024 * 1024);
328 pt2[i] |= PG_V | PG_RW | PG_PS | PG_U;
331 /* save the current value of the warm-start vector */
332 mpbioswarmvec = *((u_int32_t *) WARMBOOT_OFF);
333 outb(CMOS_REG, BIOS_RESET);
334 mpbiosreason = inb(CMOS_DATA);
336 /* setup a vector to our boot code */
337 *((volatile u_short *) WARMBOOT_OFF) = WARMBOOT_TARGET;
338 *((volatile u_short *) WARMBOOT_SEG) = (boot_address >> 4);
339 outb(CMOS_REG, BIOS_RESET);
340 outb(CMOS_DATA, BIOS_WARM); /* 'warm-start' */
343 for (cpu = 1; cpu < mp_ncpus; cpu++) {
344 apic_id = cpu_apic_ids[cpu];
346 /* allocate and set up an idle stack data page */
347 bootstacks[cpu] = (void *)kmem_malloc(kernel_arena,
348 kstack_pages * PAGE_SIZE, M_WAITOK | M_ZERO);
349 doublefault_stack = (char *)kmem_malloc(kernel_arena,
350 PAGE_SIZE, M_WAITOK | M_ZERO);
351 nmi_stack = (char *)kmem_malloc(kernel_arena, PAGE_SIZE,
353 dpcpu = (void *)kmem_malloc(kernel_arena, DPCPU_SIZE,
356 bootSTK = (char *)bootstacks[cpu] + kstack_pages * PAGE_SIZE - 8;
359 /* attempt to start the Application Processor */
360 if (!start_ap(apic_id)) {
361 /* restore the warmstart vector */
362 *(u_int32_t *) WARMBOOT_OFF = mpbioswarmvec;
363 panic("AP #%d (PHY# %d) failed!", cpu, apic_id);
366 CPU_SET(cpu, &all_cpus); /* record AP in CPU map */
369 /* restore the warmstart vector */
370 *(u_int32_t *) WARMBOOT_OFF = mpbioswarmvec;
372 outb(CMOS_REG, BIOS_RESET);
373 outb(CMOS_DATA, mpbiosreason);
375 /* number of APs actually started */
381 * This function starts the AP (application processor) identified
382 * by the APIC ID 'physicalCpu'. It does quite a "song and dance"
383 * to accomplish this. This is necessary because of the nuances
384 * of the different hardware we might encounter. It isn't pretty,
385 * but it seems to work.
388 start_ap(int apic_id)
393 /* calculate the vector */
394 vector = (boot_address >> 12) & 0xff;
396 /* used as a watchpoint to signal AP startup */
399 ipi_startup(apic_id, vector);
401 /* Wait up to 5 seconds for it to start. */
402 for (ms = 0; ms < 5000; ms++) {
404 return 1; /* return SUCCESS */
407 return 0; /* return FAILURE */
411 invltlb_invpcid_handler(void)
413 struct invpcid_descr d;
416 #ifdef COUNT_XINVLTLB_HITS
417 xhits_gbl[PCPU_GET(cpuid)]++;
418 #endif /* COUNT_XINVLTLB_HITS */
420 (*ipi_invltlb_counts[PCPU_GET(cpuid)])++;
421 #endif /* COUNT_IPIS */
423 generation = smp_tlb_generation;
424 d.pcid = smp_tlb_pmap->pm_pcids[PCPU_GET(cpuid)].pm_pcid;
427 invpcid(&d, smp_tlb_pmap == kernel_pmap ? INVPCID_CTXGLOB :
429 PCPU_SET(smp_tlb_done, generation);
433 invltlb_pcid_handler(void)
437 #ifdef COUNT_XINVLTLB_HITS
438 xhits_gbl[PCPU_GET(cpuid)]++;
439 #endif /* COUNT_XINVLTLB_HITS */
441 (*ipi_invltlb_counts[PCPU_GET(cpuid)])++;
442 #endif /* COUNT_IPIS */
444 generation = smp_tlb_generation; /* Overlap with serialization */
445 if (smp_tlb_pmap == kernel_pmap) {
449 * The current pmap might not be equal to
450 * smp_tlb_pmap. The clearing of the pm_gen in
451 * pmap_invalidate_all() takes care of TLB
452 * invalidation when switching to the pmap on this
455 if (PCPU_GET(curpmap) == smp_tlb_pmap) {
456 load_cr3(smp_tlb_pmap->pm_cr3 |
457 smp_tlb_pmap->pm_pcids[PCPU_GET(cpuid)].pm_pcid);
460 PCPU_SET(smp_tlb_done, generation);