2 * Copyright (c) 1991 Regents of the University of California.
4 * Copyright (c) 1994 John S. Dyson
6 * Copyright (c) 1994 David Greenman
8 * Copyright (c) 2003 Peter Wemm
10 * Copyright (c) 2005 Alan L. Cox <alc@cs.rice.edu>
11 * All rights reserved.
13 * This code is derived from software contributed to Berkeley by
14 * the Systems Programming Group of the University of Utah Computer
15 * Science Department and William Jolitz of UUNET Technologies Inc.
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions
20 * 1. Redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer.
22 * 2. Redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution.
25 * 3. All advertising materials mentioning features or use of this software
26 * must display the following acknowledgement:
27 * This product includes software developed by the University of
28 * California, Berkeley and its contributors.
29 * 4. Neither the name of the University nor the names of its contributors
30 * may be used to endorse or promote products derived from this software
31 * without specific prior written permission.
33 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
34 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
35 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
36 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
37 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
38 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
39 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
40 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
41 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
42 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
45 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91
48 * Copyright (c) 2003 Networks Associates Technology, Inc.
49 * All rights reserved.
51 * This software was developed for the FreeBSD Project by Jake Burkholder,
52 * Safeport Network Services, and Network Associates Laboratories, the
53 * Security Research Division of Network Associates, Inc. under
54 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
55 * CHATS research program.
57 * Redistribution and use in source and binary forms, with or without
58 * modification, are permitted provided that the following conditions
60 * 1. Redistributions of source code must retain the above copyright
61 * notice, this list of conditions and the following disclaimer.
62 * 2. Redistributions in binary form must reproduce the above copyright
63 * notice, this list of conditions and the following disclaimer in the
64 * documentation and/or other materials provided with the distribution.
66 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
67 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
68 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
69 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
70 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
71 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
72 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
73 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
74 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
75 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
79 #include <sys/cdefs.h>
80 __FBSDID("$FreeBSD$");
83 * Manages physical address maps.
85 * In addition to hardware address maps, this
86 * module is called upon to provide software-use-only
87 * maps which may or may not be stored in the same
88 * form as hardware maps. These pseudo-maps are
89 * used to store intermediate results from copy
90 * operations to and from address spaces.
92 * Since the information managed by this module is
93 * also stored by the logical address mapping module,
94 * this module may throw away valid virtual-to-physical
95 * mappings at almost any time. However, invalidations
96 * of virtual-to-physical mappings must be done as
99 * In order to cope with hardware architectures which
100 * make virtual-to-physical map invalidates expensive,
101 * this module may delay invalidate or reduced protection
102 * operations until such time as they are actually
103 * necessary. This module is given full information as
104 * to which processors are currently using which maps,
105 * and to when physical maps must be made correct.
108 #include "opt_msgbuf.h"
109 #include "opt_pmap.h"
111 #include <sys/param.h>
112 #include <sys/systm.h>
113 #include <sys/kernel.h>
114 #include <sys/lock.h>
115 #include <sys/malloc.h>
116 #include <sys/mman.h>
117 #include <sys/msgbuf.h>
118 #include <sys/mutex.h>
119 #include <sys/proc.h>
121 #include <sys/vmmeter.h>
122 #include <sys/sched.h>
123 #include <sys/sysctl.h>
129 #include <vm/vm_param.h>
130 #include <vm/vm_kern.h>
131 #include <vm/vm_page.h>
132 #include <vm/vm_map.h>
133 #include <vm/vm_object.h>
134 #include <vm/vm_extern.h>
135 #include <vm/vm_pageout.h>
136 #include <vm/vm_pager.h>
139 #include <machine/cpu.h>
140 #include <machine/cputypes.h>
141 #include <machine/md_var.h>
142 #include <machine/pcb.h>
143 #include <machine/specialreg.h>
145 #include <machine/smp.h>
148 #ifndef PMAP_SHPGPERPROC
149 #define PMAP_SHPGPERPROC 200
152 #if defined(DIAGNOSTIC)
153 #define PMAP_DIAGNOSTIC
156 #if !defined(PMAP_DIAGNOSTIC)
157 #define PMAP_INLINE __inline
164 #define PV_STAT(x) do { x ; } while (0)
166 #define PV_STAT(x) do { } while (0)
169 struct pmap kernel_pmap_store;
171 vm_paddr_t avail_start; /* PA of first available physical page */
172 vm_paddr_t avail_end; /* PA of last available physical page */
173 vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */
174 vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
178 static vm_paddr_t dmaplimit;
179 vm_offset_t kernel_vm_end;
182 static u_int64_t KPTphys; /* phys addr of kernel level 1 */
183 static u_int64_t KPDphys; /* phys addr of kernel level 2 */
184 u_int64_t KPDPphys; /* phys addr of kernel level 3 */
185 u_int64_t KPML4phys; /* phys addr of kernel level 4 */
187 static u_int64_t DMPDphys; /* phys addr of direct mapped level 2 */
188 static u_int64_t DMPDPphys; /* phys addr of direct mapped level 3 */
191 * Data for the pv entry allocation mechanism
193 static int pv_entry_count = 0, pv_entry_max = 0, pv_entry_high_water = 0;
194 static int shpgperproc = PMAP_SHPGPERPROC;
197 * All those kernel PT submaps that BSD is so fond of
199 pt_entry_t *CMAP1 = 0;
201 struct msgbuf *msgbufp = 0;
206 static caddr_t crashdumpmap;
208 static void free_pv_entry(pmap_t pmap, pv_entry_t pv);
209 static pv_entry_t get_pv_entry(pmap_t locked_pmap, int try);
210 static void pmap_clear_ptes(vm_page_t m, long bit);
212 static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va,
213 vm_page_t m, vm_prot_t prot, vm_page_t mpte);
214 static int pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq,
215 vm_offset_t sva, pd_entry_t ptepde);
216 static void pmap_remove_page(pmap_t pmap, vm_offset_t va, pd_entry_t *pde);
217 static void pmap_remove_entry(struct pmap *pmap, vm_page_t m,
219 static void pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m);
220 static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va,
223 static vm_page_t pmap_allocpde(pmap_t pmap, vm_offset_t va, int flags);
224 static vm_page_t pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags);
226 static vm_page_t _pmap_allocpte(pmap_t pmap, vm_pindex_t ptepindex, int flags);
227 static int _pmap_unwire_pte_hold(pmap_t pmap, vm_offset_t va, vm_page_t m);
228 static int pmap_unuse_pt(pmap_t, vm_offset_t, pd_entry_t);
229 static vm_offset_t pmap_kmem_choose(vm_offset_t addr);
231 CTASSERT(1 << PDESHIFT == sizeof(pd_entry_t));
232 CTASSERT(1 << PTESHIFT == sizeof(pt_entry_t));
235 * Move the kernel virtual free pointer to the next
236 * 2MB. This is used to help improve performance
237 * by using a large (2MB) page for much of the kernel
238 * (.text, .data, .bss)
241 pmap_kmem_choose(vm_offset_t addr)
243 vm_offset_t newaddr = addr;
245 newaddr = (addr + (NBPDR - 1)) & ~(NBPDR - 1);
249 /********************/
250 /* Inline functions */
251 /********************/
253 /* Return a non-clipped PD index for a given VA */
254 static __inline vm_pindex_t
255 pmap_pde_pindex(vm_offset_t va)
257 return va >> PDRSHIFT;
261 /* Return various clipped indexes for a given VA */
262 static __inline vm_pindex_t
263 pmap_pte_index(vm_offset_t va)
266 return ((va >> PAGE_SHIFT) & ((1ul << NPTEPGSHIFT) - 1));
269 static __inline vm_pindex_t
270 pmap_pde_index(vm_offset_t va)
273 return ((va >> PDRSHIFT) & ((1ul << NPDEPGSHIFT) - 1));
276 static __inline vm_pindex_t
277 pmap_pdpe_index(vm_offset_t va)
280 return ((va >> PDPSHIFT) & ((1ul << NPDPEPGSHIFT) - 1));
283 static __inline vm_pindex_t
284 pmap_pml4e_index(vm_offset_t va)
287 return ((va >> PML4SHIFT) & ((1ul << NPML4EPGSHIFT) - 1));
290 /* Return a pointer to the PML4 slot that corresponds to a VA */
291 static __inline pml4_entry_t *
292 pmap_pml4e(pmap_t pmap, vm_offset_t va)
297 return (&pmap->pm_pml4[pmap_pml4e_index(va)]);
300 /* Return a pointer to the PDP slot that corresponds to a VA */
301 static __inline pdp_entry_t *
302 pmap_pml4e_to_pdpe(pml4_entry_t *pml4e, vm_offset_t va)
306 pdpe = (pdp_entry_t *)PHYS_TO_DMAP(*pml4e & PG_FRAME);
307 return (&pdpe[pmap_pdpe_index(va)]);
310 /* Return a pointer to the PDP slot that corresponds to a VA */
311 static __inline pdp_entry_t *
312 pmap_pdpe(pmap_t pmap, vm_offset_t va)
316 pml4e = pmap_pml4e(pmap, va);
317 if (pml4e == NULL || (*pml4e & PG_V) == 0)
319 return (pmap_pml4e_to_pdpe(pml4e, va));
322 /* Return a pointer to the PD slot that corresponds to a VA */
323 static __inline pd_entry_t *
324 pmap_pdpe_to_pde(pdp_entry_t *pdpe, vm_offset_t va)
328 pde = (pd_entry_t *)PHYS_TO_DMAP(*pdpe & PG_FRAME);
329 return (&pde[pmap_pde_index(va)]);
332 /* Return a pointer to the PD slot that corresponds to a VA */
333 static __inline pd_entry_t *
334 pmap_pde(pmap_t pmap, vm_offset_t va)
338 pdpe = pmap_pdpe(pmap, va);
339 if (pdpe == NULL || (*pdpe & PG_V) == 0)
341 return (pmap_pdpe_to_pde(pdpe, va));
344 /* Return a pointer to the PT slot that corresponds to a VA */
345 static __inline pt_entry_t *
346 pmap_pde_to_pte(pd_entry_t *pde, vm_offset_t va)
350 pte = (pt_entry_t *)PHYS_TO_DMAP(*pde & PG_FRAME);
351 return (&pte[pmap_pte_index(va)]);
354 /* Return a pointer to the PT slot that corresponds to a VA */
355 static __inline pt_entry_t *
356 pmap_pte(pmap_t pmap, vm_offset_t va)
360 pde = pmap_pde(pmap, va);
361 if (pde == NULL || (*pde & PG_V) == 0)
363 if ((*pde & PG_PS) != 0) /* compat with i386 pmap_pte() */
364 return ((pt_entry_t *)pde);
365 return (pmap_pde_to_pte(pde, va));
369 static __inline pt_entry_t *
370 pmap_pte_pde(pmap_t pmap, vm_offset_t va, pd_entry_t *ptepde)
374 pde = pmap_pde(pmap, va);
375 if (pde == NULL || (*pde & PG_V) == 0)
378 if ((*pde & PG_PS) != 0) /* compat with i386 pmap_pte() */
379 return ((pt_entry_t *)pde);
380 return (pmap_pde_to_pte(pde, va));
384 PMAP_INLINE pt_entry_t *
385 vtopte(vm_offset_t va)
387 u_int64_t mask = ((1ul << (NPTEPGSHIFT + NPDEPGSHIFT + NPDPEPGSHIFT + NPML4EPGSHIFT)) - 1);
389 return (PTmap + ((va >> PAGE_SHIFT) & mask));
392 static __inline pd_entry_t *
393 vtopde(vm_offset_t va)
395 u_int64_t mask = ((1ul << (NPDEPGSHIFT + NPDPEPGSHIFT + NPML4EPGSHIFT)) - 1);
397 return (PDmap + ((va >> PDRSHIFT) & mask));
406 bzero((void *)ret, n * PAGE_SIZE);
407 avail_start += n * PAGE_SIZE;
412 create_pagetables(void)
417 KPTphys = allocpages(NKPT);
418 KPML4phys = allocpages(1);
419 KPDPphys = allocpages(NKPML4E);
420 KPDphys = allocpages(NKPDPE);
422 ndmpdp = (ptoa(Maxmem) + NBPDP - 1) >> PDPSHIFT;
423 if (ndmpdp < 4) /* Minimum 4GB of dirmap */
425 DMPDPphys = allocpages(NDMPML4E);
426 DMPDphys = allocpages(ndmpdp);
427 dmaplimit = (vm_paddr_t)ndmpdp << PDPSHIFT;
429 /* Fill in the underlying page table pages */
430 /* Read-only from zero to physfree */
431 /* XXX not fully used, underneath 2M pages */
432 for (i = 0; (i << PAGE_SHIFT) < avail_start; i++) {
433 ((pt_entry_t *)KPTphys)[i] = i << PAGE_SHIFT;
434 ((pt_entry_t *)KPTphys)[i] |= PG_RW | PG_V | PG_G;
437 /* Now map the page tables at their location within PTmap */
438 for (i = 0; i < NKPT; i++) {
439 ((pd_entry_t *)KPDphys)[i] = KPTphys + (i << PAGE_SHIFT);
440 ((pd_entry_t *)KPDphys)[i] |= PG_RW | PG_V;
443 /* Map from zero to end of allocations under 2M pages */
444 /* This replaces some of the KPTphys entries above */
445 for (i = 0; (i << PDRSHIFT) < avail_start; i++) {
446 ((pd_entry_t *)KPDphys)[i] = i << PDRSHIFT;
447 ((pd_entry_t *)KPDphys)[i] |= PG_RW | PG_V | PG_PS | PG_G;
450 /* And connect up the PD to the PDP */
451 for (i = 0; i < NKPDPE; i++) {
452 ((pdp_entry_t *)KPDPphys)[i + KPDPI] = KPDphys + (i << PAGE_SHIFT);
453 ((pdp_entry_t *)KPDPphys)[i + KPDPI] |= PG_RW | PG_V | PG_U;
457 /* Now set up the direct map space using 2MB pages */
458 for (i = 0; i < NPDEPG * ndmpdp; i++) {
459 ((pd_entry_t *)DMPDphys)[i] = (vm_paddr_t)i << PDRSHIFT;
460 ((pd_entry_t *)DMPDphys)[i] |= PG_RW | PG_V | PG_PS | PG_G;
463 /* And the direct map space's PDP */
464 for (i = 0; i < ndmpdp; i++) {
465 ((pdp_entry_t *)DMPDPphys)[i] = DMPDphys + (i << PAGE_SHIFT);
466 ((pdp_entry_t *)DMPDPphys)[i] |= PG_RW | PG_V | PG_U;
469 /* And recursively map PML4 to itself in order to get PTmap */
470 ((pdp_entry_t *)KPML4phys)[PML4PML4I] = KPML4phys;
471 ((pdp_entry_t *)KPML4phys)[PML4PML4I] |= PG_RW | PG_V | PG_U;
473 /* Connect the Direct Map slot up to the PML4 */
474 ((pdp_entry_t *)KPML4phys)[DMPML4I] = DMPDPphys;
475 ((pdp_entry_t *)KPML4phys)[DMPML4I] |= PG_RW | PG_V | PG_U;
477 /* Connect the KVA slot up to the PML4 */
478 ((pdp_entry_t *)KPML4phys)[KPML4I] = KPDPphys;
479 ((pdp_entry_t *)KPML4phys)[KPML4I] |= PG_RW | PG_V | PG_U;
483 * Bootstrap the system enough to run with virtual memory.
485 * On amd64 this is called after mapping has already been enabled
486 * and just syncs the pmap module with what has already been done.
487 * [We can't call it easily with mapping off since the kernel is not
488 * mapped with PA == VA, hence we would have to relocate every address
489 * from the linked base (virtual) address "KERNBASE" to the actual
490 * (physical) address starting relative to 0]
493 pmap_bootstrap(vm_paddr_t *firstaddr)
496 pt_entry_t *pte, *unused;
498 avail_start = *firstaddr;
501 * Create an initial set of page tables to run the kernel in.
504 *firstaddr = avail_start;
506 virtual_avail = (vm_offset_t) KERNBASE + avail_start;
507 virtual_avail = pmap_kmem_choose(virtual_avail);
509 virtual_end = VM_MAX_KERNEL_ADDRESS;
512 /* XXX do %cr0 as well */
513 load_cr4(rcr4() | CR4_PGE | CR4_PSE);
517 * Initialize the kernel pmap (which is statically allocated).
519 PMAP_LOCK_INIT(kernel_pmap);
520 kernel_pmap->pm_pml4 = (pdp_entry_t *) (KERNBASE + KPML4phys);
521 kernel_pmap->pm_active = -1; /* don't allow deactivation */
522 TAILQ_INIT(&kernel_pmap->pm_pvchunk);
526 * Reserve some special page table entries/VA space for temporary
529 #define SYSMAP(c, p, v, n) \
530 v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n);
536 * CMAP1 is only used for the memory test.
538 SYSMAP(caddr_t, CMAP1, CADDR1, 1)
543 SYSMAP(caddr_t, unused, crashdumpmap, MAXDUMPPGS)
546 * msgbufp is used to map the system message buffer.
548 SYSMAP(struct msgbuf *, unused, msgbufp, atop(round_page(MSGBUF_SIZE)))
556 /* Initialize the PAT MSR. */
568 /* Bail if this CPU doesn't implement PAT. */
569 if (!(cpu_feature & CPUID_PAT))
574 * Leave the indices 0-3 at the default of WB, WT, UC, and UC-.
575 * Program 4 and 5 as WP and WC.
576 * Leave 6 and 7 as UC and UC-.
578 pat_msr = rdmsr(MSR_PAT);
579 pat_msr &= ~(PAT_MASK(4) | PAT_MASK(5));
580 pat_msr |= PAT_VALUE(4, PAT_WRITE_PROTECTED) |
581 PAT_VALUE(5, PAT_WRITE_COMBINING);
584 * Due to some Intel errata, we can only safely use the lower 4
585 * PAT entries. Thus, just replace PAT Index 2 with WC instead
588 * Intel Pentium III Processor Specification Update
589 * Errata E.27 (Upper Four PAT Entries Not Usable With Mode B
592 * Intel Pentium IV Processor Specification Update
593 * Errata N46 (PAT Index MSB May Be Calculated Incorrectly)
595 pat_msr = rdmsr(MSR_PAT);
596 pat_msr &= ~PAT_MASK(2);
597 pat_msr |= PAT_VALUE(2, PAT_WRITE_COMBINING);
599 wrmsr(MSR_PAT, pat_msr);
603 * Initialize a vm_page's machine-dependent fields.
606 pmap_page_init(vm_page_t m)
609 TAILQ_INIT(&m->md.pv_list);
610 m->md.pv_list_count = 0;
614 * Initialize the pmap module.
615 * Called by vm_init, to initialize any structures that the pmap
616 * system needs to map virtual memory.
623 * Initialize the address space (zone) for the pv entries. Set a
624 * high water mark so that the system can recover from excessive
625 * numbers of pv entries.
627 TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc);
628 pv_entry_max = shpgperproc * maxproc + cnt.v_page_count;
629 TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max);
630 pv_entry_high_water = 9 * (pv_entry_max / 10);
633 SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0, "VM/pmap parameters");
635 pmap_pventry_proc(SYSCTL_HANDLER_ARGS)
639 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, req);
640 if (error == 0 && req->newptr) {
641 shpgperproc = (pv_entry_max - cnt.v_page_count) / maxproc;
642 pv_entry_high_water = 9 * (pv_entry_max / 10);
646 SYSCTL_PROC(_vm_pmap, OID_AUTO, pv_entry_max, CTLTYPE_INT|CTLFLAG_RW,
647 &pv_entry_max, 0, pmap_pventry_proc, "IU", "Max number of PV entries");
650 pmap_shpgperproc_proc(SYSCTL_HANDLER_ARGS)
654 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, req);
655 if (error == 0 && req->newptr) {
656 pv_entry_max = shpgperproc * maxproc + cnt.v_page_count;
657 pv_entry_high_water = 9 * (pv_entry_max / 10);
661 SYSCTL_PROC(_vm_pmap, OID_AUTO, shpgperproc, CTLTYPE_INT|CTLFLAG_RW,
662 &shpgperproc, 0, pmap_shpgperproc_proc, "IU", "Page share factor per proc");
665 /***************************************************
666 * Low level helper routines.....
667 ***************************************************/
671 * For SMP, these functions have to use the IPI mechanism for coherence.
674 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
680 if (!(read_rflags() & PSL_I))
681 panic("%s: interrupts disabled", __func__);
682 mtx_lock_spin(&smp_ipi_mtx);
686 * We need to disable interrupt preemption but MUST NOT have
687 * interrupts disabled here.
688 * XXX we may need to hold schedlock to get a coherent pm_active
689 * XXX critical sections disable interrupts again
691 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) {
695 cpumask = PCPU_GET(cpumask);
696 other_cpus = PCPU_GET(other_cpus);
697 if (pmap->pm_active & cpumask)
699 if (pmap->pm_active & other_cpus)
700 smp_masked_invlpg(pmap->pm_active & other_cpus, va);
703 mtx_unlock_spin(&smp_ipi_mtx);
709 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
716 if (!(read_rflags() & PSL_I))
717 panic("%s: interrupts disabled", __func__);
718 mtx_lock_spin(&smp_ipi_mtx);
722 * We need to disable interrupt preemption but MUST NOT have
723 * interrupts disabled here.
724 * XXX we may need to hold schedlock to get a coherent pm_active
725 * XXX critical sections disable interrupts again
727 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) {
728 for (addr = sva; addr < eva; addr += PAGE_SIZE)
730 smp_invlpg_range(sva, eva);
732 cpumask = PCPU_GET(cpumask);
733 other_cpus = PCPU_GET(other_cpus);
734 if (pmap->pm_active & cpumask)
735 for (addr = sva; addr < eva; addr += PAGE_SIZE)
737 if (pmap->pm_active & other_cpus)
738 smp_masked_invlpg_range(pmap->pm_active & other_cpus,
742 mtx_unlock_spin(&smp_ipi_mtx);
748 pmap_invalidate_all(pmap_t pmap)
754 if (!(read_rflags() & PSL_I))
755 panic("%s: interrupts disabled", __func__);
756 mtx_lock_spin(&smp_ipi_mtx);
760 * We need to disable interrupt preemption but MUST NOT have
761 * interrupts disabled here.
762 * XXX we may need to hold schedlock to get a coherent pm_active
763 * XXX critical sections disable interrupts again
765 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) {
769 cpumask = PCPU_GET(cpumask);
770 other_cpus = PCPU_GET(other_cpus);
771 if (pmap->pm_active & cpumask)
773 if (pmap->pm_active & other_cpus)
774 smp_masked_invltlb(pmap->pm_active & other_cpus);
777 mtx_unlock_spin(&smp_ipi_mtx);
783 pmap_invalidate_cache(void)
787 if (!(read_rflags() & PSL_I))
788 panic("%s: interrupts disabled", __func__);
789 mtx_lock_spin(&smp_ipi_mtx);
793 * We need to disable interrupt preemption but MUST NOT have
794 * interrupts disabled here.
795 * XXX we may need to hold schedlock to get a coherent pm_active
796 * XXX critical sections disable interrupts again
801 mtx_unlock_spin(&smp_ipi_mtx);
807 * Normal, non-SMP, invalidation functions.
808 * We inline these within pmap.c for speed.
811 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
814 if (pmap == kernel_pmap || pmap->pm_active)
819 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
823 if (pmap == kernel_pmap || pmap->pm_active)
824 for (addr = sva; addr < eva; addr += PAGE_SIZE)
829 pmap_invalidate_all(pmap_t pmap)
832 if (pmap == kernel_pmap || pmap->pm_active)
837 pmap_invalidate_cache(void)
845 * Are we current address space or kernel?
848 pmap_is_current(pmap_t pmap)
850 return (pmap == kernel_pmap ||
851 (pmap->pm_pml4[PML4PML4I] & PG_FRAME) == (PML4pml4e[0] & PG_FRAME));
855 * Routine: pmap_extract
857 * Extract the physical page address associated
858 * with the given map/virtual_address pair.
861 pmap_extract(pmap_t pmap, vm_offset_t va)
865 pd_entry_t pde, *pdep;
869 pdep = pmap_pde(pmap, va);
873 if ((pde & PG_PS) != 0) {
874 KASSERT((pde & PG_FRAME & PDRMASK) == 0,
875 ("pmap_extract: bad pde"));
876 rtval = (pde & PG_FRAME) | (va & PDRMASK);
880 pte = pmap_pde_to_pte(pdep, va);
881 rtval = (*pte & PG_FRAME) | (va & PAGE_MASK);
889 * Routine: pmap_extract_and_hold
891 * Atomically extract and hold the physical page
892 * with the given pmap and virtual address pair
893 * if that mapping permits the given protection.
896 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
898 pd_entry_t pde, *pdep;
903 vm_page_lock_queues();
905 pdep = pmap_pde(pmap, va);
906 if (pdep != NULL && (pde = *pdep)) {
908 if ((pde & PG_RW) || (prot & VM_PROT_WRITE) == 0) {
909 KASSERT((pde & PG_FRAME & PDRMASK) == 0,
910 ("pmap_extract_and_hold: bad pde"));
911 m = PHYS_TO_VM_PAGE((pde & PG_FRAME) |
916 pte = *pmap_pde_to_pte(pdep, va);
918 ((pte & PG_RW) || (prot & VM_PROT_WRITE) == 0)) {
919 m = PHYS_TO_VM_PAGE(pte & PG_FRAME);
924 vm_page_unlock_queues();
930 pmap_kextract(vm_offset_t va)
935 if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS) {
936 pa = DMAP_TO_PHYS(va);
940 pa = (*pde & ~(NBPDR - 1)) | (va & (NBPDR - 1));
943 pa = (pa & PG_FRAME) | (va & PAGE_MASK);
949 /***************************************************
950 * Low level mapping routines.....
951 ***************************************************/
954 * Add a wired page to the kva.
955 * Note: not SMP coherent.
958 pmap_kenter(vm_offset_t va, vm_paddr_t pa)
963 pte_store(pte, pa | PG_RW | PG_V | PG_G);
967 * Remove a page from the kernel pagetables.
968 * Note: not SMP coherent.
971 pmap_kremove(vm_offset_t va)
980 * Used to map a range of physical addresses into kernel
981 * virtual address space.
983 * The value passed in '*virt' is a suggested virtual address for
984 * the mapping. Architectures which can support a direct-mapped
985 * physical to virtual region can return the appropriate address
986 * within that region, leaving '*virt' unchanged. Other
987 * architectures should map the pages starting at '*virt' and
988 * update '*virt' with the first usable address after the mapped
992 pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
994 return PHYS_TO_DMAP(start);
999 * Add a list of wired pages to the kva
1000 * this routine is only used for temporary
1001 * kernel mappings that do not need to have
1002 * page modification or references recorded.
1003 * Note that old mappings are simply written
1004 * over. The page *must* be wired.
1005 * Note: SMP coherent. Uses a ranged shootdown IPI.
1008 pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count)
1010 pt_entry_t *endpte, oldpte, *pte;
1014 endpte = pte + count;
1015 while (pte < endpte) {
1017 pte_store(pte, VM_PAGE_TO_PHYS(*ma) | PG_G | PG_RW | PG_V);
1021 if ((oldpte & PG_V) != 0)
1022 pmap_invalidate_range(kernel_pmap, sva, sva + count *
1027 * This routine tears out page mappings from the
1028 * kernel -- it is meant only for temporary mappings.
1029 * Note: SMP coherent. Uses a ranged shootdown IPI.
1032 pmap_qremove(vm_offset_t sva, int count)
1037 while (count-- > 0) {
1041 pmap_invalidate_range(kernel_pmap, sva, va);
1044 /***************************************************
1045 * Page table page management routines.....
1046 ***************************************************/
1049 * This routine unholds page table pages, and if the hold count
1050 * drops to zero, then it decrements the wire count.
1052 static PMAP_INLINE int
1053 pmap_unwire_pte_hold(pmap_t pmap, vm_offset_t va, vm_page_t m)
1057 if (m->wire_count == 0)
1058 return _pmap_unwire_pte_hold(pmap, va, m);
1064 _pmap_unwire_pte_hold(pmap_t pmap, vm_offset_t va, vm_page_t m)
1069 * unmap the page table page
1071 if (m->pindex >= (NUPDE + NUPDPE)) {
1074 pml4 = pmap_pml4e(pmap, va);
1075 pteva = (vm_offset_t) PDPmap + amd64_ptob(m->pindex - (NUPDE + NUPDPE));
1077 } else if (m->pindex >= NUPDE) {
1080 pdp = pmap_pdpe(pmap, va);
1081 pteva = (vm_offset_t) PDmap + amd64_ptob(m->pindex - NUPDE);
1086 pd = pmap_pde(pmap, va);
1087 pteva = (vm_offset_t) PTmap + amd64_ptob(m->pindex);
1090 --pmap->pm_stats.resident_count;
1091 if (m->pindex < NUPDE) {
1092 /* We just released a PT, unhold the matching PD */
1095 pdpg = PHYS_TO_VM_PAGE(*pmap_pdpe(pmap, va) & PG_FRAME);
1096 pmap_unwire_pte_hold(pmap, va, pdpg);
1098 if (m->pindex >= NUPDE && m->pindex < (NUPDE + NUPDPE)) {
1099 /* We just released a PD, unhold the matching PDP */
1102 pdppg = PHYS_TO_VM_PAGE(*pmap_pml4e(pmap, va) & PG_FRAME);
1103 pmap_unwire_pte_hold(pmap, va, pdppg);
1107 * Do an invltlb to make the invalidated mapping
1108 * take effect immediately.
1110 pmap_invalidate_page(pmap, pteva);
1112 vm_page_free_zero(m);
1113 atomic_subtract_int(&cnt.v_wire_count, 1);
1118 * After removing a page table entry, this routine is used to
1119 * conditionally free the page, and manage the hold/wire counts.
1122 pmap_unuse_pt(pmap_t pmap, vm_offset_t va, pd_entry_t ptepde)
1126 if (va >= VM_MAXUSER_ADDRESS)
1128 KASSERT(ptepde != 0, ("pmap_unuse_pt: ptepde != 0"));
1129 mpte = PHYS_TO_VM_PAGE(ptepde & PG_FRAME);
1130 return pmap_unwire_pte_hold(pmap, va, mpte);
1134 pmap_pinit0(pmap_t pmap)
1137 PMAP_LOCK_INIT(pmap);
1138 pmap->pm_pml4 = (pml4_entry_t *)(KERNBASE + KPML4phys);
1139 pmap->pm_active = 0;
1140 TAILQ_INIT(&pmap->pm_pvchunk);
1141 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
1145 * Initialize a preallocated and zeroed pmap structure,
1146 * such as one in a vmspace structure.
1149 pmap_pinit(pmap_t pmap)
1152 static vm_pindex_t color;
1154 PMAP_LOCK_INIT(pmap);
1157 * allocate the page directory page
1159 while ((pml4pg = vm_page_alloc(NULL, color++, VM_ALLOC_NOOBJ |
1160 VM_ALLOC_NORMAL | VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL)
1163 pmap->pm_pml4 = (pml4_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(pml4pg));
1165 if ((pml4pg->flags & PG_ZERO) == 0)
1166 pagezero(pmap->pm_pml4);
1168 /* Wire in kernel global address entries. */
1169 pmap->pm_pml4[KPML4I] = KPDPphys | PG_RW | PG_V | PG_U;
1170 pmap->pm_pml4[DMPML4I] = DMPDPphys | PG_RW | PG_V | PG_U;
1172 /* install self-referential address mapping entry(s) */
1173 pmap->pm_pml4[PML4PML4I] = VM_PAGE_TO_PHYS(pml4pg) | PG_V | PG_RW | PG_A | PG_M;
1175 pmap->pm_active = 0;
1176 TAILQ_INIT(&pmap->pm_pvchunk);
1177 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
1181 * this routine is called if the page table page is not
1184 * Note: If a page allocation fails at page table level two or three,
1185 * one or two pages may be held during the wait, only to be released
1186 * afterwards. This conservative approach is easily argued to avoid
1190 _pmap_allocpte(pmap_t pmap, vm_pindex_t ptepindex, int flags)
1192 vm_page_t m, pdppg, pdpg;
1194 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT ||
1195 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK,
1196 ("_pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK"));
1199 * Allocate a page table page.
1201 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ |
1202 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) {
1203 if (flags & M_WAITOK) {
1205 vm_page_unlock_queues();
1207 vm_page_lock_queues();
1212 * Indicate the need to retry. While waiting, the page table
1213 * page may have been allocated.
1217 if ((m->flags & PG_ZERO) == 0)
1221 * Map the pagetable page into the process address space, if
1222 * it isn't already there.
1225 pmap->pm_stats.resident_count++;
1227 if (ptepindex >= (NUPDE + NUPDPE)) {
1229 vm_pindex_t pml4index;
1231 /* Wire up a new PDPE page */
1232 pml4index = ptepindex - (NUPDE + NUPDPE);
1233 pml4 = &pmap->pm_pml4[pml4index];
1234 *pml4 = VM_PAGE_TO_PHYS(m) | PG_U | PG_RW | PG_V | PG_A | PG_M;
1236 } else if (ptepindex >= NUPDE) {
1237 vm_pindex_t pml4index;
1238 vm_pindex_t pdpindex;
1242 /* Wire up a new PDE page */
1243 pdpindex = ptepindex - NUPDE;
1244 pml4index = pdpindex >> NPML4EPGSHIFT;
1246 pml4 = &pmap->pm_pml4[pml4index];
1247 if ((*pml4 & PG_V) == 0) {
1248 /* Have to allocate a new pdp, recurse */
1249 if (_pmap_allocpte(pmap, NUPDE + NUPDPE + pml4index,
1256 /* Add reference to pdp page */
1257 pdppg = PHYS_TO_VM_PAGE(*pml4 & PG_FRAME);
1258 pdppg->wire_count++;
1260 pdp = (pdp_entry_t *)PHYS_TO_DMAP(*pml4 & PG_FRAME);
1262 /* Now find the pdp page */
1263 pdp = &pdp[pdpindex & ((1ul << NPDPEPGSHIFT) - 1)];
1264 *pdp = VM_PAGE_TO_PHYS(m) | PG_U | PG_RW | PG_V | PG_A | PG_M;
1267 vm_pindex_t pml4index;
1268 vm_pindex_t pdpindex;
1273 /* Wire up a new PTE page */
1274 pdpindex = ptepindex >> NPDPEPGSHIFT;
1275 pml4index = pdpindex >> NPML4EPGSHIFT;
1277 /* First, find the pdp and check that its valid. */
1278 pml4 = &pmap->pm_pml4[pml4index];
1279 if ((*pml4 & PG_V) == 0) {
1280 /* Have to allocate a new pd, recurse */
1281 if (_pmap_allocpte(pmap, NUPDE + pdpindex,
1287 pdp = (pdp_entry_t *)PHYS_TO_DMAP(*pml4 & PG_FRAME);
1288 pdp = &pdp[pdpindex & ((1ul << NPDPEPGSHIFT) - 1)];
1290 pdp = (pdp_entry_t *)PHYS_TO_DMAP(*pml4 & PG_FRAME);
1291 pdp = &pdp[pdpindex & ((1ul << NPDPEPGSHIFT) - 1)];
1292 if ((*pdp & PG_V) == 0) {
1293 /* Have to allocate a new pd, recurse */
1294 if (_pmap_allocpte(pmap, NUPDE + pdpindex,
1301 /* Add reference to the pd page */
1302 pdpg = PHYS_TO_VM_PAGE(*pdp & PG_FRAME);
1306 pd = (pd_entry_t *)PHYS_TO_DMAP(*pdp & PG_FRAME);
1308 /* Now we know where the page directory page is */
1309 pd = &pd[ptepindex & ((1ul << NPDEPGSHIFT) - 1)];
1310 *pd = VM_PAGE_TO_PHYS(m) | PG_U | PG_RW | PG_V | PG_A | PG_M;
1317 pmap_allocpde(pmap_t pmap, vm_offset_t va, int flags)
1319 vm_pindex_t pdpindex, ptepindex;
1323 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT ||
1324 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK,
1325 ("pmap_allocpde: flags is neither M_NOWAIT nor M_WAITOK"));
1327 pdpe = pmap_pdpe(pmap, va);
1328 if (pdpe != NULL && (*pdpe & PG_V) != 0) {
1329 /* Add a reference to the pd page. */
1330 pdpg = PHYS_TO_VM_PAGE(*pdpe & PG_FRAME);
1333 /* Allocate a pd page. */
1334 ptepindex = pmap_pde_pindex(va);
1335 pdpindex = ptepindex >> NPDPEPGSHIFT;
1336 pdpg = _pmap_allocpte(pmap, NUPDE + pdpindex, flags);
1337 if (pdpg == NULL && (flags & M_WAITOK))
1344 pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags)
1346 vm_pindex_t ptepindex;
1350 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT ||
1351 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK,
1352 ("pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK"));
1355 * Calculate pagetable page index
1357 ptepindex = pmap_pde_pindex(va);
1360 * Get the page directory entry
1362 pd = pmap_pde(pmap, va);
1365 * This supports switching from a 2MB page to a
1368 if (pd != 0 && (*pd & (PG_PS | PG_V)) == (PG_PS | PG_V)) {
1371 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
1372 pmap_unuse_pt(pmap, va, *pmap_pdpe(pmap, va));
1373 pmap_invalidate_all(kernel_pmap);
1377 * If the page table page is mapped, we just increment the
1378 * hold count, and activate it.
1380 if (pd != 0 && (*pd & PG_V) != 0) {
1381 m = PHYS_TO_VM_PAGE(*pd & PG_FRAME);
1385 * Here if the pte page isn't mapped, or if it has been
1388 m = _pmap_allocpte(pmap, ptepindex, flags);
1389 if (m == NULL && (flags & M_WAITOK))
1396 /***************************************************
1397 * Pmap allocation/deallocation routines.
1398 ***************************************************/
1401 * Release any resources held by the given physical map.
1402 * Called when a pmap initialized by pmap_pinit is being released.
1403 * Should only be called if the map contains no valid mappings.
1406 pmap_release(pmap_t pmap)
1410 KASSERT(pmap->pm_stats.resident_count == 0,
1411 ("pmap_release: pmap resident count %ld != 0",
1412 pmap->pm_stats.resident_count));
1414 m = PHYS_TO_VM_PAGE(pmap->pm_pml4[PML4PML4I] & PG_FRAME);
1416 pmap->pm_pml4[KPML4I] = 0; /* KVA */
1417 pmap->pm_pml4[DMPML4I] = 0; /* Direct Map */
1418 pmap->pm_pml4[PML4PML4I] = 0; /* Recursive Mapping */
1420 vm_page_lock_queues();
1422 atomic_subtract_int(&cnt.v_wire_count, 1);
1423 vm_page_free_zero(m);
1424 vm_page_unlock_queues();
1425 PMAP_LOCK_DESTROY(pmap);
1429 kvm_size(SYSCTL_HANDLER_ARGS)
1431 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - KERNBASE;
1433 return sysctl_handle_long(oidp, &ksize, 0, req);
1435 SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD,
1436 0, 0, kvm_size, "LU", "Size of KVM");
1439 kvm_free(SYSCTL_HANDLER_ARGS)
1441 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end;
1443 return sysctl_handle_long(oidp, &kfree, 0, req);
1445 SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD,
1446 0, 0, kvm_free, "LU", "Amount of KVM free");
1449 * grow the number of kernel page table entries, if needed
1452 pmap_growkernel(vm_offset_t addr)
1456 pd_entry_t *pde, newpdir;
1459 mtx_assert(&kernel_map->system_mtx, MA_OWNED);
1460 if (kernel_vm_end == 0) {
1461 kernel_vm_end = KERNBASE;
1463 while ((*pmap_pde(kernel_pmap, kernel_vm_end) & PG_V) != 0) {
1464 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
1468 addr = roundup2(addr, PAGE_SIZE * NPTEPG);
1469 while (kernel_vm_end < addr) {
1470 pde = pmap_pde(kernel_pmap, kernel_vm_end);
1472 /* We need a new PDP entry */
1473 nkpg = vm_page_alloc(NULL, nkpt,
1474 VM_ALLOC_NOOBJ | VM_ALLOC_SYSTEM | VM_ALLOC_WIRED);
1476 panic("pmap_growkernel: no memory to grow kernel");
1477 pmap_zero_page(nkpg);
1478 paddr = VM_PAGE_TO_PHYS(nkpg);
1479 newpdp = (pdp_entry_t)
1480 (paddr | PG_V | PG_RW | PG_A | PG_M);
1481 *pmap_pdpe(kernel_pmap, kernel_vm_end) = newpdp;
1482 continue; /* try again */
1484 if ((*pde & PG_V) != 0) {
1485 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
1490 * This index is bogus, but out of the way
1492 nkpg = vm_page_alloc(NULL, nkpt,
1493 VM_ALLOC_NOOBJ | VM_ALLOC_SYSTEM | VM_ALLOC_WIRED);
1495 panic("pmap_growkernel: no memory to grow kernel");
1499 pmap_zero_page(nkpg);
1500 paddr = VM_PAGE_TO_PHYS(nkpg);
1501 newpdir = (pd_entry_t) (paddr | PG_V | PG_RW | PG_A | PG_M);
1502 *pmap_pde(kernel_pmap, kernel_vm_end) = newpdir;
1504 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
1509 /***************************************************
1510 * page management routines.
1511 ***************************************************/
1513 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
1514 CTASSERT(_NPCM == 3);
1515 CTASSERT(_NPCPV == 168);
1517 static __inline struct pv_chunk *
1518 pv_to_chunk(pv_entry_t pv)
1521 return (struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK);
1524 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
1526 #define PC_FREE0 0xfffffffffffffffful
1527 #define PC_FREE1 0xfffffffffffffffful
1528 #define PC_FREE2 0x000000fffffffffful
1530 static uint64_t pc_freemask[3] = { PC_FREE0, PC_FREE1, PC_FREE2 };
1532 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
1533 "Current number of pv entries");
1536 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
1538 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
1539 "Current number of pv entry chunks");
1540 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
1541 "Current number of pv entry chunks allocated");
1542 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
1543 "Current number of pv entry chunks frees");
1544 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
1545 "Number of times tried to get a chunk page but failed.");
1547 static long pv_entry_frees, pv_entry_allocs;
1548 static int pv_entry_spare;
1550 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
1551 "Current number of pv entry frees");
1552 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
1553 "Current number of pv entry allocs");
1554 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
1555 "Current number of spare pv entries");
1557 static int pmap_collect_inactive, pmap_collect_active;
1559 SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_inactive, CTLFLAG_RD, &pmap_collect_inactive, 0,
1560 "Current number times pmap_collect called on inactive queue");
1561 SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_active, CTLFLAG_RD, &pmap_collect_active, 0,
1562 "Current number times pmap_collect called on active queue");
1566 * We are in a serious low memory condition. Resort to
1567 * drastic measures to free some pages so we can allocate
1568 * another pv entry chunk. This is normally called to
1569 * unmap inactive pages, and if necessary, active pages.
1572 pmap_collect(pmap_t locked_pmap, struct vpgqueues *vpq)
1576 pt_entry_t *pte, tpte;
1577 pv_entry_t next_pv, pv;
1581 TAILQ_FOREACH(m, &vpq->pl, pageq) {
1582 if (m->hold_count || m->busy || (m->flags & PG_BUSY))
1584 TAILQ_FOREACH_SAFE(pv, &m->md.pv_list, pv_list, next_pv) {
1587 /* Avoid deadlock and lock recursion. */
1588 if (pmap > locked_pmap)
1590 else if (pmap != locked_pmap && !PMAP_TRYLOCK(pmap))
1592 pmap->pm_stats.resident_count--;
1593 pte = pmap_pte_pde(pmap, va, &ptepde);
1594 tpte = pte_load_clear(pte);
1595 KASSERT((tpte & PG_W) == 0,
1596 ("pmap_collect: wired pte %#lx", tpte));
1598 vm_page_flag_set(m, PG_REFERENCED);
1600 KASSERT((tpte & PG_RW),
1601 ("pmap_collect: modified page not writable: va: %#lx, pte: %#lx",
1605 pmap_invalidate_page(pmap, va);
1606 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
1607 if (TAILQ_EMPTY(&m->md.pv_list))
1608 vm_page_flag_clear(m, PG_WRITEABLE);
1609 m->md.pv_list_count--;
1610 pmap_unuse_pt(pmap, va, ptepde);
1611 free_pv_entry(pmap, pv);
1612 if (pmap != locked_pmap)
1620 * free the pv_entry back to the free list
1623 free_pv_entry(pmap_t pmap, pv_entry_t pv)
1626 struct pv_chunk *pc;
1627 int idx, field, bit;
1629 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
1630 PV_STAT(pv_entry_frees++);
1631 PV_STAT(pv_entry_spare++);
1633 pc = pv_to_chunk(pv);
1634 idx = pv - &pc->pc_pventry[0];
1637 pc->pc_map[field] |= 1ul << bit;
1638 /* move to head of list */
1639 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1640 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1641 if (pc->pc_map[0] != PC_FREE0 || pc->pc_map[1] != PC_FREE1 ||
1642 pc->pc_map[2] != PC_FREE2)
1644 PV_STAT(pv_entry_spare -= _NPCPV);
1645 PV_STAT(pc_chunk_count--);
1646 PV_STAT(pc_chunk_frees++);
1647 /* entire chunk is free, return it */
1648 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1649 m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pc));
1650 dump_drop_page(m->phys_addr);
1655 * get a new pv_entry, allocating a block from the system
1659 get_pv_entry(pmap_t pmap, int try)
1661 static const struct timeval printinterval = { 60, 0 };
1662 static struct timeval lastprint;
1663 static vm_pindex_t colour;
1664 int bit, field, page_req;
1666 struct pv_chunk *pc;
1669 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1670 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
1671 PV_STAT(pv_entry_allocs++);
1673 if (pv_entry_count > pv_entry_high_water)
1674 pagedaemon_wakeup();
1675 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
1677 for (field = 0; field < _NPCM; field++) {
1678 if (pc->pc_map[field]) {
1679 bit = bsfq(pc->pc_map[field]);
1683 if (field < _NPCM) {
1684 pv = &pc->pc_pventry[field * 64 + bit];
1685 pc->pc_map[field] &= ~(1ul << bit);
1686 /* If this was the last item, move it to tail */
1687 if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 &&
1688 pc->pc_map[2] == 0) {
1689 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1690 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
1692 PV_STAT(pv_entry_spare--);
1696 /* No free items, allocate another chunk */
1697 page_req = try ? VM_ALLOC_NORMAL : VM_ALLOC_SYSTEM;
1698 m = vm_page_alloc(NULL, colour, page_req | VM_ALLOC_NOOBJ);
1702 PV_STAT(pc_chunk_tryfail++);
1706 * Reclaim pv entries: At first, destroy mappings to inactive
1707 * pages. After that, if a pv chunk entry is still needed,
1708 * destroy mappings to active pages.
1710 if (ratecheck(&lastprint, &printinterval))
1711 printf("Approaching the limit on PV entries, consider "
1712 "increasing sysctl vm.pmap.shpgperproc or "
1713 "vm.pmap.pv_entry_max\n");
1714 PV_STAT(pmap_collect_inactive++);
1715 pmap_collect(pmap, &vm_page_queues[PQ_INACTIVE]);
1716 m = vm_page_alloc(NULL, colour,
1717 VM_ALLOC_SYSTEM | VM_ALLOC_NOOBJ);
1719 PV_STAT(pmap_collect_active++);
1720 pmap_collect(pmap, &vm_page_queues[PQ_ACTIVE]);
1721 m = vm_page_alloc(NULL, colour,
1722 VM_ALLOC_SYSTEM | VM_ALLOC_NOOBJ);
1724 panic("get_pv_entry: increase vm.pmap.shpgperproc");
1727 PV_STAT(pc_chunk_count++);
1728 PV_STAT(pc_chunk_allocs++);
1730 dump_add_page(m->phys_addr);
1731 pc = (void *)PHYS_TO_DMAP(m->phys_addr);
1733 pc->pc_map[0] = PC_FREE0 & ~1ul; /* preallocated bit 0 */
1734 pc->pc_map[1] = PC_FREE1;
1735 pc->pc_map[2] = PC_FREE2;
1736 pv = &pc->pc_pventry[0];
1737 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1738 PV_STAT(pv_entry_spare += _NPCPV - 1);
1743 pmap_remove_entry(pmap_t pmap, vm_page_t m, vm_offset_t va)
1747 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1748 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
1749 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
1750 if (pmap == PV_PMAP(pv) && va == pv->pv_va)
1753 KASSERT(pv != NULL, ("pmap_remove_entry: pv not found"));
1754 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
1755 m->md.pv_list_count--;
1756 if (TAILQ_EMPTY(&m->md.pv_list))
1757 vm_page_flag_clear(m, PG_WRITEABLE);
1758 free_pv_entry(pmap, pv);
1762 * Create a pv entry for page at pa for
1766 pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m)
1770 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1771 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
1772 pv = get_pv_entry(pmap, FALSE);
1774 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
1775 m->md.pv_list_count++;
1779 * Conditionally create a pv entry.
1782 pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m)
1786 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1787 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
1788 if (pv_entry_count < pv_entry_high_water &&
1789 (pv = get_pv_entry(pmap, TRUE)) != NULL) {
1791 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
1792 m->md.pv_list_count++;
1799 * pmap_remove_pte: do the things to unmap a page in a process
1802 pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t va, pd_entry_t ptepde)
1807 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1808 oldpte = pte_load_clear(ptq);
1810 pmap->pm_stats.wired_count -= 1;
1812 * Machines that don't support invlpg, also don't support
1816 pmap_invalidate_page(kernel_pmap, va);
1817 pmap->pm_stats.resident_count -= 1;
1818 if (oldpte & PG_MANAGED) {
1819 m = PHYS_TO_VM_PAGE(oldpte & PG_FRAME);
1820 if (oldpte & PG_M) {
1821 KASSERT((oldpte & PG_RW),
1822 ("pmap_remove_pte: modified page not writable: va: %#lx, pte: %#lx",
1827 vm_page_flag_set(m, PG_REFERENCED);
1828 pmap_remove_entry(pmap, m, va);
1830 return (pmap_unuse_pt(pmap, va, ptepde));
1834 * Remove a single page from a process address space
1837 pmap_remove_page(pmap_t pmap, vm_offset_t va, pd_entry_t *pde)
1841 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1842 if ((*pde & PG_V) == 0)
1844 pte = pmap_pde_to_pte(pde, va);
1845 if ((*pte & PG_V) == 0)
1847 pmap_remove_pte(pmap, pte, va, *pde);
1848 pmap_invalidate_page(pmap, va);
1852 * Remove the given range of addresses from the specified map.
1854 * It is assumed that the start and end are properly
1855 * rounded to the page size.
1858 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
1860 vm_offset_t va_next;
1861 pml4_entry_t *pml4e;
1863 pd_entry_t ptpaddr, *pde;
1868 * Perform an unsynchronized read. This is, however, safe.
1870 if (pmap->pm_stats.resident_count == 0)
1875 vm_page_lock_queues();
1879 * special handling of removing one page. a very
1880 * common operation and easy to short circuit some
1883 if (sva + PAGE_SIZE == eva) {
1884 pde = pmap_pde(pmap, sva);
1885 if (pde && (*pde & PG_PS) == 0) {
1886 pmap_remove_page(pmap, sva, pde);
1891 for (; sva < eva; sva = va_next) {
1893 if (pmap->pm_stats.resident_count == 0)
1896 pml4e = pmap_pml4e(pmap, sva);
1897 if ((*pml4e & PG_V) == 0) {
1898 va_next = (sva + NBPML4) & ~PML4MASK;
1902 pdpe = pmap_pml4e_to_pdpe(pml4e, sva);
1903 if ((*pdpe & PG_V) == 0) {
1904 va_next = (sva + NBPDP) & ~PDPMASK;
1909 * Calculate index for next page table.
1911 va_next = (sva + NBPDR) & ~PDRMASK;
1913 pde = pmap_pdpe_to_pde(pdpe, sva);
1917 * Weed out invalid mappings.
1923 * Check for large page.
1925 if ((ptpaddr & PG_PS) != 0) {
1927 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
1928 pmap_unuse_pt(pmap, sva, *pdpe);
1934 * Limit our scan to either the end of the va represented
1935 * by the current page table page, or to the end of the
1936 * range being removed.
1941 for (pte = pmap_pde_to_pte(pde, sva); sva != va_next; pte++,
1947 * The TLB entry for a PG_G mapping is invalidated
1948 * by pmap_remove_pte().
1950 if ((*pte & PG_G) == 0)
1952 if (pmap_remove_pte(pmap, pte, sva, ptpaddr))
1957 vm_page_unlock_queues();
1959 pmap_invalidate_all(pmap);
1964 * Routine: pmap_remove_all
1966 * Removes this physical page from
1967 * all physical maps in which it resides.
1968 * Reflects back modify bits to the pager.
1971 * Original versions of this routine were very
1972 * inefficient because they iteratively called
1973 * pmap_remove (slow...)
1977 pmap_remove_all(vm_page_t m)
1981 pt_entry_t *pte, tpte;
1984 #if defined(PMAP_DIAGNOSTIC)
1986 * XXX This makes pmap_remove_all() illegal for non-managed pages!
1988 if (m->flags & PG_FICTITIOUS) {
1989 panic("pmap_remove_all: illegal for unmanaged page, va: 0x%lx",
1990 VM_PAGE_TO_PHYS(m));
1993 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
1994 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
1997 pmap->pm_stats.resident_count--;
1998 pte = pmap_pte_pde(pmap, pv->pv_va, &ptepde);
1999 tpte = pte_load_clear(pte);
2001 pmap->pm_stats.wired_count--;
2003 vm_page_flag_set(m, PG_REFERENCED);
2006 * Update the vm_page_t clean and reference bits.
2009 KASSERT((tpte & PG_RW),
2010 ("pmap_remove_all: modified page not writable: va: %#lx, pte: %#lx",
2014 pmap_invalidate_page(pmap, pv->pv_va);
2015 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
2016 m->md.pv_list_count--;
2017 pmap_unuse_pt(pmap, pv->pv_va, ptepde);
2019 free_pv_entry(pmap, pv);
2021 vm_page_flag_clear(m, PG_WRITEABLE);
2025 * Set the physical protection on the
2026 * specified range of this map as requested.
2029 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
2031 vm_offset_t va_next;
2032 pml4_entry_t *pml4e;
2034 pd_entry_t ptpaddr, *pde;
2038 if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
2039 pmap_remove(pmap, sva, eva);
2043 if (prot & VM_PROT_WRITE)
2048 vm_page_lock_queues();
2050 for (; sva < eva; sva = va_next) {
2052 pml4e = pmap_pml4e(pmap, sva);
2053 if ((*pml4e & PG_V) == 0) {
2054 va_next = (sva + NBPML4) & ~PML4MASK;
2058 pdpe = pmap_pml4e_to_pdpe(pml4e, sva);
2059 if ((*pdpe & PG_V) == 0) {
2060 va_next = (sva + NBPDP) & ~PDPMASK;
2064 va_next = (sva + NBPDR) & ~PDRMASK;
2066 pde = pmap_pdpe_to_pde(pdpe, sva);
2070 * Weed out invalid mappings.
2076 * Check for large page.
2078 if ((ptpaddr & PG_PS) != 0) {
2079 *pde &= ~(PG_M|PG_RW);
2087 for (pte = pmap_pde_to_pte(pde, sva); sva != va_next; pte++,
2089 pt_entry_t obits, pbits;
2093 obits = pbits = *pte;
2094 if (pbits & PG_MANAGED) {
2097 m = PHYS_TO_VM_PAGE(pbits & PG_FRAME);
2098 vm_page_flag_set(m, PG_REFERENCED);
2101 if ((pbits & PG_M) != 0) {
2103 m = PHYS_TO_VM_PAGE(pbits &
2109 pbits &= ~(PG_RW | PG_M);
2111 if (pbits != obits) {
2112 if (!atomic_cmpset_long(pte, obits, pbits))
2115 pmap_invalidate_page(pmap, sva);
2121 vm_page_unlock_queues();
2123 pmap_invalidate_all(pmap);
2128 * Insert the given physical page (p) at
2129 * the specified virtual address (v) in the
2130 * target physical map with the protection requested.
2132 * If specified, the page will be wired down, meaning
2133 * that the related pte can not be reclaimed.
2135 * NB: This is the only routine which MAY NOT lazy-evaluate
2136 * or lose information. That is, this routine must actually
2137 * insert this page into the given map NOW.
2140 pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2147 pt_entry_t origpte, newpte;
2151 va = trunc_page(va);
2152 #ifdef PMAP_DIAGNOSTIC
2153 if (va > VM_MAX_KERNEL_ADDRESS)
2154 panic("pmap_enter: toobig");
2155 if ((va >= UPT_MIN_ADDRESS) && (va < UPT_MAX_ADDRESS))
2156 panic("pmap_enter: invalid to pmap_enter page table pages (va: 0x%lx)", va);
2161 vm_page_lock_queues();
2165 * In the case that a page table page is not
2166 * resident, we are creating it here.
2168 if (va < VM_MAXUSER_ADDRESS) {
2169 mpte = pmap_allocpte(pmap, va, M_WAITOK);
2171 #if 0 && defined(PMAP_DIAGNOSTIC)
2173 pd_entry_t *pdeaddr = pmap_pde(pmap, va);
2175 if ((origpte & PG_V) == 0) {
2176 panic("pmap_enter: invalid kernel page table page, pde=%p, va=%p\n",
2182 pde = pmap_pde(pmap, va);
2184 if ((*pde & PG_PS) != 0)
2185 panic("pmap_enter: attempted pmap_enter on 2MB page");
2186 pte = pmap_pde_to_pte(pde, va);
2191 * Page Directory table entry not valid, we need a new PT page
2194 panic("pmap_enter: invalid page directory va=%#lx\n", va);
2196 pa = VM_PAGE_TO_PHYS(m);
2199 opa = origpte & PG_FRAME;
2202 * Mapping has not changed, must be protection or wiring change.
2204 if (origpte && (opa == pa)) {
2206 * Wiring change, just update stats. We don't worry about
2207 * wiring PT pages as they remain resident as long as there
2208 * are valid mappings in them. Hence, if a user page is wired,
2209 * the PT page will be also.
2211 if (wired && ((origpte & PG_W) == 0))
2212 pmap->pm_stats.wired_count++;
2213 else if (!wired && (origpte & PG_W))
2214 pmap->pm_stats.wired_count--;
2217 * Remove extra pte reference
2223 * We might be turning off write access to the page,
2224 * so we go ahead and sense modify status.
2226 if (origpte & PG_MANAGED) {
2233 * Mapping has changed, invalidate old range and fall through to
2234 * handle validating new mapping.
2238 pmap->pm_stats.wired_count--;
2239 if (origpte & PG_MANAGED) {
2240 om = PHYS_TO_VM_PAGE(opa);
2241 pmap_remove_entry(pmap, om, va);
2245 KASSERT(mpte->wire_count > 0,
2246 ("pmap_enter: missing reference to page table page,"
2250 pmap->pm_stats.resident_count++;
2253 * Enter on the PV list if part of our managed memory.
2255 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0) {
2256 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva,
2257 ("pmap_enter: managed mapping within the clean submap"));
2258 pmap_insert_entry(pmap, va, m);
2263 * Increment counters
2266 pmap->pm_stats.wired_count++;
2270 * Now validate mapping with desired protection/wiring.
2272 newpte = (pt_entry_t)(pa | PG_V);
2273 if ((prot & VM_PROT_WRITE) != 0)
2275 if ((prot & VM_PROT_EXECUTE) == 0)
2279 if (va < VM_MAXUSER_ADDRESS)
2281 if (pmap == kernel_pmap)
2285 * if the mapping or permission bits are different, we need
2286 * to update the pte.
2288 if ((origpte & ~(PG_M|PG_A)) != newpte) {
2289 if (origpte & PG_V) {
2291 origpte = pte_load_store(pte, newpte | PG_A);
2292 if (origpte & PG_A) {
2293 if (origpte & PG_MANAGED)
2294 vm_page_flag_set(om, PG_REFERENCED);
2295 if (opa != VM_PAGE_TO_PHYS(m) || ((origpte &
2296 PG_NX) == 0 && (newpte & PG_NX)))
2299 if (origpte & PG_M) {
2300 KASSERT((origpte & PG_RW),
2301 ("pmap_enter: modified page not writable: va: %#lx, pte: %#lx",
2303 if ((origpte & PG_MANAGED) != 0)
2305 if ((newpte & PG_RW) == 0)
2309 pmap_invalidate_page(pmap, va);
2311 pte_store(pte, newpte | PG_A);
2313 vm_page_unlock_queues();
2318 * Maps a sequence of resident pages belonging to the same object.
2319 * The sequence begins with the given page m_start. This page is
2320 * mapped at the given virtual address start. Each subsequent page is
2321 * mapped at a virtual address that is offset from start by the same
2322 * amount as the page is offset from m_start within the object. The
2323 * last page in the sequence is the page with the largest offset from
2324 * m_start that can be mapped at a virtual address less than the given
2325 * virtual address end. Not every virtual page between start and end
2326 * is mapped; only those for which a resident page exists with the
2327 * corresponding offset from m_start are mapped.
2330 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
2331 vm_page_t m_start, vm_prot_t prot)
2334 vm_pindex_t diff, psize;
2336 VM_OBJECT_LOCK_ASSERT(m_start->object, MA_OWNED);
2337 psize = atop(end - start);
2341 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
2342 mpte = pmap_enter_quick_locked(pmap, start + ptoa(diff), m,
2344 m = TAILQ_NEXT(m, listq);
2350 * this code makes some *MAJOR* assumptions:
2351 * 1. Current pmap & pmap exists.
2354 * 4. No page table pages.
2355 * but is *MUCH* faster than pmap_enter...
2359 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
2363 (void) pmap_enter_quick_locked(pmap, va, m, prot, NULL);
2368 pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
2369 vm_prot_t prot, vm_page_t mpte)
2374 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva ||
2375 (m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0,
2376 ("pmap_enter_quick_locked: managed mapping within the clean submap"));
2377 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2378 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2381 * In the case that a page table page is not
2382 * resident, we are creating it here.
2384 if (va < VM_MAXUSER_ADDRESS) {
2385 vm_pindex_t ptepindex;
2389 * Calculate pagetable page index
2391 ptepindex = pmap_pde_pindex(va);
2392 if (mpte && (mpte->pindex == ptepindex)) {
2396 * Get the page directory entry
2398 ptepa = pmap_pde(pmap, va);
2401 * If the page table page is mapped, we just increment
2402 * the hold count, and activate it.
2404 if (ptepa && (*ptepa & PG_V) != 0) {
2406 panic("pmap_enter_quick: unexpected mapping into 2MB page");
2407 mpte = PHYS_TO_VM_PAGE(*ptepa & PG_FRAME);
2410 mpte = _pmap_allocpte(pmap, ptepindex,
2421 * This call to vtopte makes the assumption that we are
2422 * entering the page into the current pmap. In order to support
2423 * quick entry into any pmap, one would likely use pmap_pte.
2424 * But that isn't as quick as vtopte.
2429 pmap_unwire_pte_hold(pmap, va, mpte);
2436 * Enter on the PV list if part of our managed memory.
2438 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0 &&
2439 !pmap_try_insert_pv_entry(pmap, va, m)) {
2441 pmap_unwire_pte_hold(pmap, va, mpte);
2448 * Increment counters
2450 pmap->pm_stats.resident_count++;
2452 pa = VM_PAGE_TO_PHYS(m);
2453 if ((prot & VM_PROT_EXECUTE) == 0)
2457 * Now validate mapping with RO protection
2459 if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED))
2460 pte_store(pte, pa | PG_V | PG_U);
2462 pte_store(pte, pa | PG_V | PG_U | PG_MANAGED);
2467 * Make a temporary mapping for a physical address. This is only intended
2468 * to be used for panic dumps.
2471 pmap_kenter_temporary(vm_paddr_t pa, int i)
2475 va = (vm_offset_t)crashdumpmap + (i * PAGE_SIZE);
2476 pmap_kenter(va, pa);
2478 return ((void *)crashdumpmap);
2482 * This code maps large physical mmap regions into the
2483 * processor address space. Note that some shortcuts
2484 * are taken, but the code works.
2487 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr,
2488 vm_object_t object, vm_pindex_t pindex,
2494 VM_OBJECT_LOCK_ASSERT(object, MA_OWNED);
2495 KASSERT(object->type == OBJT_DEVICE,
2496 ("pmap_object_init_pt: non-device object"));
2497 if (((addr & (NBPDR - 1)) == 0) && ((size & (NBPDR - 1)) == 0)) {
2499 pd_entry_t ptepa, *pde;
2502 pde = pmap_pde(pmap, addr);
2503 if (pde != 0 && (*pde & PG_V) != 0)
2507 p = vm_page_lookup(object, pindex);
2509 vm_page_lock_queues();
2510 if (vm_page_sleep_if_busy(p, FALSE, "init4p"))
2513 p = vm_page_alloc(object, pindex, VM_ALLOC_NORMAL);
2518 if (vm_pager_get_pages(object, m, 1, 0) != VM_PAGER_OK) {
2519 vm_page_lock_queues();
2521 vm_page_unlock_queues();
2525 p = vm_page_lookup(object, pindex);
2526 vm_page_lock_queues();
2529 vm_page_unlock_queues();
2531 ptepa = VM_PAGE_TO_PHYS(p);
2532 if (ptepa & (NBPDR - 1))
2535 p->valid = VM_PAGE_BITS_ALL;
2538 for (va = addr; va < addr + size; va += NBPDR) {
2540 pmap_allocpde(pmap, va, M_NOWAIT)) == NULL) {
2542 vm_page_lock_queues();
2544 vm_page_unlock_queues();
2545 VM_OBJECT_UNLOCK(object);
2547 VM_OBJECT_LOCK(object);
2548 vm_page_lock_queues();
2550 vm_page_unlock_queues();
2553 pde = (pd_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(pdpg));
2554 pde = &pde[pmap_pde_index(va)];
2555 if ((*pde & PG_V) == 0) {
2556 pde_store(pde, ptepa | PG_PS | PG_M | PG_A |
2557 PG_U | PG_RW | PG_V);
2558 pmap->pm_stats.resident_count +=
2562 KASSERT(pdpg->wire_count > 0,
2563 ("pmap_object_init_pt: missing reference "
2564 "to page directory page, va: 0x%lx", va));
2568 pmap_invalidate_all(pmap);
2575 * Routine: pmap_change_wiring
2576 * Function: Change the wiring attribute for a map/virtual-address
2578 * In/out conditions:
2579 * The mapping must already exist in the pmap.
2582 pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired)
2587 * Wiring is not a hardware characteristic so there is no need to
2591 pte = pmap_pte(pmap, va);
2592 if (wired && (*pte & PG_W) == 0) {
2593 pmap->pm_stats.wired_count++;
2594 atomic_set_long(pte, PG_W);
2595 } else if (!wired && (*pte & PG_W) != 0) {
2596 pmap->pm_stats.wired_count--;
2597 atomic_clear_long(pte, PG_W);
2605 * Copy the range specified by src_addr/len
2606 * from the source map to the range dst_addr/len
2607 * in the destination map.
2609 * This routine is only advisory and need not do anything.
2613 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len,
2614 vm_offset_t src_addr)
2617 vm_offset_t end_addr = src_addr + len;
2618 vm_offset_t va_next;
2620 if (dst_addr != src_addr)
2623 if (!pmap_is_current(src_pmap))
2626 vm_page_lock_queues();
2627 if (dst_pmap < src_pmap) {
2628 PMAP_LOCK(dst_pmap);
2629 PMAP_LOCK(src_pmap);
2631 PMAP_LOCK(src_pmap);
2632 PMAP_LOCK(dst_pmap);
2634 for (addr = src_addr; addr < end_addr; addr = va_next) {
2635 pt_entry_t *src_pte, *dst_pte;
2636 vm_page_t dstmpde, dstmpte, srcmpte;
2637 pml4_entry_t *pml4e;
2639 pd_entry_t srcptepaddr, *pde;
2641 if (addr >= UPT_MIN_ADDRESS)
2642 panic("pmap_copy: invalid to pmap_copy page tables");
2644 pml4e = pmap_pml4e(src_pmap, addr);
2645 if ((*pml4e & PG_V) == 0) {
2646 va_next = (addr + NBPML4) & ~PML4MASK;
2650 pdpe = pmap_pml4e_to_pdpe(pml4e, addr);
2651 if ((*pdpe & PG_V) == 0) {
2652 va_next = (addr + NBPDP) & ~PDPMASK;
2656 va_next = (addr + NBPDR) & ~PDRMASK;
2658 pde = pmap_pdpe_to_pde(pdpe, addr);
2660 if (srcptepaddr == 0)
2663 if (srcptepaddr & PG_PS) {
2664 dstmpde = pmap_allocpde(dst_pmap, addr, M_NOWAIT);
2665 if (dstmpde == NULL)
2667 pde = (pd_entry_t *)
2668 PHYS_TO_DMAP(VM_PAGE_TO_PHYS(dstmpde));
2669 pde = &pde[pmap_pde_index(addr)];
2671 *pde = srcptepaddr & ~PG_W;
2672 dst_pmap->pm_stats.resident_count +=
2675 pmap_unwire_pte_hold(dst_pmap, addr, dstmpde);
2679 srcmpte = PHYS_TO_VM_PAGE(srcptepaddr & PG_FRAME);
2680 if (srcmpte->wire_count == 0)
2681 panic("pmap_copy: source page table page is unused");
2683 if (va_next > end_addr)
2686 src_pte = vtopte(addr);
2687 while (addr < va_next) {
2691 * we only virtual copy managed pages
2693 if ((ptetemp & PG_MANAGED) != 0) {
2694 dstmpte = pmap_allocpte(dst_pmap, addr,
2696 if (dstmpte == NULL)
2698 dst_pte = (pt_entry_t *)
2699 PHYS_TO_DMAP(VM_PAGE_TO_PHYS(dstmpte));
2700 dst_pte = &dst_pte[pmap_pte_index(addr)];
2701 if (*dst_pte == 0 &&
2702 pmap_try_insert_pv_entry(dst_pmap, addr,
2703 PHYS_TO_VM_PAGE(ptetemp & PG_FRAME))) {
2705 * Clear the wired, modified, and
2706 * accessed (referenced) bits
2709 *dst_pte = ptetemp & ~(PG_W | PG_M |
2711 dst_pmap->pm_stats.resident_count++;
2713 pmap_unwire_pte_hold(dst_pmap, addr,
2715 if (dstmpte->wire_count >= srcmpte->wire_count)
2722 vm_page_unlock_queues();
2723 PMAP_UNLOCK(src_pmap);
2724 PMAP_UNLOCK(dst_pmap);
2728 * pmap_zero_page zeros the specified hardware page by mapping
2729 * the page into KVM and using bzero to clear its contents.
2732 pmap_zero_page(vm_page_t m)
2734 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
2736 pagezero((void *)va);
2740 * pmap_zero_page_area zeros the specified hardware page by mapping
2741 * the page into KVM and using bzero to clear its contents.
2743 * off and size may not cover an area beyond a single hardware page.
2746 pmap_zero_page_area(vm_page_t m, int off, int size)
2748 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
2750 if (off == 0 && size == PAGE_SIZE)
2751 pagezero((void *)va);
2753 bzero((char *)va + off, size);
2757 * pmap_zero_page_idle zeros the specified hardware page by mapping
2758 * the page into KVM and using bzero to clear its contents. This
2759 * is intended to be called from the vm_pagezero process only and
2763 pmap_zero_page_idle(vm_page_t m)
2765 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
2767 pagezero((void *)va);
2771 * pmap_copy_page copies the specified (machine independent)
2772 * page by mapping the page into virtual memory and using
2773 * bcopy to copy the page, one machine dependent page at a
2777 pmap_copy_page(vm_page_t msrc, vm_page_t mdst)
2779 vm_offset_t src = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(msrc));
2780 vm_offset_t dst = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mdst));
2782 pagecopy((void *)src, (void *)dst);
2786 * Returns true if the pmap's pv is one of the first
2787 * 16 pvs linked to from this page. This count may
2788 * be changed upwards or downwards in the future; it
2789 * is only necessary that true be returned for a small
2790 * subset of pmaps for proper page aging.
2793 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
2798 if (m->flags & PG_FICTITIOUS)
2801 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2802 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
2803 if (PV_PMAP(pv) == pmap) {
2814 * Remove all pages from specified address space
2815 * this aids process exit speeds. Also, this code
2816 * is special cased for current process only, but
2817 * can have the more generic (and slightly slower)
2818 * mode enabled. This is much faster than pmap_remove
2819 * in the case of running down an entire address space.
2822 pmap_remove_pages(pmap_t pmap)
2824 pt_entry_t *pte, tpte;
2827 struct pv_chunk *pc, *npc;
2830 uint64_t inuse, bitmask;
2833 if (pmap != vmspace_pmap(curthread->td_proc->p_vmspace)) {
2834 printf("warning: pmap_remove_pages called with non-current pmap\n");
2837 vm_page_lock_queues();
2839 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
2841 for (field = 0; field < _NPCM; field++) {
2842 inuse = (~(pc->pc_map[field])) & pc_freemask[field];
2843 while (inuse != 0) {
2845 bitmask = 1UL << bit;
2846 idx = field * 64 + bit;
2847 pv = &pc->pc_pventry[idx];
2850 pte = vtopte(pv->pv_va);
2855 "TPTE at %p IS ZERO @ VA %08lx\n",
2861 * We cannot remove wired pages from a process' mapping at this time
2868 m = PHYS_TO_VM_PAGE(tpte & PG_FRAME);
2869 KASSERT(m->phys_addr == (tpte & PG_FRAME),
2870 ("vm_page_t %p phys_addr mismatch %016jx %016jx",
2871 m, (uintmax_t)m->phys_addr,
2874 KASSERT(m < &vm_page_array[vm_page_array_size],
2875 ("pmap_remove_pages: bad tpte %#jx",
2878 pmap->pm_stats.resident_count--;
2883 * Update the vm_page_t clean/reference bits.
2889 PV_STAT(pv_entry_frees++);
2890 PV_STAT(pv_entry_spare++);
2892 pc->pc_map[field] |= bitmask;
2893 m->md.pv_list_count--;
2894 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
2895 if (TAILQ_EMPTY(&m->md.pv_list))
2896 vm_page_flag_clear(m, PG_WRITEABLE);
2897 pmap_unuse_pt(pmap, pv->pv_va,
2898 *vtopde(pv->pv_va));
2902 PV_STAT(pv_entry_spare -= _NPCPV);
2903 PV_STAT(pc_chunk_count--);
2904 PV_STAT(pc_chunk_frees++);
2905 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
2906 m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pc));
2907 dump_drop_page(m->phys_addr);
2911 vm_page_unlock_queues();
2912 pmap_invalidate_all(pmap);
2919 * Return whether or not the specified physical page was modified
2920 * in any physical maps.
2923 pmap_is_modified(vm_page_t m)
2931 if (m->flags & PG_FICTITIOUS)
2934 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2935 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
2938 pte = pmap_pte(pmap, pv->pv_va);
2939 rv = (*pte & PG_M) != 0;
2948 * pmap_is_prefaultable:
2950 * Return whether or not the specified virtual address is elgible
2954 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
2962 pde = pmap_pde(pmap, addr);
2963 if (pde != NULL && (*pde & PG_V)) {
2965 rv = (*pte & PG_V) == 0;
2972 * Clear the given bit in each of the given page's ptes.
2974 static __inline void
2975 pmap_clear_ptes(vm_page_t m, long bit)
2979 pt_entry_t pbits, *pte;
2981 if ((m->flags & PG_FICTITIOUS) ||
2982 (bit == PG_RW && (m->flags & PG_WRITEABLE) == 0))
2985 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2987 * Loop over all current mappings setting/clearing as appropos If
2988 * setting RO do we need to clear the VAC?
2990 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
2993 pte = pmap_pte(pmap, pv->pv_va);
2998 if (!atomic_cmpset_long(pte, pbits,
2999 pbits & ~(PG_RW | PG_M)))
3005 atomic_clear_long(pte, bit);
3007 pmap_invalidate_page(pmap, pv->pv_va);
3012 vm_page_flag_clear(m, PG_WRITEABLE);
3016 * pmap_page_protect:
3018 * Lower the permission for all mappings to a given page.
3021 pmap_page_protect(vm_page_t m, vm_prot_t prot)
3023 if ((prot & VM_PROT_WRITE) == 0) {
3024 if (prot & (VM_PROT_READ | VM_PROT_EXECUTE)) {
3025 pmap_clear_ptes(m, PG_RW);
3033 * pmap_ts_referenced:
3035 * Return a count of reference bits for a page, clearing those bits.
3036 * It is not necessary for every reference bit to be cleared, but it
3037 * is necessary that 0 only be returned when there are truly no
3038 * reference bits set.
3040 * XXX: The exact number of bits to check and clear is a matter that
3041 * should be tested and standardized at some point in the future for
3042 * optimal aging of shared pages.
3045 pmap_ts_referenced(vm_page_t m)
3047 pv_entry_t pv, pvf, pvn;
3052 if (m->flags & PG_FICTITIOUS)
3054 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
3055 if ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
3058 pvn = TAILQ_NEXT(pv, pv_list);
3059 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
3060 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
3063 pte = pmap_pte(pmap, pv->pv_va);
3064 if (pte != NULL && (*pte & PG_A) != 0) {
3065 atomic_clear_long(pte, PG_A);
3066 pmap_invalidate_page(pmap, pv->pv_va);
3074 } while ((pv = pvn) != NULL && pv != pvf);
3080 * Clear the modify bits on the specified physical page.
3083 pmap_clear_modify(vm_page_t m)
3085 pmap_clear_ptes(m, PG_M);
3089 * pmap_clear_reference:
3091 * Clear the reference bit on the specified physical page.
3094 pmap_clear_reference(vm_page_t m)
3096 pmap_clear_ptes(m, PG_A);
3100 * Miscellaneous support routines follow
3104 * Map a set of physical memory pages into the kernel virtual
3105 * address space. Return a pointer to where it is mapped. This
3106 * routine is intended to be used for mapping device memory,
3110 pmap_mapdev(vm_paddr_t pa, vm_size_t size)
3112 vm_offset_t va, tmpva, offset;
3114 /* If this fits within the direct map window, use it */
3115 if (pa < dmaplimit && (pa + size) < dmaplimit)
3116 return ((void *)PHYS_TO_DMAP(pa));
3117 offset = pa & PAGE_MASK;
3118 size = roundup(offset + size, PAGE_SIZE);
3119 va = kmem_alloc_nofault(kernel_map, size);
3121 panic("pmap_mapdev: Couldn't alloc kernel virtual memory");
3122 pa = trunc_page(pa);
3123 for (tmpva = va; size > 0; ) {
3124 pmap_kenter(tmpva, pa);
3129 pmap_invalidate_range(kernel_pmap, va, tmpva);
3130 return ((void *)(va + offset));
3134 pmap_unmapdev(vm_offset_t va, vm_size_t size)
3136 vm_offset_t base, offset, tmpva;
3138 /* If we gave a direct map region in pmap_mapdev, do nothing */
3139 if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS)
3141 base = trunc_page(va);
3142 offset = va & PAGE_MASK;
3143 size = roundup(offset + size, PAGE_SIZE);
3144 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE)
3145 pmap_kremove(tmpva);
3146 pmap_invalidate_range(kernel_pmap, va, tmpva);
3147 kmem_free(kernel_map, base, size);
3151 * perform the pmap work for mincore
3154 pmap_mincore(pmap_t pmap, vm_offset_t addr)
3156 pt_entry_t *ptep, pte;
3161 ptep = pmap_pte(pmap, addr);
3162 pte = (ptep != NULL) ? *ptep : 0;
3168 val = MINCORE_INCORE;
3169 if ((pte & PG_MANAGED) == 0)
3172 pa = pte & PG_FRAME;
3174 m = PHYS_TO_VM_PAGE(pa);
3180 val |= MINCORE_MODIFIED|MINCORE_MODIFIED_OTHER;
3183 * Modified by someone else
3185 vm_page_lock_queues();
3186 if (m->dirty || pmap_is_modified(m))
3187 val |= MINCORE_MODIFIED_OTHER;
3188 vm_page_unlock_queues();
3194 val |= MINCORE_REFERENCED|MINCORE_REFERENCED_OTHER;
3197 * Referenced by someone else
3199 vm_page_lock_queues();
3200 if ((m->flags & PG_REFERENCED) ||
3201 pmap_ts_referenced(m)) {
3202 val |= MINCORE_REFERENCED_OTHER;
3203 vm_page_flag_set(m, PG_REFERENCED);
3205 vm_page_unlock_queues();
3212 pmap_activate(struct thread *td)
3214 pmap_t pmap, oldpmap;
3218 pmap = vmspace_pmap(td->td_proc->p_vmspace);
3219 oldpmap = PCPU_GET(curpmap);
3221 if (oldpmap) /* XXX FIXME */
3222 atomic_clear_int(&oldpmap->pm_active, PCPU_GET(cpumask));
3223 atomic_set_int(&pmap->pm_active, PCPU_GET(cpumask));
3225 if (oldpmap) /* XXX FIXME */
3226 oldpmap->pm_active &= ~PCPU_GET(cpumask);
3227 pmap->pm_active |= PCPU_GET(cpumask);
3229 cr3 = vtophys(pmap->pm_pml4);
3230 td->td_pcb->pcb_cr3 = cr3;
3236 pmap_addr_hint(vm_object_t obj, vm_offset_t addr, vm_size_t size)
3239 if ((obj == NULL) || (size < NBPDR) || (obj->type != OBJT_DEVICE)) {
3243 addr = (addr + (NBPDR - 1)) & ~(NBPDR - 1);