2 * Copyright (c) 1993 The Regents of the University of California.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by the University of
16 * California, Berkeley and its contributors.
17 * 4. Neither the name of the University nor the names of its contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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38 #include <machine/asmacros.h>
39 #include <machine/cputypes.h>
40 #include <machine/pmap.h>
41 #include <machine/specialreg.h>
63 #if defined(I586_CPU) && defined(DEV_NPX)
73 * void bzero(void *buf, u_int len)
98 * do 64 byte chunks first
100 * XXX this is probably over-unrolled at least for DX2's
157 * a jump table seems to be faster than a loop or more range reductions
159 * XXX need a const section for non-text
194 #if defined(I586_CPU) && defined(DEV_NPX)
200 * The FPU register method is twice as fast as the integer register
201 * method unless the target is in the L1 cache and we pre-allocate a
202 * cache line for it (then the integer register method is 4-5 times
203 * faster). However, we never pre-allocate cache lines, since that
204 * would make the integer method 25% or more slower for the common
205 * case when the target isn't in either the L1 cache or the L2 cache.
206 * Thus we normally use the FPU register method unless the overhead
207 * would be too large.
209 cmpl $256,%ecx /* empirical; clts, fninit, smsw cost a lot */
213 * The FPU registers may belong to an application or to fastmove()
214 * or to another invocation of bcopy() or ourself in a higher level
215 * interrupt or trap handler. Preserving the registers is
216 * complicated since we avoid it if possible at all levels. We
217 * want to localize the complications even when that increases them.
218 * Here the extra work involves preserving CR0_TS in TS.
219 * `npxproc != NULL' is supposed to be the condition that all the
220 * FPU resources belong to an application, but npxproc and CR0_TS
221 * aren't set atomically enough for this condition to work in
222 * interrupt handlers.
224 * Case 1: FPU registers belong to the application: we must preserve
225 * the registers if we use them, so we only use the FPU register
226 * method if the target size is large enough to amortize the extra
227 * overhead for preserving them. CR0_TS must be preserved although
228 * it is very likely to end up as set.
230 * Case 2: FPU registers belong to fastmove(): fastmove() currently
231 * makes the registers look like they belong to an application so
232 * that cpu_switch() and savectx() don't have to know about it, so
233 * this case reduces to case 1.
235 * Case 3: FPU registers belong to the kernel: don't use the FPU
236 * register method. This case is unlikely, and supporting it would
237 * be more complicated and might take too much stack.
239 * Case 4: FPU registers don't belong to anyone: the FPU registers
240 * don't need to be preserved, so we always use the FPU register
241 * method. CR0_TS must be preserved although it is very likely to
242 * always end up as clear.
244 cmpl $0,PCPU(NPXPROC)
246 cmpl $256+184,%ecx /* empirical; not quite 2*108 more */
248 sarb $1,kernel_fpu_lock
257 sarb $1,kernel_fpu_lock
261 fninit /* XXX should avoid needing this */
266 * Align to an 8 byte boundary (misalignment in the main loop would
267 * cost a factor of >= 2). Avoid jumps (at little cost if it is
268 * already aligned) by always zeroing 8 bytes and using the part up
269 * to the _next_ alignment position.
272 addl %edx,%ecx /* part of %ecx -= new_%edx - %edx */
278 * Similarly align `len' to a multiple of 8.
285 * This wouldn't be any faster if it were unrolled, since the loop
286 * control instructions are much faster than the fstl and/or done
287 * in parallel with it so their overhead is insignificant.
289 fpureg_i586_bzero_loop:
294 jae fpureg_i586_bzero_loop
296 cmpl $0,PCPU(NPXPROC)
301 movb $0xfe,kernel_fpu_lock
307 movb $0xfe,kernel_fpu_lock
312 * `rep stos' seems to be the best method in practice for small
313 * counts. Fancy methods usually take too long to start up due
314 * to cache and BTB misses.
334 #endif /* I586_CPU && defined(DEV_NPX) */
386 /* fillw(pat, base, cnt) */
406 cmpl %ecx,%eax /* overlapping && src < dst? */
408 cld /* nope, copy forwards */
417 addl %ecx,%edi /* copy backwards. */
438 * generic_bcopy(src, dst, cnt)
439 * ws@tools.de (Wolfgang Solfrank, TooLs GmbH) +49-228-985800
450 cmpl %ecx,%eax /* overlapping && src < dst? */
453 shrl $2,%ecx /* copy by 32-bit words */
454 cld /* nope, copy forwards */
458 andl $3,%ecx /* any bytes left? */
467 addl %ecx,%edi /* copy backwards */
471 andl $3,%ecx /* any fractional bytes? */
475 movl 20(%esp),%ecx /* copy remainder by 32-bit words */
486 #if defined(I586_CPU) && defined(DEV_NPX)
496 cmpl %ecx,%eax /* overlapping && src < dst? */
502 sarb $1,kernel_fpu_lock
504 cmpl $0,PCPU(NPXPROC)
515 fninit /* XXX should avoid needing this */
520 #define DCACHE_SIZE 8192
521 cmpl $(DCACHE_SIZE-512)/2,%ecx
523 movl $(DCACHE_SIZE-512)/2,%ecx
527 jb 5f /* XXX should prefetch if %ecx >= 32 */
548 large_i586_bcopy_loop:
569 jae large_i586_bcopy_loop
575 cmpl $0,PCPU(NPXPROC)
581 movb $0xfe,kernel_fpu_lock
584 * This is a duplicate of the main part of generic_bcopy. See the comments
585 * there. Jumping into generic_bcopy would cost a whole 0-1 cycles and
586 * would mess up high resolution profiling.
622 #endif /* I586_CPU && defined(DEV_NPX) */
625 * Note: memcpy does not support overlapping copies
634 shrl $2,%ecx /* copy by 32-bit words */
635 cld /* nope, copy forwards */
639 andl $3,%ecx /* any bytes left? */
647 /*****************************************************************************/
648 /* copyout and fubyte family */
649 /*****************************************************************************/
651 * Access user memory from inside the kernel. These routines and possibly
652 * the math- and DOS emulators should be the only places that do this.
654 * We have to access the memory with user's permissions, so use a segment
655 * selector with RPL 3. For writes to user space we have to additionally
656 * check the PTE for write permission, because the 386 does not check
657 * write permissions when we are executing with EPL 0. The 486 does check
658 * this if the WP bit is set in CR0, so we can use a simpler version here.
660 * These routines set curpcb->onfault for the time they execute. When a
661 * protection violation occurs inside the functions, the trap handler
662 * returns to *curpcb->onfault instead of the function.
666 * copyout(from_kernel, to_user, len) - MP SAFE (if not I386_CPU)
672 ENTRY(generic_copyout)
673 movl PCPU(CURPCB),%eax
674 movl $copyout_fault,PCB_ONFAULT(%eax)
681 testl %ebx,%ebx /* anything to do? */
685 * Check explicitly for non-user addresses. If 486 write protection
686 * is being used, this check is essential because we are in kernel
687 * mode so the h/w does not provide any protection against writing
692 * First, prevent address wrapping.
698 * XXX STOP USING VM_MAXUSER_ADDRESS.
699 * It is an end address, not a max, so every time it is used correctly it
700 * looks like there is an off by one error, and of course it caused an off
701 * by one error in several places.
703 cmpl $VM_MAXUSER_ADDRESS,%eax
709 * We have to check each PTE for user write permission.
710 * The checking may cause a page fault, so it is important to set
711 * up everything for return via copyout_fault before here.
713 /* compute number of pages */
718 shrl $IDXSHIFT+2,%ecx
721 /* compute PTE offset for start address */
727 /* check PTE for each page */
728 leal PTmap(%edx),%eax
731 testb $PG_V,PTmap(%eax) /* PTE page must be valid */
734 andb $PG_V|PG_RW|PG_U,%al /* page must be valid and user writable */
735 cmpb $PG_V|PG_RW|PG_U,%al
739 /* simulate a trap */
744 call trapwrite /* trapwrite(addr) */
749 testl %eax,%eax /* if not ok, return EFAULT */
755 jnz 1b /* check next page */
756 #endif /* I386_CPU */
758 /* bcopy(%esi, %edi, %ebx) */
761 #if defined(I586_CPU) && defined(DEV_NPX)
779 movl PCPU(CURPCB),%edx
780 movl %eax,PCB_ONFAULT(%edx)
788 movl PCPU(CURPCB),%edx
789 movl $0,PCB_ONFAULT(%edx)
793 #if defined(I586_CPU) && defined(DEV_NPX)
796 * Duplicated from generic_copyout. Could be done a bit better.
798 movl PCPU(CURPCB),%eax
799 movl $copyout_fault,PCB_ONFAULT(%eax)
806 testl %ebx,%ebx /* anything to do? */
810 * Check explicitly for non-user addresses. If 486 write protection
811 * is being used, this check is essential because we are in kernel
812 * mode so the h/w does not provide any protection against writing
817 * First, prevent address wrapping.
823 * XXX STOP USING VM_MAXUSER_ADDRESS.
824 * It is an end address, not a max, so every time it is used correctly it
825 * looks like there is an off by one error, and of course it caused an off
826 * by one error in several places.
828 cmpl $VM_MAXUSER_ADDRESS,%eax
831 /* bcopy(%esi, %edi, %ebx) */
835 * End of duplicated code.
845 #endif /* I586_CPU && defined(DEV_NPX) */
848 * copyin(from_user, to_kernel, len) - MP SAFE
854 ENTRY(generic_copyin)
855 movl PCPU(CURPCB),%eax
856 movl $copyin_fault,PCB_ONFAULT(%eax)
859 movl 12(%esp),%esi /* caddr_t from */
860 movl 16(%esp),%edi /* caddr_t to */
861 movl 20(%esp),%ecx /* size_t len */
864 * make sure address is valid
869 cmpl $VM_MAXUSER_ADDRESS,%edx
872 #if defined(I586_CPU) && defined(DEV_NPX)
877 shrl $2,%ecx /* copy longword-wise */
882 andb $3,%cl /* copy remaining bytes */
886 #if defined(I586_CPU) && defined(DEV_NPX)
893 movl PCPU(CURPCB),%edx
894 movl %eax,PCB_ONFAULT(%edx)
901 movl PCPU(CURPCB),%edx
902 movl $0,PCB_ONFAULT(%edx)
906 #if defined(I586_CPU) && defined(DEV_NPX)
909 * Duplicated from generic_copyin. Could be done a bit better.
911 movl PCPU(CURPCB),%eax
912 movl $copyin_fault,PCB_ONFAULT(%eax)
915 movl 12(%esp),%esi /* caddr_t from */
916 movl 16(%esp),%edi /* caddr_t to */
917 movl 20(%esp),%ecx /* size_t len */
920 * make sure address is valid
925 cmpl $VM_MAXUSER_ADDRESS,%edx
928 * End of duplicated code.
934 pushl %ebx /* XXX prepare for fastmove_fault */
939 #endif /* I586_CPU && defined(DEV_NPX) */
941 #if defined(I586_CPU) && defined(DEV_NPX)
942 /* fastmove(src, dst, len)
945 len in %ecx XXX changed to on stack for profiling
946 uses %eax and %edx for tmp. storage
948 /* XXX use ENTRY() to get profiling. fastmove() is actually a non-entry. */
952 subl $PCB_SAVEFPU_SIZE+3*4,%esp
958 testl $7,%esi /* check if src addr is multiple of 8 */
961 testl $7,%edi /* check if dst addr is multiple of 8 */
964 /* if (npxproc != NULL) { */
965 cmpl $0,PCPU(NPXPROC)
967 /* fnsave(&curpcb->pcb_savefpu); */
968 movl PCPU(CURPCB),%eax
969 fnsave PCB_SAVEFPU(%eax)
970 /* npxproc = NULL; */
971 movl $0,PCPU(NPXPROC)
974 /* now we own the FPU. */
977 * The process' FP state is saved in the pcb, but if we get
978 * switched, the cpu_switch() will store our FP state in the
979 * pcb. It should be possible to avoid all the copying for
980 * this, e.g., by setting a flag to tell cpu_switch() to
981 * save the state somewhere else.
983 /* tmp = curpcb->pcb_savefpu; */
988 movl PCPU(CURPCB),%esi
989 addl $PCB_SAVEFPU,%esi
991 movl $PCB_SAVEFPU_SIZE>>2,%ecx
997 /* stop_emulating(); */
999 /* npxproc = curproc; */
1000 movl PCPU(CURPROC),%eax
1001 movl %eax,PCPU(NPXPROC)
1002 movl PCPU(CURPCB),%eax
1003 movl $fastmove_fault,PCB_ONFAULT(%eax)
1060 /* curpcb->pcb_savefpu = tmp; */
1064 movl PCPU(CURPCB),%edi
1065 addl $PCB_SAVEFPU,%edi
1068 movl $PCB_SAVEFPU_SIZE>>2,%ecx
1075 /* start_emulating(); */
1079 /* npxproc = NULL; */
1080 movl $0,PCPU(NPXPROC)
1084 movl PCPU(CURPCB),%eax
1085 movl $fastmove_tail_fault,PCB_ONFAULT(%eax)
1088 shrl $2,%ecx /* copy longword-wise */
1093 andb $3,%cl /* copy remaining bytes */
1103 movl PCPU(CURPCB),%edi
1104 addl $PCB_SAVEFPU,%edi
1107 movl $PCB_SAVEFPU_SIZE>>2,%ecx
1114 movl $0,PCPU(NPXPROC)
1116 fastmove_tail_fault:
1123 movl PCPU(CURPCB),%edx
1124 movl $0,PCB_ONFAULT(%edx)
1127 #endif /* I586_CPU && defined(DEV_NPX) */
1130 * fu{byte,sword,word} - MP SAFE
1132 * Fetch a byte (sword, word) from user memory
1135 movl PCPU(CURPCB),%ecx
1136 movl $fusufault,PCB_ONFAULT(%ecx)
1137 movl 4(%esp),%edx /* from */
1139 cmpl $VM_MAXUSER_ADDRESS-4,%edx /* verify address is valid */
1143 movl $0,PCB_ONFAULT(%ecx)
1147 * These two routines are called from the profiling code, potentially
1148 * at interrupt time. If they fail, that's okay, good things will
1149 * happen later. Fail all the time for now - until the trap code is
1150 * able to deal with this.
1161 movl PCPU(CURPCB),%ecx
1162 movl $fusufault,PCB_ONFAULT(%ecx)
1165 cmpl $VM_MAXUSER_ADDRESS-2,%edx
1169 movl $0,PCB_ONFAULT(%ecx)
1176 movl PCPU(CURPCB),%ecx
1177 movl $fusufault,PCB_ONFAULT(%ecx)
1180 cmpl $VM_MAXUSER_ADDRESS-1,%edx
1184 movl $0,PCB_ONFAULT(%ecx)
1189 movl PCPU(CURPCB),%ecx
1191 movl %eax,PCB_ONFAULT(%ecx)
1196 * su{byte,sword,word} - MP SAFE (if not I386_CPU)
1198 * Write a byte (word, longword) to user memory
1201 movl PCPU(CURPCB),%ecx
1202 movl $fusufault,PCB_ONFAULT(%ecx)
1207 /* XXX - page boundary crossing is still not handled */
1212 leal PTmap(%edx),%ecx
1215 testb $PG_V,PTmap(%ecx) /* PTE page must be valid */
1217 movb PTmap(%edx),%dl
1218 andb $PG_V|PG_RW|PG_U,%dl /* page must be valid and user writable */
1219 cmpb $PG_V|PG_RW|PG_U,%dl
1223 /* simulate a trap */
1226 popl %edx /* remove junk parameter from stack */
1233 cmpl $VM_MAXUSER_ADDRESS-4,%edx /* verify address validity */
1239 movl PCPU(CURPCB),%ecx
1240 movl %eax,PCB_ONFAULT(%ecx)
1244 * susword - MP SAFE (if not I386_CPU)
1247 movl PCPU(CURPCB),%ecx
1248 movl $fusufault,PCB_ONFAULT(%ecx)
1253 /* XXX - page boundary crossing is still not handled */
1258 leal _PTmap(%edx),%ecx
1261 testb $PG_V,PTmap(%ecx) /* PTE page must be valid */
1263 movb PTmap(%edx),%dl
1264 andb $PG_V|PG_RW|PG_U,%dl /* page must be valid and user writable */
1265 cmpb $PG_V|PG_RW|PG_U,%dl
1269 /* simulate a trap */
1272 popl %edx /* remove junk parameter from stack */
1279 cmpl $VM_MAXUSER_ADDRESS-2,%edx /* verify address validity */
1285 movl PCPU(CURPCB),%ecx /* restore trashed register */
1286 movl %eax,PCB_ONFAULT(%ecx)
1290 * su[i]byte - MP SAFE (if not I386_CPU)
1294 movl PCPU(CURPCB),%ecx
1295 movl $fusufault,PCB_ONFAULT(%ecx)
1304 leal PTmap(%edx),%ecx
1307 testb $PG_V,PTmap(%ecx) /* PTE page must be valid */
1309 movb PTmap(%edx),%dl
1310 andb $PG_V|PG_RW|PG_U,%dl /* page must be valid and user writable */
1311 cmpb $PG_V|PG_RW|PG_U,%dl
1315 /* simulate a trap */
1318 popl %edx /* remove junk parameter from stack */
1325 cmpl $VM_MAXUSER_ADDRESS-1,%edx /* verify address validity */
1331 movl PCPU(CURPCB),%ecx /* restore trashed register */
1332 movl %eax,PCB_ONFAULT(%ecx)
1336 * copyinstr(from, to, maxlen, int *lencopied) - MP SAFE
1338 * copy a string from from to to, stop when a 0 character is reached.
1339 * return ENAMETOOLONG if string is longer than maxlen, and
1340 * EFAULT on protection violations. If lencopied is non-zero,
1341 * return the actual length in *lencopied.
1346 movl PCPU(CURPCB),%ecx
1347 movl $cpystrflt,PCB_ONFAULT(%ecx)
1349 movl 12(%esp),%esi /* %esi = from */
1350 movl 16(%esp),%edi /* %edi = to */
1351 movl 20(%esp),%edx /* %edx = maxlen */
1353 movl $VM_MAXUSER_ADDRESS,%eax
1355 /* make sure 'from' is within bounds */
1359 /* restrict maxlen to <= VM_MAXUSER_ADDRESS-from */
1377 /* Success -- 0 byte reached */
1382 /* edx is zero - return ENAMETOOLONG or EFAULT */
1383 cmpl $VM_MAXUSER_ADDRESS,%esi
1386 movl $ENAMETOOLONG,%eax
1393 /* set *lencopied and return %eax */
1394 movl PCPU(CURPCB),%ecx
1395 movl $0,PCB_ONFAULT(%ecx)
1409 * copystr(from, to, maxlen, int *lencopied) - MP SAFE
1415 movl 12(%esp),%esi /* %esi = from */
1416 movl 16(%esp),%edi /* %edi = to */
1417 movl 20(%esp),%edx /* %edx = maxlen */
1428 /* Success -- 0 byte reached */
1433 /* edx is zero -- return ENAMETOOLONG */
1434 movl $ENAMETOOLONG,%eax
1437 /* set *lencopied and return %eax */
1459 cld /* compare forwards */
1478 * Handling of special 386 registers and descriptor tables etc
1480 /* void lgdt(struct region_descriptor *rdp); */
1482 /* reload the descriptor table */
1486 /* flush the prefetch q */
1490 /* reload "stale" selectors */
1499 /* reload code selector by turning return into intersegmental return */
1506 * void lidt(struct region_descriptor *rdp);
1514 * void lldt(u_short sel)
1521 * void ltr(u_short sel)
1527 /* ssdtosd(*ssdp,*sdp) */
1564 /* void load_cr3(caddr_t cr3) */
1566 #ifdef SWTCH_OPTIM_STATS
1567 incl tlb_flush_count
1578 /* void load_cr4(caddr_t cr4) */
1584 /* void load_dr6(u_int dr6) */
1590 /* void reset_dbregs() */
1593 movl %eax,%dr7 /* disable all breapoints first */
1601 /*****************************************************************************/
1602 /* setjump, longjump */
1603 /*****************************************************************************/
1607 movl %ebx,(%eax) /* save ebx */
1608 movl %esp,4(%eax) /* save esp */
1609 movl %ebp,8(%eax) /* save ebp */
1610 movl %esi,12(%eax) /* save esi */
1611 movl %edi,16(%eax) /* save edi */
1612 movl (%esp),%edx /* get rta */
1613 movl %edx,20(%eax) /* save eip */
1614 xorl %eax,%eax /* return(0); */
1619 movl (%eax),%ebx /* restore ebx */
1620 movl 4(%eax),%esp /* restore esp */
1621 movl 8(%eax),%ebp /* restore ebp */
1622 movl 12(%eax),%esi /* restore esi */
1623 movl 16(%eax),%edi /* restore edi */
1624 movl 20(%eax),%edx /* get rta */
1625 movl %edx,(%esp) /* put in return frame */
1626 xorl %eax,%eax /* return(1); */
1631 * Support for BB-profiling (gcc -a). The kernbb program will extract
1632 * the data from the kernel.
1642 NON_GPROF_ENTRY(__bb_init_func)