2 * SPDX-License-Identifier: BSD-3-Clause
4 * Copyright (c) 2003 Peter Wemm.
5 * Copyright (c) 1990 The Regents of the University of California.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the name of the University nor the names of its contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * from: @(#)sys_machdep.c 5.5 (Berkeley) 1/19/91
35 #include <sys/cdefs.h>
36 __FBSDID("$FreeBSD$");
38 #include "opt_capsicum.h"
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/capsicum.h>
43 #include <sys/kernel.h>
45 #include <sys/malloc.h>
46 #include <sys/mutex.h>
51 #include <sys/sysproto.h>
56 #include <vm/vm_kern.h> /* for kernel_map */
57 #include <vm/vm_map.h>
58 #include <vm/vm_extern.h>
60 #include <machine/frame.h>
61 #include <machine/md_var.h>
62 #include <machine/pcb.h>
63 #include <machine/specialreg.h>
64 #include <machine/sysarch.h>
65 #include <machine/tss.h>
66 #include <machine/vmparam.h>
68 #include <security/audit/audit.h>
70 static void user_ldt_deref(struct proc_ldt *pldt);
71 static void user_ldt_derefl(struct proc_ldt *pldt);
75 int max_ldt_segment = 512;
76 SYSCTL_INT(_machdep, OID_AUTO, max_ldt_segment, CTLFLAG_RDTUN,
78 "Maximum number of allowed LDT segments in the single address space");
81 max_ldt_segment_init(void *arg __unused)
84 if (max_ldt_segment <= 0)
86 if (max_ldt_segment > MAX_LD)
87 max_ldt_segment = MAX_LD;
89 SYSINIT(maxldt, SI_SUB_VM_CONF, SI_ORDER_ANY, max_ldt_segment_init, NULL);
91 #ifndef _SYS_SYSPROTO_H_
99 sysarch_ldt(struct thread *td, struct sysarch_args *uap, int uap_space)
101 struct i386_ldt_args *largs, la;
102 struct user_segment_descriptor *lp;
106 * XXXKIB check that the BSM generation code knows to encode
109 AUDIT_ARG_CMD(uap->op);
110 if (uap_space == UIO_USERSPACE) {
111 error = copyin(uap->parms, &la, sizeof(struct i386_ldt_args));
116 largs = (struct i386_ldt_args *)uap->parms;
120 error = amd64_get_ldt(td, largs);
123 if (largs->descs != NULL && largs->num > max_ldt_segment)
125 set_pcb_flags(td->td_pcb, PCB_FULL_IRET);
126 if (largs->descs != NULL) {
127 lp = malloc(largs->num * sizeof(struct
128 user_segment_descriptor), M_TEMP, M_WAITOK);
129 error = copyin(largs->descs, lp, largs->num *
130 sizeof(struct user_segment_descriptor));
132 error = amd64_set_ldt(td, largs, lp);
135 error = amd64_set_ldt(td, largs, NULL);
143 update_gdt_gsbase(struct thread *td, uint32_t base)
145 struct user_segment_descriptor *sd;
149 set_pcb_flags(td->td_pcb, PCB_FULL_IRET);
151 sd = PCPU_GET(gs32p);
152 sd->sd_lobase = base & 0xffffff;
153 sd->sd_hibase = (base >> 24) & 0xff;
158 update_gdt_fsbase(struct thread *td, uint32_t base)
160 struct user_segment_descriptor *sd;
164 set_pcb_flags(td->td_pcb, PCB_FULL_IRET);
166 sd = PCPU_GET(fs32p);
167 sd->sd_lobase = base & 0xffffff;
168 sd->sd_hibase = (base >> 24) & 0xff;
173 sysarch(struct thread *td, struct sysarch_args *uap)
179 struct i386_ioperm_args iargs;
180 struct i386_get_xfpustate i386xfpu;
181 struct i386_set_pkru i386pkru;
182 struct amd64_get_xfpustate a64xfpu;
183 struct amd64_set_pkru a64pkru;
186 #ifdef CAPABILITY_MODE
188 * When adding new operations, add a new case statement here to
189 * explicitly indicate whether or not the operation is safe to
190 * perform in capability mode.
192 if (IN_CAPABILITY_MODE(td)) {
196 case I386_GET_IOPERM:
197 case I386_GET_FSBASE:
198 case I386_SET_FSBASE:
199 case I386_GET_GSBASE:
200 case I386_SET_GSBASE:
201 case I386_GET_XFPUSTATE:
203 case I386_CLEAR_PKRU:
204 case AMD64_GET_FSBASE:
205 case AMD64_SET_FSBASE:
206 case AMD64_GET_GSBASE:
207 case AMD64_SET_GSBASE:
208 case AMD64_GET_XFPUSTATE:
210 case AMD64_CLEAR_PKRU:
213 case I386_SET_IOPERM:
216 if (KTRPOINT(td, KTR_CAPFAIL))
217 ktrcapfail(CAPFAIL_SYSCALL, NULL, NULL);
224 if (uap->op == I386_GET_LDT || uap->op == I386_SET_LDT)
225 return (sysarch_ldt(td, uap, UIO_USERSPACE));
231 * XXXKIB check that the BSM generation code knows to encode
234 AUDIT_ARG_CMD(uap->op);
236 case I386_GET_IOPERM:
237 case I386_SET_IOPERM:
238 if ((error = copyin(uap->parms, &iargs,
239 sizeof(struct i386_ioperm_args))) != 0)
242 case I386_GET_XFPUSTATE:
243 if ((error = copyin(uap->parms, &i386xfpu,
244 sizeof(struct i386_get_xfpustate))) != 0)
246 a64xfpu.addr = (void *)(uintptr_t)i386xfpu.addr;
247 a64xfpu.len = i386xfpu.len;
250 case I386_CLEAR_PKRU:
251 if ((error = copyin(uap->parms, &i386pkru,
252 sizeof(struct i386_set_pkru))) != 0)
254 a64pkru.addr = (void *)(uintptr_t)i386pkru.addr;
255 a64pkru.len = i386pkru.len;
256 a64pkru.keyidx = i386pkru.keyidx;
257 a64pkru.flags = i386pkru.flags;
259 case AMD64_GET_XFPUSTATE:
260 if ((error = copyin(uap->parms, &a64xfpu,
261 sizeof(struct amd64_get_xfpustate))) != 0)
265 case AMD64_CLEAR_PKRU:
266 if ((error = copyin(uap->parms, &a64pkru,
267 sizeof(struct amd64_set_pkru))) != 0)
275 case I386_GET_IOPERM:
276 error = amd64_get_ioperm(td, &iargs);
278 error = copyout(&iargs, uap->parms,
279 sizeof(struct i386_ioperm_args));
281 case I386_SET_IOPERM:
282 error = amd64_set_ioperm(td, &iargs);
284 case I386_GET_FSBASE:
285 update_pcb_bases(pcb);
286 i386base = pcb->pcb_fsbase;
287 error = copyout(&i386base, uap->parms, sizeof(i386base));
289 case I386_SET_FSBASE:
290 error = copyin(uap->parms, &i386base, sizeof(i386base));
292 set_pcb_flags(pcb, PCB_FULL_IRET);
293 pcb->pcb_fsbase = i386base;
294 td->td_frame->tf_fs = _ufssel;
295 update_gdt_fsbase(td, i386base);
298 case I386_GET_GSBASE:
299 update_pcb_bases(pcb);
300 i386base = pcb->pcb_gsbase;
301 error = copyout(&i386base, uap->parms, sizeof(i386base));
303 case I386_SET_GSBASE:
304 error = copyin(uap->parms, &i386base, sizeof(i386base));
306 set_pcb_flags(pcb, PCB_FULL_IRET);
307 pcb->pcb_gsbase = i386base;
308 td->td_frame->tf_gs = _ugssel;
309 update_gdt_gsbase(td, i386base);
312 case AMD64_GET_FSBASE:
313 update_pcb_bases(pcb);
314 error = copyout(&pcb->pcb_fsbase, uap->parms,
315 sizeof(pcb->pcb_fsbase));
318 case AMD64_SET_FSBASE:
319 error = copyin(uap->parms, &a64base, sizeof(a64base));
321 if (a64base < VM_MAXUSER_ADDRESS) {
322 set_pcb_flags(pcb, PCB_FULL_IRET);
323 pcb->pcb_fsbase = a64base;
324 td->td_frame->tf_fs = _ufssel;
330 case AMD64_GET_GSBASE:
331 update_pcb_bases(pcb);
332 error = copyout(&pcb->pcb_gsbase, uap->parms,
333 sizeof(pcb->pcb_gsbase));
336 case AMD64_SET_GSBASE:
337 error = copyin(uap->parms, &a64base, sizeof(a64base));
339 if (a64base < VM_MAXUSER_ADDRESS) {
340 set_pcb_flags(pcb, PCB_FULL_IRET);
341 pcb->pcb_gsbase = a64base;
342 td->td_frame->tf_gs = _ugssel;
348 case I386_GET_XFPUSTATE:
349 case AMD64_GET_XFPUSTATE:
350 if (a64xfpu.len > cpu_max_ext_state_size -
351 sizeof(struct savefpu))
354 error = copyout((char *)(get_pcb_user_save_td(td) + 1),
355 a64xfpu.addr, a64xfpu.len);
361 * Read-lock the map to synchronize with parallel
362 * pmap_vmspace_copy() on fork.
364 map = &td->td_proc->p_vmspace->vm_map;
365 vm_map_lock_read(map);
366 error = pmap_pkru_set(PCPU_GET(curpmap),
367 (vm_offset_t)a64pkru.addr, (vm_offset_t)a64pkru.addr +
368 a64pkru.len, a64pkru.keyidx, a64pkru.flags);
369 vm_map_unlock_read(map);
372 case I386_CLEAR_PKRU:
373 case AMD64_CLEAR_PKRU:
374 if (a64pkru.flags != 0 || a64pkru.keyidx != 0) {
378 map = &td->td_proc->p_vmspace->vm_map;
379 vm_map_lock_read(map);
380 error = pmap_pkru_clear(PCPU_GET(curpmap),
381 (vm_offset_t)a64pkru.addr,
382 (vm_offset_t)a64pkru.addr + a64pkru.len);
383 vm_map_unlock_read(map);
394 amd64_set_ioperm(td, uap)
396 struct i386_ioperm_args *uap;
399 struct amd64tss *tssp;
400 struct system_segment_descriptor *tss_sd;
405 if ((error = priv_check(td, PRIV_IO)) != 0)
407 if ((error = securelevel_gt(td->td_ucred, 0)) != 0)
409 if (uap->start > uap->start + uap->length ||
410 uap->start + uap->length > IOPAGES * PAGE_SIZE * NBBY)
415 * While this is restricted to root, we should probably figure out
416 * whether any other driver is using this i/o address, as so not to
417 * cause confusion. This probably requires a global 'usage registry'.
420 if (pcb->pcb_tssp == NULL) {
421 tssp = (struct amd64tss *)kmem_malloc(ctob(IOPAGES + 1),
423 pmap_pti_add_kva((vm_offset_t)tssp, (vm_offset_t)tssp +
424 ctob(IOPAGES + 1), false);
425 iomap = (char *)&tssp[1];
426 memset(iomap, 0xff, IOPERM_BITMAP_SIZE);
428 /* Takes care of tss_rsp0. */
429 memcpy(tssp, PCPU_PTR(common_tss), sizeof(struct amd64tss));
430 tssp->tss_iobase = sizeof(*tssp);
431 pcb->pcb_tssp = tssp;
432 tss_sd = PCPU_GET(tss);
433 tss_sd->sd_lobase = (u_long)tssp & 0xffffff;
434 tss_sd->sd_hibase = ((u_long)tssp >> 24) & 0xfffffffffful;
435 tss_sd->sd_type = SDT_SYSTSS;
436 ltr(GSEL(GPROC0_SEL, SEL_KPL));
437 PCPU_SET(tssp, tssp);
440 iomap = (char *)&pcb->pcb_tssp[1];
441 for (i = uap->start; i < uap->start + uap->length; i++) {
443 iomap[i >> 3] &= ~(1 << (i & 7));
445 iomap[i >> 3] |= (1 << (i & 7));
451 amd64_get_ioperm(td, uap)
453 struct i386_ioperm_args *uap;
458 if (uap->start >= IOPAGES * PAGE_SIZE * NBBY)
460 if (td->td_pcb->pcb_tssp == NULL) {
465 iomap = (char *)&td->td_pcb->pcb_tssp[1];
468 state = (iomap[i >> 3] >> (i & 7)) & 1;
469 uap->enable = !state;
472 for (i = uap->start + 1; i < IOPAGES * PAGE_SIZE * NBBY; i++) {
473 if (state != ((iomap[i >> 3] >> (i & 7)) & 1))
483 * Update the GDT entry pointing to the LDT to point to the LDT of the
487 set_user_ldt(struct mdproc *mdp)
490 *PCPU_GET(ldt) = mdp->md_ldt_sd;
491 lldt(GSEL(GUSERLDT_SEL, SEL_KPL));
495 set_user_ldt_rv(struct vmspace *vmsp)
500 if (vmsp != td->td_proc->p_vmspace)
503 set_user_ldt(&td->td_proc->p_md);
507 user_ldt_alloc(struct proc *p, int force)
509 struct proc_ldt *pldt, *new_ldt;
511 struct soft_segment_descriptor sldt;
515 mtx_assert(&dt_lock, MA_OWNED);
517 if (!force && mdp->md_ldt != NULL)
518 return (mdp->md_ldt);
519 mtx_unlock(&dt_lock);
520 new_ldt = malloc(sizeof(struct proc_ldt), M_SUBPROC, M_WAITOK);
521 sz = max_ldt_segment * sizeof(struct user_segment_descriptor);
522 sva = kmem_malloc(sz, M_WAITOK | M_ZERO);
523 new_ldt->ldt_base = (caddr_t)sva;
524 pmap_pti_add_kva(sva, sva + sz, false);
525 new_ldt->ldt_refcnt = 1;
527 sldt.ssd_limit = sz - 1;
528 sldt.ssd_type = SDT_SYSLDT;
529 sldt.ssd_dpl = SEL_KPL;
536 if (pldt != NULL && !force) {
537 pmap_pti_remove_kva(sva, sva + sz);
539 free(new_ldt, M_SUBPROC);
544 bcopy(pldt->ldt_base, new_ldt->ldt_base, max_ldt_segment *
545 sizeof(struct user_segment_descriptor));
546 user_ldt_derefl(pldt);
549 ssdtosyssd(&sldt, &p->p_md.md_ldt_sd);
550 atomic_thread_fence_rel();
551 mdp->md_ldt = new_ldt;
553 smp_rendezvous(NULL, (void (*)(void *))set_user_ldt_rv, NULL,
556 return (mdp->md_ldt);
560 user_ldt_free(struct thread *td)
562 struct proc *p = td->td_proc;
563 struct mdproc *mdp = &p->p_md;
564 struct proc_ldt *pldt;
567 if ((pldt = mdp->md_ldt) == NULL) {
568 mtx_unlock(&dt_lock);
574 atomic_thread_fence_rel();
575 bzero(&mdp->md_ldt_sd, sizeof(mdp->md_ldt_sd));
577 lldt(GSEL(GNULL_SEL, SEL_KPL));
579 user_ldt_deref(pldt);
583 user_ldt_derefl(struct proc_ldt *pldt)
588 if (--pldt->ldt_refcnt == 0) {
589 sva = (vm_offset_t)pldt->ldt_base;
590 sz = max_ldt_segment * sizeof(struct user_segment_descriptor);
591 pmap_pti_remove_kva(sva, sva + sz);
593 free(pldt, M_SUBPROC);
598 user_ldt_deref(struct proc_ldt *pldt)
601 mtx_assert(&dt_lock, MA_OWNED);
602 user_ldt_derefl(pldt);
603 mtx_unlock(&dt_lock);
607 * Note for the authors of compat layers (linux, etc): copyout() in
608 * the function below is not a problem since it presents data in
609 * arch-specific format (i.e. i386-specific in this case), not in
610 * the OS-specific one.
613 amd64_get_ldt(struct thread *td, struct i386_ldt_args *uap)
615 struct proc_ldt *pldt;
616 struct user_segment_descriptor *lp;
622 printf("amd64_get_ldt: start=%u num=%u descs=%p\n",
623 uap->start, uap->num, (void *)uap->descs);
626 pldt = td->td_proc->p_md.md_ldt;
627 if (pldt == NULL || uap->start >= max_ldt_segment || uap->num == 0) {
628 td->td_retval[0] = 0;
631 num = min(uap->num, max_ldt_segment - uap->start);
632 lp = &((struct user_segment_descriptor *)(pldt->ldt_base))[uap->start];
633 data = malloc(num * sizeof(struct user_segment_descriptor), M_TEMP,
636 for (i = 0; i < num; i++)
637 data[i] = ((volatile uint64_t *)lp)[i];
638 mtx_unlock(&dt_lock);
639 error = copyout(data, uap->descs, num *
640 sizeof(struct user_segment_descriptor));
643 td->td_retval[0] = num;
648 amd64_set_ldt(struct thread *td, struct i386_ldt_args *uap,
649 struct user_segment_descriptor *descs)
652 struct proc_ldt *pldt;
653 struct user_segment_descriptor *dp;
659 printf("amd64_set_ldt: start=%u num=%u descs=%p\n",
660 uap->start, uap->num, (void *)uap->descs);
662 mdp = &td->td_proc->p_md;
665 set_pcb_flags(td->td_pcb, PCB_FULL_IRET);
668 /* Free descriptors */
669 if (uap->start == 0 && uap->num == 0)
670 uap->num = max_ldt_segment;
673 if ((pldt = mdp->md_ldt) == NULL ||
674 uap->start >= max_ldt_segment)
676 largest_ld = uap->start + uap->num;
677 if (largest_ld > max_ldt_segment)
678 largest_ld = max_ldt_segment;
679 if (largest_ld < uap->start)
682 for (i = uap->start; i < largest_ld; i++)
683 ((volatile uint64_t *)(pldt->ldt_base))[i] = 0;
684 mtx_unlock(&dt_lock);
688 if (!(uap->start == LDT_AUTO_ALLOC && uap->num == 1)) {
689 /* verify range of descriptors to modify */
690 largest_ld = uap->start + uap->num;
691 if (uap->start >= max_ldt_segment ||
692 largest_ld > max_ldt_segment ||
693 largest_ld < uap->start)
697 /* Check descriptors for access violations */
698 for (i = 0; i < uap->num; i++) {
701 switch (dp->sd_type) {
702 case SDT_SYSNULL: /* system null */
722 /* memory segment types */
723 case SDT_MEMEC: /* memory execute only conforming */
724 case SDT_MEMEAC: /* memory execute only accessed conforming */
725 case SDT_MEMERC: /* memory execute read conforming */
726 case SDT_MEMERAC: /* memory execute read accessed conforming */
727 /* Must be "present" if executable and conforming. */
731 case SDT_MEMRO: /* memory read only */
732 case SDT_MEMROA: /* memory read only accessed */
733 case SDT_MEMRW: /* memory read write */
734 case SDT_MEMRWA: /* memory read write accessed */
735 case SDT_MEMROD: /* memory read only expand dwn limit */
736 case SDT_MEMRODA: /* memory read only expand dwn lim accessed */
737 case SDT_MEMRWD: /* memory read write expand dwn limit */
738 case SDT_MEMRWDA: /* memory read write expand dwn lim acessed */
739 case SDT_MEME: /* memory execute only */
740 case SDT_MEMEA: /* memory execute only accessed */
741 case SDT_MEMER: /* memory execute read */
742 case SDT_MEMERA: /* memory execute read accessed */
748 /* Only user (ring-3) descriptors may be present. */
749 if ((dp->sd_p != 0) && (dp->sd_dpl != SEL_UPL))
753 if (uap->start == LDT_AUTO_ALLOC && uap->num == 1) {
754 /* Allocate a free slot */
756 pldt = user_ldt_alloc(p, 0);
758 mtx_unlock(&dt_lock);
763 * start scanning a bit up to leave room for NVidia and
764 * Wine, which still user the "Blat" method of allocation.
767 dp = &((struct user_segment_descriptor *)(pldt->ldt_base))[i];
768 for (; i < max_ldt_segment; ++i, ++dp) {
769 if (dp->sd_type == SDT_SYSNULL)
772 if (i >= max_ldt_segment) {
773 mtx_unlock(&dt_lock);
777 error = amd64_set_ldt_data(td, i, 1, descs);
778 mtx_unlock(&dt_lock);
780 largest_ld = uap->start + uap->num;
781 if (largest_ld > max_ldt_segment)
784 if (user_ldt_alloc(p, 0) != NULL) {
785 error = amd64_set_ldt_data(td, uap->start, uap->num,
788 mtx_unlock(&dt_lock);
791 td->td_retval[0] = uap->start;
796 amd64_set_ldt_data(struct thread *td, int start, int num,
797 struct user_segment_descriptor *descs)
800 struct proc_ldt *pldt;
801 volatile uint64_t *dst, *src;
804 mtx_assert(&dt_lock, MA_OWNED);
806 mdp = &td->td_proc->p_md;
808 dst = (volatile uint64_t *)(pldt->ldt_base);
809 src = (volatile uint64_t *)descs;
810 for (i = 0; i < num; i++)
811 dst[start + i] = src[i];