2 * SPDX-License-Identifier: BSD-3-Clause
4 * Copyright (c) 2003 Peter Wemm.
5 * Copyright (c) 1993 The Regents of the University of California.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the name of the University nor the names of its contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 * Functions to provide access to special i386 instructions.
37 * This in included in sys/systm.h, and that file should be
38 * used in preference to this.
41 #ifndef _MACHINE_CPUFUNC_H_
42 #define _MACHINE_CPUFUNC_H_
45 #error this file needs sys/cdefs.h as a prerequisite
48 struct region_descriptor;
50 #define readb(va) (*(volatile uint8_t *) (va))
51 #define readw(va) (*(volatile uint16_t *) (va))
52 #define readl(va) (*(volatile uint32_t *) (va))
53 #define readq(va) (*(volatile uint64_t *) (va))
55 #define writeb(va, d) (*(volatile uint8_t *) (va) = (d))
56 #define writew(va, d) (*(volatile uint16_t *) (va) = (d))
57 #define writel(va, d) (*(volatile uint32_t *) (va) = (d))
58 #define writeq(va, d) (*(volatile uint64_t *) (va) = (d))
60 #if defined(__GNUCLIKE_ASM) && defined(__CC_SUPPORTS___INLINE)
65 __asm __volatile("int $3");
68 static __inline __pure2 u_int
73 __asm __volatile("bsfl %1,%0" : "=r" (result) : "rm" (mask));
77 static __inline __pure2 u_long
82 __asm __volatile("bsfq %1,%0" : "=r" (result) : "rm" (mask));
86 static __inline __pure2 u_int
91 __asm __volatile("bsrl %1,%0" : "=r" (result) : "rm" (mask));
95 static __inline __pure2 u_long
100 __asm __volatile("bsrq %1,%0" : "=r" (result) : "rm" (mask));
108 __asm __volatile("clflush %0" : : "m" (*(char *)addr));
112 clflushopt(u_long addr)
115 __asm __volatile(".byte 0x66;clflush %0" : : "m" (*(char *)addr));
122 __asm __volatile("clwb %0" : : "m" (*(char *)addr));
129 __asm __volatile("clts");
135 __asm __volatile("cli" : : : "memory");
139 do_cpuid(u_int ax, u_int *p)
141 __asm __volatile("cpuid"
142 : "=a" (p[0]), "=b" (p[1]), "=c" (p[2]), "=d" (p[3])
147 cpuid_count(u_int ax, u_int cx, u_int *p)
149 __asm __volatile("cpuid"
150 : "=a" (p[0]), "=b" (p[1]), "=c" (p[2]), "=d" (p[3])
151 : "0" (ax), "c" (cx));
157 __asm __volatile("sti");
162 #define HAVE_INLINE_FFS
163 #define ffs(x) __builtin_ffs(x)
165 #define HAVE_INLINE_FFSL
167 static __inline __pure2 int
170 return (mask == 0 ? mask : (int)bsfq((u_long)mask) + 1);
173 #define HAVE_INLINE_FFSLL
175 static __inline __pure2 int
176 ffsll(long long mask)
178 return (ffsl((long)mask));
181 #define HAVE_INLINE_FLS
183 static __inline __pure2 int
186 return (mask == 0 ? mask : (int)bsrl((u_int)mask) + 1);
189 #define HAVE_INLINE_FLSL
191 static __inline __pure2 int
194 return (mask == 0 ? mask : (int)bsrq((u_long)mask) + 1);
197 #define HAVE_INLINE_FLSLL
199 static __inline __pure2 int
200 flsll(long long mask)
202 return (flsl((long)mask));
210 __asm __volatile("hlt");
213 static __inline u_char
218 __asm __volatile("inb %w1, %0" : "=a" (data) : "Nd" (port));
222 static __inline u_int
227 __asm __volatile("inl %w1, %0" : "=a" (data) : "Nd" (port));
232 insb(u_int port, void *addr, size_t count)
234 __asm __volatile("rep; insb"
235 : "+D" (addr), "+c" (count)
241 insw(u_int port, void *addr, size_t count)
243 __asm __volatile("rep; insw"
244 : "+D" (addr), "+c" (count)
250 insl(u_int port, void *addr, size_t count)
252 __asm __volatile("rep; insl"
253 : "+D" (addr), "+c" (count)
261 __asm __volatile("invd");
264 static __inline u_short
269 __asm __volatile("inw %w1, %0" : "=a" (data) : "Nd" (port));
274 outb(u_int port, u_char data)
276 __asm __volatile("outb %0, %w1" : : "a" (data), "Nd" (port));
280 outl(u_int port, u_int data)
282 __asm __volatile("outl %0, %w1" : : "a" (data), "Nd" (port));
286 outsb(u_int port, const void *addr, size_t count)
288 __asm __volatile("rep; outsb"
289 : "+S" (addr), "+c" (count)
294 outsw(u_int port, const void *addr, size_t count)
296 __asm __volatile("rep; outsw"
297 : "+S" (addr), "+c" (count)
302 outsl(u_int port, const void *addr, size_t count)
304 __asm __volatile("rep; outsl"
305 : "+S" (addr), "+c" (count)
310 outw(u_int port, u_short data)
312 __asm __volatile("outw %0, %w1" : : "a" (data), "Nd" (port));
315 static __inline u_long
320 __asm __volatile("popcntq %1,%0" : "=r" (result) : "rm" (mask));
328 __asm __volatile("lfence" : : : "memory");
335 __asm __volatile("mfence" : : : "memory");
342 __asm __volatile("sfence" : : : "memory");
348 __asm __volatile("pause");
351 static __inline u_long
356 __asm __volatile("pushfq; popq %0" : "=r" (rf));
360 static __inline uint64_t
365 __asm __volatile("rdmsr" : "=a" (low), "=d" (high) : "c" (msr));
366 return (low | ((uint64_t)high << 32));
369 static __inline uint32_t
374 __asm __volatile("rdmsr" : "=a" (low) : "c" (msr) : "rdx");
378 static __inline uint64_t
383 __asm __volatile("rdpmc" : "=a" (low), "=d" (high) : "c" (pmc));
384 return (low | ((uint64_t)high << 32));
387 static __inline uint64_t
392 __asm __volatile("rdtsc" : "=a" (low), "=d" (high));
393 return (low | ((uint64_t)high << 32));
396 static __inline uint64_t
401 __asm __volatile("rdtscp" : "=a" (low), "=d" (high) : : "ecx");
402 return (low | ((uint64_t)high << 32));
405 static __inline uint32_t
410 __asm __volatile("rdtsc" : "=a" (rv) : : "edx");
417 __asm __volatile("wbinvd");
421 write_rflags(u_long rf)
423 __asm __volatile("pushq %0; popfq" : : "r" (rf));
427 wrmsr(u_int msr, uint64_t newval)
433 __asm __volatile("wrmsr" : : "a" (low), "d" (high), "c" (msr));
437 load_cr0(u_long data)
440 __asm __volatile("movq %0,%%cr0" : : "r" (data));
443 static __inline u_long
448 __asm __volatile("movq %%cr0,%0" : "=r" (data));
452 static __inline u_long
457 __asm __volatile("movq %%cr2,%0" : "=r" (data));
462 load_cr3(u_long data)
465 __asm __volatile("movq %0,%%cr3" : : "r" (data) : "memory");
468 static __inline u_long
473 __asm __volatile("movq %%cr3,%0" : "=r" (data));
478 load_cr4(u_long data)
480 __asm __volatile("movq %0,%%cr4" : : "r" (data));
483 static __inline u_long
488 __asm __volatile("movq %%cr4,%0" : "=r" (data));
492 static __inline u_long
497 __asm __volatile("xgetbv" : "=a" (low), "=d" (high) : "c" (reg));
498 return (low | ((uint64_t)high << 32));
502 load_xcr(u_int reg, u_long val)
508 __asm __volatile("xsetbv" : : "c" (reg), "a" (low), "d" (high));
512 * Global TLB flush (except for thise for pages marked PG_G)
522 #define CR4_PGE 0x00000080 /* Page global enable */
526 * Perform the guaranteed invalidation of all TLB entries. This
527 * includes the global entries, and entries in all PCIDs, not only the
528 * current context. The function works both on non-PCID CPUs and CPUs
529 * with the PCID turned off or on. See IA-32 SDM Vol. 3a 4.10.4.1
530 * Operations that Invalidate TLBs and Paging-Structure Caches.
538 load_cr4(cr4 & ~CR4_PGE);
540 * Although preemption at this point could be detrimental to
541 * performance, it would not lead to an error. PG_G is simply
542 * ignored if CR4.PGE is clear. Moreover, in case this block
543 * is re-entered, the load_cr4() either above or below will
544 * modify CR4.PGE flushing the TLB.
546 load_cr4(cr4 | CR4_PGE);
550 * TLB flush for an individual page (even if it has PG_G).
551 * Only works on 486+ CPUs (i386 does not have PG_G).
557 __asm __volatile("invlpg %0" : : "m" (*(char *)addr) : "memory");
560 #define INVPCID_ADDR 0
561 #define INVPCID_CTX 1
562 #define INVPCID_CTXGLOB 2
563 #define INVPCID_ALLCTX 3
565 struct invpcid_descr {
566 uint64_t pcid:12 __packed;
567 uint64_t pad:52 __packed;
572 invpcid(struct invpcid_descr *d, int type)
575 __asm __volatile("invpcid (%0),%1"
576 : : "r" (d), "r" ((u_long)type) : "memory");
579 static __inline u_short
583 __asm __volatile("movw %%fs,%0" : "=rm" (sel));
587 static __inline u_short
591 __asm __volatile("movw %%gs,%0" : "=rm" (sel));
595 static __inline u_short
599 __asm __volatile("movw %%ss,%0" : "=rm" (sel));
606 __asm __volatile("movw %0,%%ds" : : "rm" (sel));
612 __asm __volatile("movw %0,%%es" : : "rm" (sel));
616 cpu_monitor(const void *addr, u_long extensions, u_int hints)
619 __asm __volatile("monitor"
620 : : "a" (addr), "c" (extensions), "d" (hints));
624 cpu_mwait(u_long extensions, u_int hints)
627 __asm __volatile("mwait" : : "a" (hints), "c" (extensions));
630 static __inline uint32_t
635 __asm __volatile("rdpkru" : "=a" (res) : "c" (0) : "edx");
640 wrpkru(uint32_t mask)
643 __asm __volatile("wrpkru" : : "a" (mask), "c" (0), "d" (0));
647 /* This is defined in <machine/specialreg.h> but is too painful to get to */
649 #define MSR_FSBASE 0xc0000100
654 /* Preserve the fsbase value across the selector load */
655 __asm __volatile("rdmsr; movw %0,%%fs; wrmsr"
656 : : "rm" (sel), "c" (MSR_FSBASE) : "eax", "edx");
660 #define MSR_GSBASE 0xc0000101
666 * Preserve the gsbase value across the selector load.
667 * Note that we have to disable interrupts because the gsbase
668 * being trashed happens to be the kernel gsbase at the time.
670 __asm __volatile("pushfq; cli; rdmsr; movw %0,%%gs; wrmsr; popfq"
671 : : "rm" (sel), "c" (MSR_GSBASE) : "eax", "edx");
674 /* Usable by userland */
678 __asm __volatile("movw %0,%%fs" : : "rm" (sel));
684 __asm __volatile("movw %0,%%gs" : : "rm" (sel));
688 static __inline uint64_t
693 __asm __volatile("rdfsbase %0" : "=r" (x));
701 __asm __volatile("wrfsbase %0" : : "r" (x));
704 static __inline uint64_t
709 __asm __volatile("rdgsbase %0" : "=r" (x));
717 __asm __volatile("wrgsbase %0" : : "r" (x));
721 bare_lgdt(struct region_descriptor *addr)
723 __asm __volatile("lgdt (%0)" : : "r" (addr));
727 sgdt(struct region_descriptor *addr)
732 __asm __volatile("sgdt %0" : "=m" (*loc) : : "memory");
736 lidt(struct region_descriptor *addr)
738 __asm __volatile("lidt (%0)" : : "r" (addr));
742 sidt(struct region_descriptor *addr)
747 __asm __volatile("sidt %0" : "=m" (*loc) : : "memory");
753 __asm __volatile("lldt %0" : : "r" (sel));
756 static __inline u_short
761 __asm __volatile("sldt %0" : "=r" (sel));
768 __asm __volatile("ltr %0" : : "r" (sel));
771 static __inline uint32_t
776 __asm __volatile("str %0" : "=r" (sel));
780 static __inline uint64_t
784 __asm __volatile("movq %%dr0,%0" : "=r" (data));
789 load_dr0(uint64_t dr0)
791 __asm __volatile("movq %0,%%dr0" : : "r" (dr0));
794 static __inline uint64_t
798 __asm __volatile("movq %%dr1,%0" : "=r" (data));
803 load_dr1(uint64_t dr1)
805 __asm __volatile("movq %0,%%dr1" : : "r" (dr1));
808 static __inline uint64_t
812 __asm __volatile("movq %%dr2,%0" : "=r" (data));
817 load_dr2(uint64_t dr2)
819 __asm __volatile("movq %0,%%dr2" : : "r" (dr2));
822 static __inline uint64_t
826 __asm __volatile("movq %%dr3,%0" : "=r" (data));
831 load_dr3(uint64_t dr3)
833 __asm __volatile("movq %0,%%dr3" : : "r" (dr3));
836 static __inline uint64_t
840 __asm __volatile("movq %%dr6,%0" : "=r" (data));
845 load_dr6(uint64_t dr6)
847 __asm __volatile("movq %0,%%dr6" : : "r" (dr6));
850 static __inline uint64_t
854 __asm __volatile("movq %%dr7,%0" : "=r" (data));
859 load_dr7(uint64_t dr7)
861 __asm __volatile("movq %0,%%dr7" : : "r" (dr7));
864 static __inline register_t
869 rflags = read_rflags();
875 intr_restore(register_t rflags)
877 write_rflags(rflags);
884 __asm __volatile("stac" : : : "cc");
891 __asm __volatile("clac" : : : "cc");
917 int sgx_encls(uint32_t eax, uint64_t rbx, uint64_t rcx, uint64_t rdx);
920 sgx_ecreate(void *pginfo, void *secs)
923 return (sgx_encls(SGX_ECREATE, (uint64_t)pginfo,
928 sgx_eadd(void *pginfo, void *epc)
931 return (sgx_encls(SGX_EADD, (uint64_t)pginfo,
936 sgx_einit(void *sigstruct, void *secs, void *einittoken)
939 return (sgx_encls(SGX_EINIT, (uint64_t)sigstruct,
940 (uint64_t)secs, (uint64_t)einittoken));
944 sgx_eextend(void *secs, void *epc)
947 return (sgx_encls(SGX_EEXTEND, (uint64_t)secs,
955 return (sgx_encls(SGX_EPA, SGX_PT_VA, (uint64_t)epc, 0));
959 sgx_eldu(uint64_t rbx, uint64_t rcx,
963 return (sgx_encls(SGX_ELDU, rbx, rcx, rdx));
967 sgx_eremove(void *epc)
970 return (sgx_encls(SGX_EREMOVE, 0, (uint64_t)epc, 0));
973 #else /* !(__GNUCLIKE_ASM && __CC_SUPPORTS___INLINE) */
975 int breakpoint(void);
976 u_int bsfl(u_int mask);
977 u_int bsrl(u_int mask);
978 void clflush(u_long addr);
980 void cpuid_count(u_int ax, u_int cx, u_int *p);
981 void disable_intr(void);
982 void do_cpuid(u_int ax, u_int *p);
983 void enable_intr(void);
985 void ia32_pause(void);
986 u_char inb(u_int port);
987 u_int inl(u_int port);
988 void insb(u_int port, void *addr, size_t count);
989 void insl(u_int port, void *addr, size_t count);
990 void insw(u_int port, void *addr, size_t count);
991 register_t intr_disable(void);
992 void intr_restore(register_t rf);
994 void invlpg(u_int addr);
996 u_short inw(u_int port);
997 void lidt(struct region_descriptor *addr);
998 void lldt(u_short sel);
999 void load_cr0(u_long cr0);
1000 void load_cr3(u_long cr3);
1001 void load_cr4(u_long cr4);
1002 void load_dr0(uint64_t dr0);
1003 void load_dr1(uint64_t dr1);
1004 void load_dr2(uint64_t dr2);
1005 void load_dr3(uint64_t dr3);
1006 void load_dr6(uint64_t dr6);
1007 void load_dr7(uint64_t dr7);
1008 void load_fs(u_short sel);
1009 void load_gs(u_short sel);
1010 void ltr(u_short sel);
1011 void outb(u_int port, u_char data);
1012 void outl(u_int port, u_int data);
1013 void outsb(u_int port, const void *addr, size_t count);
1014 void outsl(u_int port, const void *addr, size_t count);
1015 void outsw(u_int port, const void *addr, size_t count);
1016 void outw(u_int port, u_short data);
1021 uint64_t rdmsr(u_int msr);
1022 uint32_t rdmsr32(u_int msr);
1023 uint64_t rdpmc(u_int pmc);
1024 uint64_t rdr0(void);
1025 uint64_t rdr1(void);
1026 uint64_t rdr2(void);
1027 uint64_t rdr3(void);
1028 uint64_t rdr6(void);
1029 uint64_t rdr7(void);
1030 uint64_t rdtsc(void);
1031 u_long read_rflags(void);
1035 void write_rflags(u_int rf);
1036 void wrmsr(u_int msr, uint64_t newval);
1038 #endif /* __GNUCLIKE_ASM && __CC_SUPPORTS___INLINE */
1040 void reset_dbregs(void);
1043 int rdmsr_safe(u_int msr, uint64_t *val);
1044 int wrmsr_safe(u_int msr, uint64_t newval);
1047 #endif /* !_MACHINE_CPUFUNC_H_ */