2 * Copyright (c) 1990 The Regents of the University of California.
5 * This code is derived from software contributed to Berkeley by
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9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 4. Neither the name of the University nor the names of its contributors
17 * may be used to endorse or promote products derived from this software
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20 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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32 * from: @(#)npx.h 5.3 (Berkeley) 1/18/91
37 * Floating Point Data Structures and Constants
41 #ifndef _MACHINE_FPU_H_
42 #define _MACHINE_FPU_H_
44 /* Contents of each x87 floating point accumulator */
49 /* Contents of each SSE extended accumulator */
55 u_int16_t en_cw; /* control word (16bits) */
56 u_int16_t en_sw; /* status word (16bits) */
57 u_int8_t en_tw; /* tag word (8bits) */
59 u_int16_t en_opcode; /* opcode last executed (11 bits ) */
60 u_int64_t en_rip; /* floating point instruction pointer */
61 u_int64_t en_rdp; /* floating operand pointer */
62 u_int32_t en_mxcsr; /* SSE sontorol/status register */
63 u_int32_t en_mxcsr_mask; /* valid bits in mxcsr */
69 struct fpacc87 fp_acc;
70 u_char fp_pad[6]; /* padding */
72 struct xmmacc sv_xmm[16];
77 * The hardware default control word for i387's and later coprocessors is
82 * all exceptions masked.
84 * FreeBSD/i386 uses 53 bit precision for things like fadd/fsub/fsqrt etc
85 * because of the difference between memory and fpu register stack arguments.
86 * If its using an intermediate fpu register, it has 80/64 bits to work
87 * with. If it uses memory, it has 64/53 bits to work with. However,
88 * gcc is aware of this and goes to a fair bit of trouble to make the
91 * This is mostly academic for AMD64, because the ABI prefers the use
92 * SSE2 based math. For FreeBSD/amd64, we go with the default settings.
94 #define __INITIAL_FPUCW__ 0x037F
95 #define __INITIAL_MXCSR__ 0x1F80
96 #define __INITIAL_MXCSR_MASK__ 0xFFBF
101 void fpuexit(struct thread *td);
103 int fpugetregs(struct thread *td, struct savefpu *addr);
105 void fpusetregs(struct thread *td, struct savefpu *addr);
109 #endif /* !_MACHINE_FPU_H_ */