2 * SPDX-License-Identifier: BSD-4-Clause
4 * Copyright (c) 2003 Peter Wemm.
5 * Copyright (c) 1990 Andrew Moore, Talke Studio
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by the University of
19 * California, Berkeley and its contributors.
20 * 4. Neither the name of the University nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 * from: @(#) ieeefp.h 1.0 (Berkeley) 9/23/93
40 #ifndef _MACHINE_IEEEFP_H_
41 #define _MACHINE_IEEEFP_H_
44 * Deprecated historical FPU control interface
46 * IEEE floating point type, constant and function definitions.
47 * XXX: {FP,SSE}*FLD and {FP,SSE}*OFF are undocumented pollution.
51 #error this file needs sys/cdefs.h as a prerequisite
58 FP_RN=0, /* round to nearest */
59 FP_RM, /* round down towards minus infinity */
60 FP_RP, /* round up towards plus infinity */
65 * Precision (i.e., rounding precision) modes.
68 FP_PS=0, /* 24 bit (single-precision) */
69 FP_PRS, /* reserved */
70 FP_PD, /* 53 bit (double-precision) */
71 FP_PE /* 64 bit (extended-precision) */
74 #define fp_except_t int
77 * Exception bit masks.
79 #define FP_X_INV 0x01 /* invalid operation */
80 #define FP_X_DNML 0x02 /* denormal */
81 #define FP_X_DZ 0x04 /* zero divide */
82 #define FP_X_OFL 0x08 /* overflow */
83 #define FP_X_UFL 0x10 /* underflow */
84 #define FP_X_IMP 0x20 /* (im)precision */
85 #define FP_X_STK 0x40 /* stack fault */
88 * FPU control word bit-field masks.
90 #define FP_MSKS_FLD 0x3f /* exception masks field */
91 #define FP_PRC_FLD 0x300 /* precision control field */
92 #define FP_RND_FLD 0xc00 /* rounding control field */
95 * FPU status word bit-field masks.
97 #define FP_STKY_FLD 0x3f /* sticky flags field */
100 * SSE mxcsr register bit-field masks.
102 #define SSE_STKY_FLD 0x3f /* exception flags */
103 #define SSE_DAZ_FLD 0x40 /* Denormals are zero */
104 #define SSE_MSKS_FLD 0x1f80 /* exception masks field */
105 #define SSE_RND_FLD 0x6000 /* rounding control */
106 #define SSE_FZ_FLD 0x8000 /* flush to zero on underflow */
109 * FPU control word bit-field offsets (shift counts).
111 #define FP_MSKS_OFF 0 /* exception masks offset */
112 #define FP_PRC_OFF 8 /* precision control offset */
113 #define FP_RND_OFF 10 /* rounding control offset */
116 * FPU status word bit-field offsets (shift counts).
118 #define FP_STKY_OFF 0 /* sticky flags offset */
121 * SSE mxcsr register bit-field offsets (shift counts).
123 #define SSE_STKY_OFF 0 /* exception flags offset */
124 #define SSE_DAZ_OFF 6 /* DAZ exception mask offset */
125 #define SSE_MSKS_OFF 7 /* other exception masks offset */
126 #define SSE_RND_OFF 13 /* rounding control offset */
127 #define SSE_FZ_OFF 15 /* flush to zero offset */
129 #ifdef __GNUCLIKE_ASM
131 #define __fldcw(addr) __asm __volatile("fldcw %0" : : "m" (*(addr)))
132 #define __fldenv(addr) __asm __volatile("fldenv %0" : : "m" (*(addr)))
133 #define __fnclex() __asm __volatile("fnclex")
134 #define __fnstcw(addr) __asm __volatile("fnstcw %0" : "=m" (*(addr)))
135 #define __fnstenv(addr) __asm __volatile("fnstenv %0" : "=m" (*(addr)))
136 #define __fnstsw(addr) __asm __volatile("fnstsw %0" : "=m" (*(addr)))
137 #define __ldmxcsr(addr) __asm __volatile("ldmxcsr %0" : : "m" (*(addr)))
138 #define __stmxcsr(addr) __asm __volatile("stmxcsr %0" : "=m" (*(addr)))
141 * Load the control word. Be careful not to trap if there is a currently
142 * unmasked exception (ones that will become freshly unmasked are not a
143 * problem). This case must be handled by a save/restore of the
144 * environment or even of the full x87 state. Accessing the environment
145 * is very inefficient, so only do it when necessary.
148 __fnldcw(unsigned short _cw, unsigned short _newcw)
156 if ((_cw & FP_MSKS_FLD) != FP_MSKS_FLD) {
158 if (((_sw & ~_cw) & FP_STKY_FLD) != 0) {
169 * General notes about conflicting SSE vs FP status bits.
170 * This code assumes that software will not fiddle with the control
171 * bits of the SSE and x87 in such a way to get them out of sync and
172 * still expect this to work. Break this at your peril.
173 * Because I based this on the i386 port, the x87 state is used for
174 * the fpget*() functions, and is shadowed into the SSE state for
175 * the fpset*() functions. For dual source fpget*() functions, I
176 * merge the two together. I think.
179 static __inline fp_rnd_t
185 return ((fp_rnd_t)((_cw & FP_RND_FLD) >> FP_RND_OFF));
188 static __inline fp_rnd_t
189 __fpsetround(fp_rnd_t _m)
193 unsigned short _cw, _newcw;
196 _p = (fp_rnd_t)((_cw & FP_RND_FLD) >> FP_RND_OFF);
197 _newcw = _cw & ~FP_RND_FLD;
198 _newcw |= (_m << FP_RND_OFF) & FP_RND_FLD;
199 __fnldcw(_cw, _newcw);
201 _mxcsr &= ~SSE_RND_FLD;
202 _mxcsr |= (_m << SSE_RND_OFF) & SSE_RND_FLD;
208 * Get or set the rounding precision for x87 arithmetic operations.
209 * There is no equivalent SSE mode or control.
212 static __inline fp_prec_t
218 return ((fp_prec_t)((_cw & FP_PRC_FLD) >> FP_PRC_OFF));
221 static __inline fp_prec_t
222 __fpsetprec(fp_prec_t _m)
225 unsigned short _cw, _newcw;
228 _p = (fp_prec_t)((_cw & FP_PRC_FLD) >> FP_PRC_OFF);
229 _newcw = _cw & ~FP_PRC_FLD;
230 _newcw |= (_m << FP_PRC_OFF) & FP_PRC_FLD;
231 __fnldcw(_cw, _newcw);
236 * Get or set the exception mask.
237 * Note that the x87 mask bits are inverted by the API -- a mask bit of 1
238 * means disable for x87 and SSE, but for fp*mask() it means enable.
241 static __inline fp_except_t
247 return ((~_cw & FP_MSKS_FLD) >> FP_MSKS_OFF);
250 static __inline fp_except_t
251 __fpsetmask(fp_except_t _m)
255 unsigned short _cw, _newcw;
258 _p = (~_cw & FP_MSKS_FLD) >> FP_MSKS_OFF;
259 _newcw = _cw & ~FP_MSKS_FLD;
260 _newcw |= (~_m << FP_MSKS_OFF) & FP_MSKS_FLD;
261 __fnldcw(_cw, _newcw);
263 /* XXX should we clear non-ieee SSE_DAZ_FLD and SSE_FZ_FLD ? */
264 _mxcsr &= ~SSE_MSKS_FLD;
265 _mxcsr |= (~_m << SSE_MSKS_OFF) & SSE_MSKS_FLD;
270 static __inline fp_except_t
273 unsigned _ex, _mxcsr;
277 _ex = (_sw & FP_STKY_FLD) >> FP_STKY_OFF;
279 _ex |= (_mxcsr & SSE_STKY_FLD) >> SSE_STKY_OFF;
280 return ((fp_except_t)_ex);
283 #endif /* __GNUCLIKE_ASM */
285 #if !defined(__IEEEFP_NOINLINES__) && defined(__GNUCLIKE_ASM)
287 #define fpgetmask() __fpgetmask()
288 #define fpgetprec() __fpgetprec()
289 #define fpgetround() __fpgetround()
290 #define fpgetsticky() __fpgetsticky()
291 #define fpsetmask(m) __fpsetmask(m)
292 #define fpsetprec(m) __fpsetprec(m)
293 #define fpsetround(m) __fpsetround(m)
295 #else /* !(!__IEEEFP_NOINLINES__ && __GNUCLIKE_ASM) */
297 /* Augment the userland declarations. */
299 extern fp_rnd_t fpgetround(void);
300 extern fp_rnd_t fpsetround(fp_rnd_t);
301 extern fp_except_t fpgetmask(void);
302 extern fp_except_t fpsetmask(fp_except_t);
303 extern fp_except_t fpgetsticky(void);
304 extern fp_except_t fpsetsticky(fp_except_t);
305 fp_prec_t fpgetprec(void);
306 fp_prec_t fpsetprec(fp_prec_t);
309 #endif /* !__IEEEFP_NOINLINES__ && __GNUCLIKE_ASM */
311 #endif /* !_MACHINE_IEEEFP_H_ */