2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2003-2008 Joseph Koshy
5 * Copyright (c) 2007 The FreeBSD Foundation
8 * Portions of this software were developed by A. Joseph Koshy under
9 * sponsorship from the FreeBSD Foundation and Google, Inc.
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 /* Machine dependent interfaces */
35 #ifndef _MACHINE_PMC_MDEP_H
36 #define _MACHINE_PMC_MDEP_H 1
42 #include <dev/hwpmc/hwpmc_amd.h>
43 #include <dev/hwpmc/hwpmc_core.h>
44 #include <dev/hwpmc/hwpmc_tsc.h>
45 #include <dev/hwpmc/hwpmc_uncore.h>
48 * Intel processors implementing V2 and later of the Intel performance
49 * measurement architecture have PMCs of the following classes: TSC,
50 * IAF, IAP, UCF and UCP.
52 #define PMC_MDEP_CLASS_INDEX_TSC 1
53 #define PMC_MDEP_CLASS_INDEX_K8 2
54 #define PMC_MDEP_CLASS_INDEX_P4 2
55 #define PMC_MDEP_CLASS_INDEX_IAP 2
56 #define PMC_MDEP_CLASS_INDEX_IAF 3
57 #define PMC_MDEP_CLASS_INDEX_UCP 4
58 #define PMC_MDEP_CLASS_INDEX_UCF 5
61 * On the amd64 platform we support the following PMCs.
63 * TSC The timestamp counter
64 * K8 AMD Athlon64 and Opteron PMCs in 64 bit mode.
65 * PIV Intel P4/HTT and P4/EMT64
66 * IAP Intel Core/Core2/Atom CPUs in 64 bits mode.
67 * IAF Intel fixed-function PMCs in Core2 and later CPUs.
68 * UCP Intel Uncore programmable PMCs.
69 * UCF Intel Uncore fixed-function PMCs.
72 union pmc_md_op_pmcallocate {
73 struct pmc_md_amd_op_pmcallocate pm_amd;
74 struct pmc_md_iap_op_pmcallocate pm_iap;
75 struct pmc_md_ucf_op_pmcallocate pm_ucf;
76 struct pmc_md_ucp_op_pmcallocate pm_ucp;
81 #define PMCLOG_READADDR PMCLOG_READ64
82 #define PMCLOG_EMITADDR PMCLOG_EMIT64
87 struct pmc_md_amd_pmc pm_amd;
88 struct pmc_md_iaf_pmc pm_iaf;
89 struct pmc_md_iap_pmc pm_iap;
90 struct pmc_md_ucf_pmc pm_ucf;
91 struct pmc_md_ucp_pmc pm_ucp;
94 #define PMC_TRAPFRAME_TO_PC(TF) ((TF)->tf_rip)
95 #define PMC_TRAPFRAME_TO_FP(TF) ((TF)->tf_rbp)
96 #define PMC_TRAPFRAME_TO_USER_SP(TF) ((TF)->tf_rsp)
97 #define PMC_TRAPFRAME_TO_KERNEL_SP(TF) ((TF)->tf_rsp)
99 #define PMC_AT_FUNCTION_PROLOGUE_PUSH_BP(I) \
100 (((I) & 0xffffffff) == 0xe5894855) /* pushq %rbp; movq %rsp,%rbp */
101 #define PMC_AT_FUNCTION_PROLOGUE_MOV_SP_BP(I) \
102 (((I) & 0x00ffffff) == 0x00e58948) /* movq %rsp,%rbp */
103 #define PMC_AT_FUNCTION_EPILOGUE_RET(I) \
104 (((I) & 0xFF) == 0xC3) /* ret */
106 #define PMC_IN_TRAP_HANDLER(PC) \
107 ((PC) >= (uintptr_t) start_exceptions && \
108 (PC) < (uintptr_t) end_exceptions)
110 #define PMC_IN_KERNEL_STACK(va) kstack_contains(curthread, (va), sizeof(va))
111 #define PMC_IN_KERNEL(va) INKERNEL(va)
112 #define PMC_IN_USERSPACE(va) ((va) <= VM_MAXUSER_ADDRESS)
114 /* Build a fake kernel trapframe from current instruction pointer. */
115 #define PMC_FAKE_TRAPFRAME(TF) \
117 (TF)->tf_cs = 0; (TF)->tf_rflags = 0; \
118 __asm __volatile("movq %%rbp,%0" : "=r" ((TF)->tf_rbp)); \
119 __asm __volatile("movq %%rsp,%0" : "=r" ((TF)->tf_rsp)); \
120 __asm __volatile("call 1f \n\t1: pop %0" : "=r"((TF)->tf_rip)); \
127 void start_exceptions(void), end_exceptions(void);
129 struct pmc_mdep *pmc_amd_initialize(void);
130 void pmc_amd_finalize(struct pmc_mdep *_md);
131 struct pmc_mdep *pmc_intel_initialize(void);
132 void pmc_intel_finalize(struct pmc_mdep *_md);
135 #endif /* _MACHINE_PMC_MDEP_H */