2 * SPDX-License-Identifier: BSD-4-Clause
4 * Copyright (c) 1990 The Regents of the University of California.
6 * Copyright (c) 1994 John S. Dyson
8 * Copyright (c) 2003 Peter Wemm
11 * This code is derived from software contributed to Berkeley by
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
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18 * notice, this list of conditions and the following disclaimer.
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23 * must display the following acknowledgement:
24 * This product includes software developed by the University of
25 * California, Berkeley and its contributors.
26 * 4. Neither the name of the University nor the names of its contributors
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39 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
42 * from: @(#)vmparam.h 5.9 (Berkeley) 5/12/91
46 #ifndef _MACHINE_VMPARAM_H_
47 #define _MACHINE_VMPARAM_H_ 1
50 * Machine dependent constants for AMD64.
54 * Virtual memory related constants, all in bytes
56 #define MAXTSIZ (32768UL*1024*1024) /* max text size */
58 #define DFLDSIZ (32768UL*1024*1024) /* initial data size limit */
61 #define MAXDSIZ (32768UL*1024*1024) /* max data size */
64 #define DFLSSIZ (8UL*1024*1024) /* initial stack size limit */
67 #define MAXSSIZ (512UL*1024*1024) /* max stack size */
70 #define SGROWSIZ (128UL*1024) /* amount to grow stack */
74 * We provide a machine specific single page allocator through the use
75 * of the direct mapped segment. This uses 2MB pages for reduced
79 #define UMA_MD_SMALL_ALLOC
83 * The physical address space is densely populated.
85 #define VM_PHYSSEG_DENSE
88 * The number of PHYSSEG entries must be one greater than the number
89 * of phys_avail entries because the phys_avail entry that spans the
90 * largest physical address that is accessible by ISA DMA is split
91 * into two PHYSSEG entries.
93 #define VM_PHYSSEG_MAX 63
96 * Create two free page pools: VM_FREEPOOL_DEFAULT is the default pool
97 * from which physical pages are allocated and VM_FREEPOOL_DIRECT is
98 * the pool from which physical pages for page tables and small UMA
99 * objects are allocated.
101 #define VM_NFREEPOOL 2
102 #define VM_FREEPOOL_DEFAULT 0
103 #define VM_FREEPOOL_DIRECT 1
106 * Create up to three free page lists: VM_FREELIST_DMA32 is for physical pages
107 * that have physical addresses below 4G but are not accessible by ISA DMA,
108 * and VM_FREELIST_ISADMA is for physical pages that are accessible by ISA
111 #define VM_NFREELIST 3
112 #define VM_FREELIST_DEFAULT 0
113 #define VM_FREELIST_DMA32 1
114 #define VM_FREELIST_LOWMEM 2
116 #define VM_LOWMEM_BOUNDARY (16 << 20) /* 16MB ISA DMA limit */
119 * Create the DMA32 free list only if the number of physical pages above
120 * physical address 4G is at least 16M, which amounts to 64GB of physical
123 #define VM_DMA32_NPAGES_THRESHOLD 16777216
126 * An allocation size of 16MB is supported in order to optimize the
127 * use of the direct map by UMA. Specifically, a cache line contains
128 * at most 8 PDEs, collectively mapping 16MB of physical memory. By
129 * reducing the number of distinct 16MB "pages" that are used by UMA,
130 * the physical memory allocator reduces the likelihood of both 2MB
131 * page TLB misses and cache misses caused by 2MB page TLB misses.
133 #define VM_NFREEORDER 13
136 * Enable superpage reservations: 1 level.
138 #ifndef VM_NRESERVLEVEL
139 #define VM_NRESERVLEVEL 1
143 * Level 0 reservations consist of 512 pages.
145 #ifndef VM_LEVEL_0_ORDER
146 #define VM_LEVEL_0_ORDER 9
150 #define PA_LOCK_COUNT 256
154 * Kernel physical load address for non-UEFI boot and for legacy UEFI loader.
155 * Newer UEFI loader loads kernel anywhere below 4G, with memory allocated
157 * Needs to be aligned at 2MB superpage boundary.
160 #define KERNLOAD 0x200000
164 * Virtual addresses of things. Derived from the page directory and
165 * page table indexes from pmap.h for precision.
167 * 0x0000000000000000 - 0x00007fffffffffff user map
168 * 0x0000800000000000 - 0xffff7fffffffffff does not exist (hole)
169 * 0xffff800000000000 - 0xffff804020100fff recursive page table (512GB slot)
170 * 0xffff804020100fff - 0xffff807fffffffff unused
171 * 0xffff808000000000 - 0xffff847fffffffff large map (can be tuned up)
172 * 0xffff848000000000 - 0xfffff77fffffffff unused (large map extends there)
173 * 0xfffff60000000000 - 0xfffff7ffffffffff 2TB KMSAN origin map, optional
174 * 0xfffff78000000000 - 0xfffff7bfffffffff 512GB KASAN shadow map, optional
175 * 0xfffff80000000000 - 0xfffffbffffffffff 4TB direct map
176 * 0xfffffc0000000000 - 0xfffffdffffffffff 2TB KMSAN shadow map, optional
177 * 0xfffffe0000000000 - 0xffffffffffffffff 2TB kernel map
179 * Within the kernel map:
181 * 0xfffffe0000000000 vm_page_array
182 * 0xffffffff80000000 KERNBASE
185 #define VM_MIN_KERNEL_ADDRESS KV4ADDR(KPML4BASE, 0, 0, 0)
186 #define VM_MAX_KERNEL_ADDRESS KV4ADDR(KPML4BASE + NKPML4E - 1, \
187 NPDPEPG-1, NPDEPG-1, NPTEPG-1)
189 #define DMAP_MIN_ADDRESS KV4ADDR(DMPML4I, 0, 0, 0)
190 #define DMAP_MAX_ADDRESS KV4ADDR(DMPML4I + NDMPML4E, 0, 0, 0)
192 #define KASAN_MIN_ADDRESS KV4ADDR(KASANPML4I, 0, 0, 0)
193 #define KASAN_MAX_ADDRESS KV4ADDR(KASANPML4I + NKASANPML4E, 0, 0, 0)
195 #define KMSAN_SHAD_MIN_ADDRESS KV4ADDR(KMSANSHADPML4I, 0, 0, 0)
196 #define KMSAN_SHAD_MAX_ADDRESS KV4ADDR(KMSANSHADPML4I + NKMSANSHADPML4E, \
199 #define KMSAN_ORIG_MIN_ADDRESS KV4ADDR(KMSANORIGPML4I, 0, 0, 0)
200 #define KMSAN_ORIG_MAX_ADDRESS KV4ADDR(KMSANORIGPML4I + NKMSANORIGPML4E, \
203 #define LARGEMAP_MIN_ADDRESS KV4ADDR(LMSPML4I, 0, 0, 0)
204 #define LARGEMAP_MAX_ADDRESS KV4ADDR(LMEPML4I + 1, 0, 0, 0)
207 * Formally kernel mapping starts at KERNBASE, but kernel linker
208 * script leaves first PDE reserved. For legacy BIOS boot, kernel is
209 * loaded at KERNLOAD = 2M, and initial kernel page table maps
210 * physical memory from zero to KERNend starting at KERNBASE.
212 * KERNSTART is where the first actual kernel page is mapped, after
213 * the compatibility mapping.
215 #define KERNBASE KV4ADDR(KPML4I, KPDPI, 0, 0)
216 #define KERNSTART (KERNBASE + NBPDR)
218 #define UPT_MAX_ADDRESS KV4ADDR(PML4PML4I, PML4PML4I, PML4PML4I, PML4PML4I)
219 #define UPT_MIN_ADDRESS KV4ADDR(PML4PML4I, 0, 0, 0)
221 #define VM_MAXUSER_ADDRESS_LA57 UVADDR(NUPML5E, 0, 0, 0, 0)
222 #define VM_MAXUSER_ADDRESS_LA48 UVADDR(0, NUP4ML4E, 0, 0, 0)
223 #define VM_MAXUSER_ADDRESS VM_MAXUSER_ADDRESS_LA57
225 #define SHAREDPAGE_LA57 (VM_MAXUSER_ADDRESS_LA57 - PAGE_SIZE)
226 #define SHAREDPAGE_LA48 (VM_MAXUSER_ADDRESS_LA48 - PAGE_SIZE)
227 #define USRSTACK_LA57 SHAREDPAGE_LA57
228 #define USRSTACK_LA48 SHAREDPAGE_LA48
229 #define USRSTACK USRSTACK_LA48
230 #define PS_STRINGS_LA57 (USRSTACK_LA57 - sizeof(struct ps_strings))
231 #define PS_STRINGS_LA48 (USRSTACK_LA48 - sizeof(struct ps_strings))
233 #define VM_MAX_ADDRESS UPT_MAX_ADDRESS
234 #define VM_MIN_ADDRESS (0)
237 * XXX Allowing dmaplimit == 0 is a temporary workaround for vt(4) efifb's
238 * early use of PHYS_TO_DMAP before the mapping is actually setup. This works
239 * because the result is not actually accessed until later, but the early
240 * vt fb startup needs to be reworked.
242 #define PHYS_IN_DMAP(pa) (dmaplimit == 0 || (pa) < dmaplimit)
243 #define VIRT_IN_DMAP(va) ((va) >= DMAP_MIN_ADDRESS && \
244 (va) < (DMAP_MIN_ADDRESS + dmaplimit))
246 #define PMAP_HAS_DMAP 1
247 #define PHYS_TO_DMAP(x) ({ \
248 KASSERT(PHYS_IN_DMAP(x), \
249 ("physical address %#jx not covered by the DMAP", \
251 (x) | DMAP_MIN_ADDRESS; })
253 #define DMAP_TO_PHYS(x) ({ \
254 KASSERT(VIRT_IN_DMAP(x), \
255 ("virtual address %#jx not covered by the DMAP", \
257 (x) & ~DMAP_MIN_ADDRESS; })
260 * amd64 maps the page array into KVA so that it can be more easily
261 * allocated on the correct memory domains.
263 #define PMAP_HAS_PAGE_ARRAY 1
266 * How many physical pages per kmem arena virtual page.
268 #ifndef VM_KMEM_SIZE_SCALE
269 #define VM_KMEM_SIZE_SCALE (1)
273 * Optional ceiling (in bytes) on the size of the kmem arena: 60% of the
276 #ifndef VM_KMEM_SIZE_MAX
277 #define VM_KMEM_SIZE_MAX ((VM_MAX_KERNEL_ADDRESS - \
278 VM_MIN_KERNEL_ADDRESS + 1) * 3 / 5)
281 /* initial pagein size of beginning of executable file */
282 #ifndef VM_INITIAL_PAGEIN
283 #define VM_INITIAL_PAGEIN 16
286 #define ZERO_REGION_SIZE (2 * 1024 * 1024) /* 2MB */
289 * Use a fairly large batch size since we expect amd64 systems to have lots of
292 #define VM_BATCHQUEUE_SIZE 31
295 * The pmap can create non-transparent large page mappings.
297 #define PMAP_HAS_LARGEPAGES 1
300 * Need a page dump array for minidump.
302 #define MINIDUMP_PAGE_TRACKING 1
304 #endif /* _MACHINE_VMPARAM_H_ */