1 /******************************************************************************
4 * random collection of macros and definition
13 #define CONFIG_X86_PAE
20 #if !defined(__XEN_INTERFACE_VERSION__)
21 #define __XEN_INTERFACE_VERSION__ 0x00030208
24 #define GRANT_REF_INVALID 0xffffffff
26 #include <xen/interface/xen.h>
28 /* Everything below this point is not included by assembler (.S) files. */
31 /* Force a proper event-channel callback from Xen. */
32 void force_evtchn_callback(void);
36 extern shared_info_t *HYPERVISOR_shared_info;
38 /* REP NOP (PAUSE) is a good thing to insert into busy-wait loops. */
39 static inline void rep_nop(void)
41 __asm__ __volatile__ ( "rep;nop" : : : "memory" );
43 #define cpu_relax() rep_nop()
45 /* crude memory allocator for memory allocation early in
48 void *bootmem_alloc(unsigned int size);
49 void bootmem_free(void *ptr, unsigned int size);
51 void printk(const char *fmt, ...);
53 /* some function prototypes */
56 #define likely(x) __builtin_expect((x),1)
57 #define unlikely(x) __builtin_expect((x),0)
62 * STI/CLI equivalents. These basically set and clear the virtual
63 * event_enable flag in the shared_info structure. Note that when
64 * the enable bit is set, there may be pending events to be handled.
65 * We may therefore call into do_hypervisor_callback() directly.
71 _vcpu = &HYPERVISOR_shared_info->vcpu_info[PCPU_GET(cpuid)]; \
72 _vcpu->evtchn_upcall_mask = 1; \
80 _vcpu = &HYPERVISOR_shared_info->vcpu_info[PCPU_GET(cpuid)]; \
81 _vcpu->evtchn_upcall_mask = 0; \
82 barrier(); /* unmask then check (avoid races) */ \
83 if ( unlikely(_vcpu->evtchn_upcall_pending) ) \
84 force_evtchn_callback(); \
87 #define __restore_flags(x) \
91 _vcpu = &HYPERVISOR_shared_info->vcpu_info[PCPU_GET(cpuid)]; \
92 if ((_vcpu->evtchn_upcall_mask = (x)) == 0) { \
93 barrier(); /* unmask then check (avoid races) */ \
94 if ( unlikely(_vcpu->evtchn_upcall_pending) ) \
95 force_evtchn_callback(); \
100 * Add critical_{enter, exit}?
103 #define __save_and_cli(x) \
105 vcpu_info_t *_vcpu; \
106 _vcpu = &HYPERVISOR_shared_info->vcpu_info[PCPU_GET(cpuid)]; \
107 (x) = _vcpu->evtchn_upcall_mask; \
108 _vcpu->evtchn_upcall_mask = 1; \
113 #define cli() __cli()
114 #define sti() __sti()
115 #define save_flags(x) __save_flags(x)
116 #define restore_flags(x) __restore_flags(x)
117 #define save_and_cli(x) __save_and_cli(x)
119 #define local_irq_save(x) __save_and_cli(x)
120 #define local_irq_restore(x) __restore_flags(x)
121 #define local_irq_disable() __cli()
122 #define local_irq_enable() __sti()
124 #define mtx_lock_irqsave(lock, x) {local_irq_save((x)); mtx_lock_spin((lock));}
125 #define mtx_unlock_irqrestore(lock, x) {mtx_unlock_spin((lock)); local_irq_restore((x)); }
126 #define spin_lock_irqsave mtx_lock_irqsave
127 #define spin_unlock_irqrestore mtx_unlock_irqrestore
133 #define xen_mb() mb()
136 #define xen_rmb() rmb()
139 #define xen_wmb() wmb()
142 #define smp_mb() mb()
143 #define smp_rmb() rmb()
144 #define smp_wmb() wmb()
145 #define smp_read_barrier_depends() read_barrier_depends()
146 #define set_mb(var, value) do { xchg(&var, value); } while (0)
148 #define smp_mb() barrier()
149 #define smp_rmb() barrier()
150 #define smp_wmb() barrier()
151 #define smp_read_barrier_depends() do { } while(0)
152 #define set_mb(var, value) do { var = value; barrier(); } while (0)
156 /* This is a barrier for the compiler only, NOT the processor! */
157 #define barrier() __asm__ __volatile__("": : :"memory")
159 #define LOCK_PREFIX ""
161 #define ADDR (*(volatile long *) addr)
163 * Make sure gcc doesn't try to be clever and move things around
164 * on us. We need to use _exactly_ the address the user gave us,
165 * not some alias that contains the same information.
167 typedef struct { volatile int counter; } atomic_t;
171 #define xen_xchg(ptr,v) \
172 ((__typeof__(*(ptr)))__xchg((unsigned long)(v),(ptr),sizeof(*(ptr))))
173 struct __xchg_dummy { unsigned long a[100]; };
174 #define __xg(x) ((volatile struct __xchg_dummy *)(x))
175 static __inline unsigned long __xchg(unsigned long x, volatile void * ptr,
180 __asm__ __volatile__("xchgb %b0,%1"
182 :"m" (*__xg(ptr)), "0" (x)
186 __asm__ __volatile__("xchgw %w0,%1"
188 :"m" (*__xg(ptr)), "0" (x)
192 __asm__ __volatile__("xchgl %0,%1"
194 :"m" (*__xg(ptr)), "0" (x)
202 * test_and_clear_bit - Clear a bit and return its old value
204 * @addr: Address to count from
206 * This operation is atomic and cannot be reordered.
207 * It also implies a memory barrier.
209 static __inline int test_and_clear_bit(int nr, volatile void * addr)
213 __asm__ __volatile__( LOCK_PREFIX
214 "btrl %2,%1\n\tsbbl %0,%0"
215 :"=r" (oldbit),"=m" (ADDR)
216 :"Ir" (nr) : "memory");
220 static __inline int constant_test_bit(int nr, const volatile void * addr)
222 return ((1UL << (nr & 31)) & (((const volatile unsigned int *) addr)[nr >> 5])) != 0;
225 static __inline int variable_test_bit(int nr, volatile void * addr)
229 __asm__ __volatile__(
230 "btl %2,%1\n\tsbbl %0,%0"
232 :"m" (ADDR),"Ir" (nr));
236 #define test_bit(nr,addr) \
237 (__builtin_constant_p(nr) ? \
238 constant_test_bit((nr),(addr)) : \
239 variable_test_bit((nr),(addr)))
243 * set_bit - Atomically set a bit in memory
244 * @nr: the bit to set
245 * @addr: the address to start counting from
247 * This function is atomic and may not be reordered. See __set_bit()
248 * if you do not require the atomic guarantees.
249 * Note that @nr may be almost arbitrarily large; this function is not
250 * restricted to acting on a single-word quantity.
252 static __inline__ void set_bit(int nr, volatile void * addr)
254 __asm__ __volatile__( LOCK_PREFIX
261 * clear_bit - Clears a bit in memory
263 * @addr: Address to start counting from
265 * clear_bit() is atomic and may not be reordered. However, it does
266 * not contain a memory barrier, so if it is used for locking purposes,
267 * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
268 * in order to ensure changes are visible on other processors.
270 static __inline__ void clear_bit(int nr, volatile void * addr)
272 __asm__ __volatile__( LOCK_PREFIX
279 * atomic_inc - increment atomic variable
280 * @v: pointer of type atomic_t
282 * Atomically increments @v by 1. Note that the guaranteed
283 * useful range of an atomic_t is only 24 bits.
285 static __inline__ void atomic_inc(atomic_t *v)
287 __asm__ __volatile__(
294 #define rdtscll(val) \
295 __asm__ __volatile__("rdtsc" : "=A" (val))
297 #endif /* !__ASSEMBLY__ */