2 * Copyright (c) 1997, Stefan Esser <se@freebsd.org>
3 * Copyright (c) 2000, Michael Smith <msmith@freebsd.org>
4 * Copyright (c) 2000, BSDi
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice unmodified, this list of conditions, and the following
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
32 #include <sys/param.h>
33 #include <sys/systm.h>
36 #include <sys/mutex.h>
37 #include <dev/pci/pcivar.h>
38 #include <dev/pci/pcireg.h>
39 #include <machine/pci_cfgreg.h>
41 static int pcireg_cfgread(int bus, int slot, int func, int reg, int bytes);
42 static void pcireg_cfgwrite(int bus, int slot, int func, int reg, int data, int bytes);
44 static struct mtx pcicfg_mtx;
47 * Initialise access to PCI configuration space
52 static int opened = 0;
56 mtx_init(&pcicfg_mtx, "pcicfg", NULL, MTX_SPIN);
62 * Read configuration space register
65 pci_cfgregread(int bus, int slot, int func, int reg, int bytes)
70 * Some BIOS writers seem to want to ignore the spec and put
71 * 0 in the intline rather than 255 to indicate none. Some use
72 * numbers in the range 128-254 to indicate something strange and
73 * apparently undocumented anywhere. Assume these are completely bogus
74 * and map them to 255, which the rest of the PCI code recognizes as
77 if (reg == PCIR_INTLINE && bytes == 1) {
78 line = pcireg_cfgread(bus, slot, func, PCIR_INTLINE, 1);
79 if (line == 0 || line >= 128)
80 line = PCI_INVALID_IRQ;
83 return (pcireg_cfgread(bus, slot, func, reg, bytes));
87 * Write configuration space register
90 pci_cfgregwrite(int bus, int slot, int func, int reg, u_int32_t data, int bytes)
93 pcireg_cfgwrite(bus, slot, func, reg, data, bytes);
97 * Configuration space access using direct register operations
100 /* enable configuration space accesses and return data port address */
102 pci_cfgenable(unsigned bus, unsigned slot, unsigned func, int reg, int bytes)
106 if (bus <= PCI_BUSMAX && slot < 32 && func <= PCI_FUNCMAX &&
107 reg <= PCI_REGMAX && bytes != 3 && (unsigned) bytes <= 4 &&
108 (reg & (bytes - 1)) == 0) {
109 outl(CONF1_ADDR_PORT, (1 << 31) | (bus << 16) | (slot << 11)
110 | (func << 8) | (reg & ~0x03));
111 dataport = CONF1_DATA_PORT + (reg & 0x03);
116 /* disable configuration space accesses */
122 * Do nothing. Writing a 0 to the address port can apparently
123 * confuse some bridges and cause spurious access failures.
128 pcireg_cfgread(int bus, int slot, int func, int reg, int bytes)
133 mtx_lock_spin(&pcicfg_mtx);
134 port = pci_cfgenable(bus, slot, func, reg, bytes);
149 mtx_unlock_spin(&pcicfg_mtx);
154 pcireg_cfgwrite(int bus, int slot, int func, int reg, int data, int bytes)
158 mtx_lock_spin(&pcicfg_mtx);
159 port = pci_cfgenable(bus, slot, func, reg, bytes);
174 mtx_unlock_spin(&pcicfg_mtx);