2 * Copyright (c) 2013 Anish Gupta (akgupt3@gmail.com)
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice unmodified, this list of conditions, and the following
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
30 #include <sys/param.h>
31 #include <sys/systm.h>
32 #include <sys/cpuset.h>
34 #include <machine/segments.h>
35 #include <machine/specialreg.h>
36 #include <machine/vmm.h>
42 * The VMCB aka Virtual Machine Control Block is a 4KB aligned page
43 * in memory that describes the virtual machine.
46 * - instructions or events in the guest to intercept
47 * - control bits that modify execution environment of the guest
48 * - guest processor state (e.g. general purpose registers)
52 * Initialize SVM h/w context i.e. the VMCB control and saved state areas.
55 svm_init_vmcb(struct vmcb *vmcb, uint64_t iopm_base_pa,
56 uint64_t msrpm_base_pa, uint64_t np_pml4)
58 struct vmcb_ctrl *ctrl;
59 struct vmcb_state *state;
64 ctrl->iopm_base_pa = iopm_base_pa;
65 ctrl->msrpm_base_pa = msrpm_base_pa;
67 /* Enable nested paging */
69 ctrl->n_cr3 = np_pml4;
71 /* EFER_SVM must always be set when the guest is executing */
72 state->efer = EFER_SVM;
78 * Set non-persistent fields of VMCB that are cleared by VMEXIT and must
79 * be set before restarting the guest (e.g. ASID, intercepts etc).
81 * APM2, Section 15.6, VMEXIT
84 svm_set_vmcb(struct vmcb *vmcb, uint8_t asid)
86 struct vmcb_ctrl *ctrl;
87 struct vmcb_state *state;
94 * Intercept accesses to the control registers that are not shadowed
95 * in the VMCB - i.e. all except cr0, cr2, cr3, cr4 and cr8.
97 cr_shadow = BIT(0) | BIT(2) | BIT(3) | BIT(4) | BIT(8);
98 ctrl->cr_write = ctrl->cr_read = ~cr_shadow;
100 /* Intercept Machine Check exceptions. */
101 ctrl->exception = BIT(IDT_MC);
103 /* Intercept various events (for e.g. I/O, MSR and CPUID accesses) */
104 ctrl->ctrl1 = VMCB_INTCPT_IO |
113 VMCB_INTCPT_FERR_FREEZE |
114 VMCB_INTCPT_SHUTDOWN;
116 /* VMRUN intercept is required, see APM2 */
117 ctrl->ctrl2 = VMCB_INTCPT_VMRUN;
119 /* ASID is cleared after every #VMEXIT. */
123 * Section 15.21.1, Interrupt Masking in EFLAGS
124 * Section 15.21.2, Virtualizing APIC.TPR
126 * This must be set for %rflag and %cr8 isolation of guest and host.
128 ctrl->v_intr_masking = 1;
130 /* Enable Last Branch Record aka LBR for debugging */
131 ctrl->lbr_virt_en = 1;
132 state->dbgctl = BIT(0);
138 * Read from segment selector, control and general purpose register of VMCB.
141 vmcb_read(struct vmcb *vmcb, int ident, uint64_t *retval)
143 struct vmcb_state *state;
144 struct vmcb_segment *seg;
147 state = &vmcb->state;
151 case VM_REG_GUEST_CR0:
152 *retval = state->cr0;
155 case VM_REG_GUEST_CR3:
156 *retval = state->cr3;
159 case VM_REG_GUEST_CR4:
160 *retval = state->cr4;
163 case VM_REG_GUEST_DR7:
164 *retval = state->dr7;
167 case VM_REG_GUEST_EFER:
168 *retval = state->efer;
171 case VM_REG_GUEST_RAX:
172 *retval = state->rax;
175 case VM_REG_GUEST_RFLAGS:
176 *retval = state->rflags;
179 case VM_REG_GUEST_RIP:
180 *retval = state->rip;
183 case VM_REG_GUEST_RSP:
184 *retval = state->rsp;
187 case VM_REG_GUEST_CS:
188 case VM_REG_GUEST_DS:
189 case VM_REG_GUEST_ES:
190 case VM_REG_GUEST_FS:
191 case VM_REG_GUEST_GS:
192 case VM_REG_GUEST_SS:
193 case VM_REG_GUEST_GDTR:
194 case VM_REG_GUEST_IDTR:
195 case VM_REG_GUEST_LDTR:
196 case VM_REG_GUEST_TR:
197 seg = vmcb_seg(vmcb, ident);
199 ERR("Invalid seg type %d\n", ident);
204 *retval = seg->selector;
216 * Write to segment selector, control and general purpose register of VMCB.
219 vmcb_write(struct vmcb *vmcb, int ident, uint64_t val)
221 struct vmcb_state *state;
222 struct vmcb_segment *seg;
225 state = &vmcb->state;
229 case VM_REG_GUEST_CR0:
233 case VM_REG_GUEST_CR3:
237 case VM_REG_GUEST_CR4:
241 case VM_REG_GUEST_DR7:
245 case VM_REG_GUEST_EFER:
246 /* EFER_SVM must always be set when the guest is executing */
247 state->efer = val | EFER_SVM;
250 case VM_REG_GUEST_RAX:
254 case VM_REG_GUEST_RFLAGS:
258 case VM_REG_GUEST_RIP:
262 case VM_REG_GUEST_RSP:
266 case VM_REG_GUEST_CS:
267 case VM_REG_GUEST_DS:
268 case VM_REG_GUEST_ES:
269 case VM_REG_GUEST_FS:
270 case VM_REG_GUEST_GS:
271 case VM_REG_GUEST_SS:
272 case VM_REG_GUEST_GDTR:
273 case VM_REG_GUEST_IDTR:
274 case VM_REG_GUEST_LDTR:
275 case VM_REG_GUEST_TR:
276 seg = vmcb_seg(vmcb, ident);
278 ERR("Invalid segment type %d\n", ident);
294 * Return VMCB segment area.
296 struct vmcb_segment *
297 vmcb_seg(struct vmcb *vmcb, int type)
299 struct vmcb_state *state;
300 struct vmcb_segment *seg;
302 state = &vmcb->state;
305 case VM_REG_GUEST_CS:
309 case VM_REG_GUEST_DS:
313 case VM_REG_GUEST_ES:
317 case VM_REG_GUEST_FS:
321 case VM_REG_GUEST_GS:
325 case VM_REG_GUEST_SS:
329 case VM_REG_GUEST_GDTR:
333 case VM_REG_GUEST_IDTR:
337 case VM_REG_GUEST_LDTR:
341 case VM_REG_GUEST_TR:
354 * Inject an event to vcpu as described in section 15.20, "Event injection".
357 vmcb_eventinject(struct vmcb_ctrl *ctrl, int type, int vector,
358 uint32_t error, boolean_t ec_valid)
362 static uint8_t svm_intr_type_map[VM_EVENT_MAX] = {
363 -1, /* VM_EVENT_NONE */
364 VMCB_EVENTINJ_TYPE_INTR, /* VM_HW_INTR */
365 VMCB_EVENTINJ_TYPE_NMI, /* VM_NMI */
366 VMCB_EVENTINJ_TYPE_EXCEPTION, /* VM_HW_EXCEPTION */
367 VMCB_EVENTINJ_TYPE_INTn, /* VM_SW_INTR, INT */
368 VMCB_EVENTINJ_TYPE_INTn, /* VM_PRIV_SW_EXCEPTION */
369 VMCB_EVENTINJ_TYPE_INTn, /* VM_SW_EXCEPTION */
372 intr_type = svm_intr_type_map[type];
373 if (intr_type < VMCB_EVENTINJ_TYPE_INTR ||
374 intr_type > VMCB_EVENTINJ_TYPE_INTn) {
375 ERR("Event:%d is not supported by SVM.\n", type);
379 if (intr_type == VMCB_EVENTINJ_TYPE_EXCEPTION && vector == IDT_NMI) {
380 ERR("NMI with Exception type is not possible.\n");
384 ctrl->eventinj = (vector & VMCB_EVENTINJ_VECTOR_MASK) |
385 (intr_type << VMCB_EVENTINJ_INTR_TYPE_SHIFT) |
386 (ec_valid ? VMCB_EVENTINJ_EC_VALID : 0) |
389 ctrl->eventinj |= (uint64_t)error << VMCB_EVENTINJ_ERRCODE_SHIFT;