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1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2011 NetApp, Inc.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  *
28  * $FreeBSD$
29  */
30
31 #ifndef _VMCS_H_
32 #define _VMCS_H_
33
34 #ifdef _KERNEL
35 struct vmcs {
36         uint32_t        identifier;
37         uint32_t        abort_code;
38         char            _impl_specific[PAGE_SIZE - sizeof(uint32_t) * 2];
39 };
40 CTASSERT(sizeof(struct vmcs) == PAGE_SIZE);
41
42 /* MSR save region is composed of an array of 'struct msr_entry' */
43 struct msr_entry {
44         uint32_t        index;
45         uint32_t        reserved;
46         uint64_t        val;
47
48 };
49
50 int vmcs_set_msr_save(struct vmcs *vmcs, u_long g_area, u_int g_count);
51 int     vmcs_init(struct vmcs *vmcs);
52 int     vmcs_getreg(struct vmcs *vmcs, int running, int ident, uint64_t *rv);
53 int     vmcs_setreg(struct vmcs *vmcs, int running, int ident, uint64_t val);
54 int     vmcs_getdesc(struct vmcs *vmcs, int running, int ident,
55                      struct seg_desc *desc);
56 int     vmcs_setdesc(struct vmcs *vmcs, int running, int ident,
57                      struct seg_desc *desc);
58
59 /*
60  * Avoid header pollution caused by inline use of 'vtophys()' in vmx_cpufunc.h
61  */
62 #ifdef _VMX_CPUFUNC_H_
63 static __inline uint64_t
64 vmcs_read(uint32_t encoding)
65 {
66         int error;
67         uint64_t val;
68
69         error = vmread(encoding, &val);
70         KASSERT(error == 0, ("vmcs_read(%u) error %d", encoding, error));
71         return (val);
72 }
73
74 static __inline void
75 vmcs_write(uint32_t encoding, uint64_t val)
76 {
77         int error;
78
79         error = vmwrite(encoding, val);
80         KASSERT(error == 0, ("vmcs_write(%u) error %d", encoding, error));
81 }
82 #endif  /* _VMX_CPUFUNC_H_ */
83
84 #define vmexit_instruction_length()     vmcs_read(VMCS_EXIT_INSTRUCTION_LENGTH)
85 #define vmcs_guest_rip()                vmcs_read(VMCS_GUEST_RIP)
86 #define vmcs_instruction_error()        vmcs_read(VMCS_INSTRUCTION_ERROR)
87 #define vmcs_exit_reason()              (vmcs_read(VMCS_EXIT_REASON) & 0xffff)
88 #define vmcs_exit_qualification()       vmcs_read(VMCS_EXIT_QUALIFICATION)
89 #define vmcs_guest_cr3()                vmcs_read(VMCS_GUEST_CR3)
90 #define vmcs_gpa()                      vmcs_read(VMCS_GUEST_PHYSICAL_ADDRESS)
91 #define vmcs_gla()                      vmcs_read(VMCS_GUEST_LINEAR_ADDRESS)
92 #define vmcs_idt_vectoring_info()       vmcs_read(VMCS_IDT_VECTORING_INFO)
93 #define vmcs_idt_vectoring_err()        vmcs_read(VMCS_IDT_VECTORING_ERROR)
94
95 #endif  /* _KERNEL */
96
97 #define VMCS_INITIAL                    0xffffffffffffffff
98
99 #define VMCS_IDENT(encoding)            ((encoding) | 0x80000000)
100 /*
101  * VMCS field encodings from Appendix H, Intel Architecture Manual Vol3B.
102  */
103 #define VMCS_INVALID_ENCODING           0xffffffff
104
105 /* 16-bit control fields */
106 #define VMCS_VPID                       0x00000000
107 #define VMCS_PIR_VECTOR                 0x00000002
108
109 /* 16-bit guest-state fields */
110 #define VMCS_GUEST_ES_SELECTOR          0x00000800
111 #define VMCS_GUEST_CS_SELECTOR          0x00000802
112 #define VMCS_GUEST_SS_SELECTOR          0x00000804
113 #define VMCS_GUEST_DS_SELECTOR          0x00000806
114 #define VMCS_GUEST_FS_SELECTOR          0x00000808
115 #define VMCS_GUEST_GS_SELECTOR          0x0000080A
116 #define VMCS_GUEST_LDTR_SELECTOR        0x0000080C
117 #define VMCS_GUEST_TR_SELECTOR          0x0000080E
118 #define VMCS_GUEST_INTR_STATUS          0x00000810
119
120 /* 16-bit host-state fields */
121 #define VMCS_HOST_ES_SELECTOR           0x00000C00
122 #define VMCS_HOST_CS_SELECTOR           0x00000C02
123 #define VMCS_HOST_SS_SELECTOR           0x00000C04
124 #define VMCS_HOST_DS_SELECTOR           0x00000C06
125 #define VMCS_HOST_FS_SELECTOR           0x00000C08
126 #define VMCS_HOST_GS_SELECTOR           0x00000C0A
127 #define VMCS_HOST_TR_SELECTOR           0x00000C0C
128
129 /* 64-bit control fields */
130 #define VMCS_IO_BITMAP_A                0x00002000
131 #define VMCS_IO_BITMAP_B                0x00002002
132 #define VMCS_MSR_BITMAP                 0x00002004
133 #define VMCS_EXIT_MSR_STORE             0x00002006
134 #define VMCS_EXIT_MSR_LOAD              0x00002008
135 #define VMCS_ENTRY_MSR_LOAD             0x0000200A
136 #define VMCS_EXECUTIVE_VMCS             0x0000200C
137 #define VMCS_TSC_OFFSET                 0x00002010
138 #define VMCS_VIRTUAL_APIC               0x00002012
139 #define VMCS_APIC_ACCESS                0x00002014
140 #define VMCS_PIR_DESC                   0x00002016
141 #define VMCS_EPTP                       0x0000201A
142 #define VMCS_EOI_EXIT0                  0x0000201C
143 #define VMCS_EOI_EXIT1                  0x0000201E
144 #define VMCS_EOI_EXIT2                  0x00002020
145 #define VMCS_EOI_EXIT3                  0x00002022
146 #define VMCS_EOI_EXIT(vector)           (VMCS_EOI_EXIT0 + ((vector) / 64) * 2)
147
148 /* 64-bit read-only fields */
149 #define VMCS_GUEST_PHYSICAL_ADDRESS     0x00002400
150
151 /* 64-bit guest-state fields */
152 #define VMCS_LINK_POINTER               0x00002800
153 #define VMCS_GUEST_IA32_DEBUGCTL        0x00002802
154 #define VMCS_GUEST_IA32_PAT             0x00002804
155 #define VMCS_GUEST_IA32_EFER            0x00002806
156 #define VMCS_GUEST_IA32_PERF_GLOBAL_CTRL 0x00002808
157 #define VMCS_GUEST_PDPTE0               0x0000280A
158 #define VMCS_GUEST_PDPTE1               0x0000280C
159 #define VMCS_GUEST_PDPTE2               0x0000280E
160 #define VMCS_GUEST_PDPTE3               0x00002810
161
162 /* 64-bit host-state fields */
163 #define VMCS_HOST_IA32_PAT              0x00002C00
164 #define VMCS_HOST_IA32_EFER             0x00002C02
165 #define VMCS_HOST_IA32_PERF_GLOBAL_CTRL 0x00002C04
166
167 /* 32-bit control fields */
168 #define VMCS_PIN_BASED_CTLS             0x00004000
169 #define VMCS_PRI_PROC_BASED_CTLS        0x00004002
170 #define VMCS_EXCEPTION_BITMAP           0x00004004
171 #define VMCS_PF_ERROR_MASK              0x00004006
172 #define VMCS_PF_ERROR_MATCH             0x00004008
173 #define VMCS_CR3_TARGET_COUNT           0x0000400A
174 #define VMCS_EXIT_CTLS                  0x0000400C
175 #define VMCS_EXIT_MSR_STORE_COUNT       0x0000400E
176 #define VMCS_EXIT_MSR_LOAD_COUNT        0x00004010
177 #define VMCS_ENTRY_CTLS                 0x00004012
178 #define VMCS_ENTRY_MSR_LOAD_COUNT       0x00004014
179 #define VMCS_ENTRY_INTR_INFO            0x00004016
180 #define VMCS_ENTRY_EXCEPTION_ERROR      0x00004018
181 #define VMCS_ENTRY_INST_LENGTH          0x0000401A
182 #define VMCS_TPR_THRESHOLD              0x0000401C
183 #define VMCS_SEC_PROC_BASED_CTLS        0x0000401E
184 #define VMCS_PLE_GAP                    0x00004020
185 #define VMCS_PLE_WINDOW                 0x00004022
186
187 /* 32-bit read-only data fields */
188 #define VMCS_INSTRUCTION_ERROR          0x00004400
189 #define VMCS_EXIT_REASON                0x00004402
190 #define VMCS_EXIT_INTR_INFO             0x00004404
191 #define VMCS_EXIT_INTR_ERRCODE          0x00004406
192 #define VMCS_IDT_VECTORING_INFO         0x00004408
193 #define VMCS_IDT_VECTORING_ERROR        0x0000440A
194 #define VMCS_EXIT_INSTRUCTION_LENGTH    0x0000440C
195 #define VMCS_EXIT_INSTRUCTION_INFO      0x0000440E
196
197 /* 32-bit guest-state fields */
198 #define VMCS_GUEST_ES_LIMIT             0x00004800
199 #define VMCS_GUEST_CS_LIMIT             0x00004802
200 #define VMCS_GUEST_SS_LIMIT             0x00004804
201 #define VMCS_GUEST_DS_LIMIT             0x00004806
202 #define VMCS_GUEST_FS_LIMIT             0x00004808
203 #define VMCS_GUEST_GS_LIMIT             0x0000480A
204 #define VMCS_GUEST_LDTR_LIMIT           0x0000480C
205 #define VMCS_GUEST_TR_LIMIT             0x0000480E
206 #define VMCS_GUEST_GDTR_LIMIT           0x00004810
207 #define VMCS_GUEST_IDTR_LIMIT           0x00004812
208 #define VMCS_GUEST_ES_ACCESS_RIGHTS     0x00004814
209 #define VMCS_GUEST_CS_ACCESS_RIGHTS     0x00004816
210 #define VMCS_GUEST_SS_ACCESS_RIGHTS     0x00004818
211 #define VMCS_GUEST_DS_ACCESS_RIGHTS     0x0000481A
212 #define VMCS_GUEST_FS_ACCESS_RIGHTS     0x0000481C
213 #define VMCS_GUEST_GS_ACCESS_RIGHTS     0x0000481E
214 #define VMCS_GUEST_LDTR_ACCESS_RIGHTS   0x00004820
215 #define VMCS_GUEST_TR_ACCESS_RIGHTS     0x00004822
216 #define VMCS_GUEST_INTERRUPTIBILITY     0x00004824
217 #define VMCS_GUEST_ACTIVITY             0x00004826
218 #define VMCS_GUEST_SMBASE               0x00004828
219 #define VMCS_GUEST_IA32_SYSENTER_CS     0x0000482A
220 #define VMCS_PREEMPTION_TIMER_VALUE     0x0000482E
221
222 /* 32-bit host state fields */
223 #define VMCS_HOST_IA32_SYSENTER_CS      0x00004C00
224
225 /* Natural Width control fields */
226 #define VMCS_CR0_MASK                   0x00006000
227 #define VMCS_CR4_MASK                   0x00006002
228 #define VMCS_CR0_SHADOW                 0x00006004
229 #define VMCS_CR4_SHADOW                 0x00006006
230 #define VMCS_CR3_TARGET0                0x00006008
231 #define VMCS_CR3_TARGET1                0x0000600A
232 #define VMCS_CR3_TARGET2                0x0000600C
233 #define VMCS_CR3_TARGET3                0x0000600E
234
235 /* Natural Width read-only fields */
236 #define VMCS_EXIT_QUALIFICATION         0x00006400
237 #define VMCS_IO_RCX                     0x00006402
238 #define VMCS_IO_RSI                     0x00006404
239 #define VMCS_IO_RDI                     0x00006406
240 #define VMCS_IO_RIP                     0x00006408
241 #define VMCS_GUEST_LINEAR_ADDRESS       0x0000640A
242
243 /* Natural Width guest-state fields */
244 #define VMCS_GUEST_CR0                  0x00006800
245 #define VMCS_GUEST_CR3                  0x00006802
246 #define VMCS_GUEST_CR4                  0x00006804
247 #define VMCS_GUEST_ES_BASE              0x00006806
248 #define VMCS_GUEST_CS_BASE              0x00006808
249 #define VMCS_GUEST_SS_BASE              0x0000680A
250 #define VMCS_GUEST_DS_BASE              0x0000680C
251 #define VMCS_GUEST_FS_BASE              0x0000680E
252 #define VMCS_GUEST_GS_BASE              0x00006810
253 #define VMCS_GUEST_LDTR_BASE            0x00006812
254 #define VMCS_GUEST_TR_BASE              0x00006814
255 #define VMCS_GUEST_GDTR_BASE            0x00006816
256 #define VMCS_GUEST_IDTR_BASE            0x00006818
257 #define VMCS_GUEST_DR7                  0x0000681A
258 #define VMCS_GUEST_RSP                  0x0000681C
259 #define VMCS_GUEST_RIP                  0x0000681E
260 #define VMCS_GUEST_RFLAGS               0x00006820
261 #define VMCS_GUEST_PENDING_DBG_EXCEPTIONS 0x00006822
262 #define VMCS_GUEST_IA32_SYSENTER_ESP    0x00006824
263 #define VMCS_GUEST_IA32_SYSENTER_EIP    0x00006826
264
265 /* Natural Width host-state fields */
266 #define VMCS_HOST_CR0                   0x00006C00
267 #define VMCS_HOST_CR3                   0x00006C02
268 #define VMCS_HOST_CR4                   0x00006C04
269 #define VMCS_HOST_FS_BASE               0x00006C06
270 #define VMCS_HOST_GS_BASE               0x00006C08
271 #define VMCS_HOST_TR_BASE               0x00006C0A
272 #define VMCS_HOST_GDTR_BASE             0x00006C0C
273 #define VMCS_HOST_IDTR_BASE             0x00006C0E
274 #define VMCS_HOST_IA32_SYSENTER_ESP     0x00006C10
275 #define VMCS_HOST_IA32_SYSENTER_EIP     0x00006C12
276 #define VMCS_HOST_RSP                   0x00006C14
277 #define VMCS_HOST_RIP                   0x00006c16
278
279 /*
280  * VM instruction error numbers
281  */
282 #define VMRESUME_WITH_NON_LAUNCHED_VMCS 5
283
284 /*
285  * VMCS exit reasons
286  */
287 #define EXIT_REASON_EXCEPTION           0
288 #define EXIT_REASON_EXT_INTR            1
289 #define EXIT_REASON_TRIPLE_FAULT        2
290 #define EXIT_REASON_INIT                3
291 #define EXIT_REASON_SIPI                4
292 #define EXIT_REASON_IO_SMI              5
293 #define EXIT_REASON_SMI                 6
294 #define EXIT_REASON_INTR_WINDOW         7
295 #define EXIT_REASON_NMI_WINDOW          8
296 #define EXIT_REASON_TASK_SWITCH         9
297 #define EXIT_REASON_CPUID               10
298 #define EXIT_REASON_GETSEC              11
299 #define EXIT_REASON_HLT                 12
300 #define EXIT_REASON_INVD                13
301 #define EXIT_REASON_INVLPG              14
302 #define EXIT_REASON_RDPMC               15
303 #define EXIT_REASON_RDTSC               16
304 #define EXIT_REASON_RSM                 17
305 #define EXIT_REASON_VMCALL              18
306 #define EXIT_REASON_VMCLEAR             19
307 #define EXIT_REASON_VMLAUNCH            20
308 #define EXIT_REASON_VMPTRLD             21
309 #define EXIT_REASON_VMPTRST             22
310 #define EXIT_REASON_VMREAD              23
311 #define EXIT_REASON_VMRESUME            24
312 #define EXIT_REASON_VMWRITE             25
313 #define EXIT_REASON_VMXOFF              26
314 #define EXIT_REASON_VMXON               27
315 #define EXIT_REASON_CR_ACCESS           28
316 #define EXIT_REASON_DR_ACCESS           29
317 #define EXIT_REASON_INOUT               30
318 #define EXIT_REASON_RDMSR               31
319 #define EXIT_REASON_WRMSR               32
320 #define EXIT_REASON_INVAL_VMCS          33
321 #define EXIT_REASON_INVAL_MSR           34
322 #define EXIT_REASON_MWAIT               36
323 #define EXIT_REASON_MTF                 37
324 #define EXIT_REASON_MONITOR             39
325 #define EXIT_REASON_PAUSE               40
326 #define EXIT_REASON_MCE_DURING_ENTRY    41
327 #define EXIT_REASON_TPR                 43
328 #define EXIT_REASON_APIC_ACCESS         44
329 #define EXIT_REASON_VIRTUALIZED_EOI     45
330 #define EXIT_REASON_GDTR_IDTR           46
331 #define EXIT_REASON_LDTR_TR             47
332 #define EXIT_REASON_EPT_FAULT           48
333 #define EXIT_REASON_EPT_MISCONFIG       49
334 #define EXIT_REASON_INVEPT              50
335 #define EXIT_REASON_RDTSCP              51
336 #define EXIT_REASON_VMX_PREEMPT         52
337 #define EXIT_REASON_INVVPID             53
338 #define EXIT_REASON_WBINVD              54
339 #define EXIT_REASON_XSETBV              55
340 #define EXIT_REASON_APIC_WRITE          56
341
342 /*
343  * NMI unblocking due to IRET.
344  *
345  * Applies to VM-exits due to hardware exception or EPT fault.
346  */
347 #define EXIT_QUAL_NMIUDTI       (1 << 12)
348 /*
349  * VMCS interrupt information fields
350  */
351 #define VMCS_INTR_VALID         (1U << 31)
352 #define VMCS_INTR_T_MASK        0x700           /* Interruption-info type */
353 #define VMCS_INTR_T_HWINTR      (0 << 8)
354 #define VMCS_INTR_T_NMI         (2 << 8)
355 #define VMCS_INTR_T_HWEXCEPTION (3 << 8)
356 #define VMCS_INTR_T_SWINTR      (4 << 8)
357 #define VMCS_INTR_T_PRIV_SWEXCEPTION (5 << 8)
358 #define VMCS_INTR_T_SWEXCEPTION (6 << 8)
359 #define VMCS_INTR_DEL_ERRCODE   (1 << 11)
360
361 /*
362  * VMCS IDT-Vectoring information fields
363  */
364 #define VMCS_IDT_VEC_VALID              (1U << 31)
365 #define VMCS_IDT_VEC_ERRCODE_VALID      (1 << 11)
366
367 /*
368  * VMCS Guest interruptibility field
369  */
370 #define VMCS_INTERRUPTIBILITY_STI_BLOCKING      (1 << 0)
371 #define VMCS_INTERRUPTIBILITY_MOVSS_BLOCKING    (1 << 1)
372 #define VMCS_INTERRUPTIBILITY_SMI_BLOCKING      (1 << 2)
373 #define VMCS_INTERRUPTIBILITY_NMI_BLOCKING      (1 << 3)
374
375 /*
376  * Exit qualification for EXIT_REASON_INVAL_VMCS
377  */
378 #define EXIT_QUAL_NMI_WHILE_STI_BLOCKING        3
379
380 /*
381  * Exit qualification for EPT violation
382  */
383 #define EPT_VIOLATION_DATA_READ         (1UL << 0)
384 #define EPT_VIOLATION_DATA_WRITE        (1UL << 1)
385 #define EPT_VIOLATION_INST_FETCH        (1UL << 2)
386 #define EPT_VIOLATION_GPA_READABLE      (1UL << 3)
387 #define EPT_VIOLATION_GPA_WRITEABLE     (1UL << 4)
388 #define EPT_VIOLATION_GPA_EXECUTABLE    (1UL << 5)
389 #define EPT_VIOLATION_GLA_VALID         (1UL << 7)
390 #define EPT_VIOLATION_XLAT_VALID        (1UL << 8)
391
392 /*
393  * Exit qualification for APIC-access VM exit
394  */
395 #define APIC_ACCESS_OFFSET(qual)        ((qual) & 0xFFF)
396 #define APIC_ACCESS_TYPE(qual)          (((qual) >> 12) & 0xF)
397
398 /*
399  * Exit qualification for APIC-write VM exit
400  */
401 #define APIC_WRITE_OFFSET(qual)         ((qual) & 0xFFF)
402
403 #endif