sys/amd64/vmm/x86.c

   1 /*-
   2  * Copyright (c) 2011 NetApp, Inc.
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
  15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  17  * ARE DISCLAIMED.  IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
  18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  24  * SUCH DAMAGE.
  25  *
  26  * $FreeBSD$
  27  */
  28
  29 #include <sys/cdefs.h>
  30 __FBSDID("$FreeBSD$");
  31
  32 #include <sys/types.h>
  33 #include <sys/systm.h>
  34
  35 #include <machine/cpufunc.h>
  36 #include <machine/md_var.h>
  37 #include <machine/specialreg.h>
  38
  39 #include "x86.h"
  40
  41 #define CPUID_VM_HIGH           0x40000000
  42
  43 static const char bhyve_id[12] = "BHyVE BHyVE ";
  44
  45 int
  46 x86_emulate_cpuid(uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx,
  47         uint32_t vcpu_id)
  48 {
  49         unsigned int    func, regs[4];
  50
  51         func = *eax;
  52
  53         /*
  54          * Requests for invalid CPUID levels should map to the highest
  55          * available level instead.
  56          */
  57         if (cpu_exthigh != 0 && *eax >= 0x80000000) {
  58                 if (*eax > cpu_exthigh)
  59                         *eax = cpu_exthigh;
  60         } else if (*eax >= 0x40000000) {
  61                 if (*eax > CPUID_VM_HIGH)
  62                         *eax = CPUID_VM_HIGH;
  63         } else if (*eax > cpu_high) {
  64                 *eax = cpu_high;
  65         }
  66
  67         /*
  68          * In general the approach used for CPU topology is to
  69          * advertise a flat topology where all CPUs are packages with
  70          * no multi-core or SMT.
  71          */
  72         switch (func) {
  73                 case CPUID_0000_0000:
  74                 case CPUID_0000_0002:
  75                 case CPUID_0000_0003:
  76                 case CPUID_0000_000A:
  77                         cpuid_count(*eax, *ecx, regs);
  78                         break;
  79
  80                 case CPUID_8000_0000:
  81                 case CPUID_8000_0001:
  82                 case CPUID_8000_0002:
  83                 case CPUID_8000_0003:
  84                 case CPUID_8000_0004:
  85                 case CPUID_8000_0006:
  86                 case CPUID_8000_0007:
  87                 case CPUID_8000_0008:
  88                         cpuid_count(*eax, *ecx, regs);
  89                         break;
  90
  91                 case CPUID_0000_0001:
  92                         do_cpuid(1, regs);
  93
  94                         /*
  95                          * Override the APIC ID only in ebx
  96                          */
  97                         regs[1] &= ~(CPUID_LOCAL_APIC_ID);
  98                         regs[1] |= (vcpu_id << CPUID_0000_0001_APICID_SHIFT);
  99
 100                         /*
 101                          * Don't expose VMX, SpeedStep or TME capability.
 102                          * Advertise x2APIC capability and Hypervisor guest.
 103                          */
 104                         regs[2] &= ~(CPUID2_VMX | CPUID2_EST | CPUID2_TM2);
 105                         regs[2] |= CPUID2_X2APIC | CPUID2_HV;
 106
 107                         /*
 108                          * Hide xsave/osxsave/avx until the FPU save/restore
 109                          * issues are resolved
 110                          */
 111                         regs[2] &= ~(CPUID2_XSAVE | CPUID2_OSXSAVE |
 112                                      CPUID2_AVX);
 113
 114                         /*
 115                          * Hide thermal monitoring
 116                          */
 117                         regs[3] &= ~(CPUID_ACPI | CPUID_TM);
 118
 119                         /*
 120                          * Machine check handling is done in the host.
 121                          * Hide MTRR capability.
 122                          */
 123                         regs[3] &= ~(CPUID_MCA | CPUID_MCE | CPUID_MTRR);
 124
 125                         /*
 126                          * Disable multi-core.
 127                          */
 128                         regs[1] &= ~CPUID_HTT_CORES;
 129                         regs[3] &= ~CPUID_HTT;
 130                         break;
 131
 132                 case CPUID_0000_0004:
 133                         do_cpuid(4, regs);
 134
 135                         /*
 136                          * Do not expose topology.
 137                          */
 138                         regs[0] &= 0xffff8000;
 139                         regs[0] |= 0x04008000;
 140                         break;
 141
 142                 case CPUID_0000_0006:
 143                         /*
 144                          * Handle the access, but report 0 for
 145                          * all options
 146                          */
 147                         regs[0] = 0;
 148                         regs[1] = 0;
 149                         regs[2] = 0;
 150                         regs[3] = 0;
 151                         break;
 152
 153                 case CPUID_0000_000B:
 154                         /*
 155                          * Processor topology enumeration
 156                          */
 157                         regs[0] = 0;
 158                         regs[1] = 0;
 159                         regs[2] = *ecx & 0xff;
 160                         regs[3] = vcpu_id;
 161                         break;
 162
 163                 case 0x40000000:
 164                         regs[0] = CPUID_VM_HIGH;
 165                         bcopy(bhyve_id, &regs[1], 4);
 166                         bcopy(bhyve_id, &regs[2], 4);
 167                         bcopy(bhyve_id, &regs[3], 4);
 168                         break;
 169                 default:
 170                         /* XXX: Leaf 5? */
 171                         return (0);
 172         }
 173
 174         *eax = regs[0];
 175         *ebx = regs[1];
 176         *ecx = regs[2];
 177         *edx = regs[3];
 178         return (1);
 179 }