2 * Copyright (c) 2012 Ganbold Tsagaankhuu <ganbold@gmail.com>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * Allwinner A10 attachment driver for the USB Enhanced Host Controller.
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
36 #include <sys/param.h>
37 #include <sys/systm.h>
40 #include <sys/condvar.h>
41 #include <sys/kernel.h>
42 #include <sys/module.h>
45 #include <machine/bus.h>
46 #include <dev/ofw/ofw_bus.h>
47 #include <dev/ofw/ofw_bus_subr.h>
49 #include <dev/usb/usb.h>
50 #include <dev/usb/usbdi.h>
52 #include <dev/usb/usb_core.h>
53 #include <dev/usb/usb_busdma.h>
54 #include <dev/usb/usb_process.h>
55 #include <dev/usb/usb_util.h>
57 #include <dev/usb/usb_controller.h>
58 #include <dev/usb/usb_bus.h>
59 #include <dev/usb/controller/ehci.h>
60 #include <dev/usb/controller/ehcireg.h>
66 #define EHCI_HC_DEVSTR "Allwinner Integrated USB 2.0 controller"
68 #define SW_USB_PMU_IRQ_ENABLE 0x800
70 #define SW_SDRAM_REG_HPCR_USB1 (0x250 + ((1 << 2) * 4))
71 #define SW_SDRAM_REG_HPCR_USB2 (0x250 + ((1 << 2) * 5))
72 #define SW_SDRAM_BP_HPCR_ACCESS (1 << 0)
74 #define SW_ULPI_BYPASS (1 << 0)
75 #define SW_AHB_INCRX_ALIGN (1 << 8)
76 #define SW_AHB_INCR4 (1 << 9)
77 #define SW_AHB_INCR8 (1 << 10)
78 #define GPIO_USB1_PWR 230
79 #define GPIO_USB2_PWR 227
81 #define A10_READ_4(sc, reg) \
82 bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, reg)
84 #define A10_WRITE_4(sc, reg, data) \
85 bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, reg, data)
87 static device_attach_t a10_ehci_attach;
88 static device_detach_t a10_ehci_detach;
90 bs_r_1_proto(reversed);
91 bs_w_1_proto(reversed);
94 a10_ehci_probe(device_t self)
96 if (!ofw_bus_is_compatible(self, "allwinner,usb-ehci"))
99 device_set_desc(self, EHCI_HC_DEVSTR);
101 return (BUS_PROBE_DEFAULT);
105 a10_ehci_attach(device_t self)
107 ehci_softc_t *sc = device_get_softc(self);
108 bus_space_handle_t bsh;
109 device_t sc_gpio_dev;
112 uint32_t reg_value = 0;
114 /* initialise some bus fields */
115 sc->sc_bus.parent = self;
116 sc->sc_bus.devices = sc->sc_devices;
117 sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
119 /* get all DMA memory */
120 if (usb_bus_mem_alloc_all(&sc->sc_bus,
121 USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) {
125 sc->sc_bus.usbrev = USB_REV_2_0;
128 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, RF_ACTIVE);
129 if (!sc->sc_io_res) {
130 device_printf(self, "Could not map memory\n");
134 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
135 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
136 bsh = rman_get_bushandle(sc->sc_io_res);
138 sc->sc_io_size = rman_get_size(sc->sc_io_res);
140 if (bus_space_subregion(sc->sc_io_tag, bsh, 0x00,
141 sc->sc_io_size, &sc->sc_io_hdl) != 0)
142 panic("%s: unable to subregion USB host registers",
143 device_get_name(self));
146 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
147 RF_SHAREABLE | RF_ACTIVE);
148 if (sc->sc_irq_res == NULL) {
149 device_printf(self, "Could not allocate irq\n");
152 sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
153 if (!sc->sc_bus.bdev) {
154 device_printf(self, "Could not add USB device\n");
157 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
158 device_set_desc(sc->sc_bus.bdev, EHCI_HC_DEVSTR);
160 sprintf(sc->sc_vendor, "Allwinner");
162 /* Get the GPIO device, we need this to give power to USB */
163 sc_gpio_dev = devclass_get_device(devclass_find("gpio"), 0);
164 if (sc_gpio_dev == NULL) {
165 device_printf(self, "Error: failed to get the GPIO device\n");
169 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
170 NULL, (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl);
172 device_printf(self, "Could not setup irq, %d\n", err);
173 sc->sc_intr_hdl = NULL;
177 sc->sc_flags |= EHCI_SCFLG_DONTRESET;
179 /* Enable clock for USB */
180 a10_clk_usb_activate();
182 /* Give power to USB */
183 GPIO_PIN_SETFLAGS(sc_gpio_dev, GPIO_USB2_PWR, GPIO_PIN_OUTPUT);
184 GPIO_PIN_SET(sc_gpio_dev, GPIO_USB2_PWR, GPIO_PIN_HIGH);
186 /* Give power to USB */
187 GPIO_PIN_SETFLAGS(sc_gpio_dev, GPIO_USB1_PWR, GPIO_PIN_OUTPUT);
188 GPIO_PIN_SET(sc_gpio_dev, GPIO_USB1_PWR, GPIO_PIN_HIGH);
191 reg_value = A10_READ_4(sc, SW_USB_PMU_IRQ_ENABLE);
192 reg_value |= SW_AHB_INCR8; /* AHB INCR8 enable */
193 reg_value |= SW_AHB_INCR4; /* AHB burst type INCR4 enable */
194 reg_value |= SW_AHB_INCRX_ALIGN; /* AHB INCRX align enable */
195 reg_value |= SW_ULPI_BYPASS; /* ULPI bypass enable */
196 A10_WRITE_4(sc, SW_USB_PMU_IRQ_ENABLE, reg_value);
199 reg_value = A10_READ_4(sc, SW_SDRAM_REG_HPCR_USB2);
200 reg_value |= SW_SDRAM_BP_HPCR_ACCESS;
201 A10_WRITE_4(sc, SW_SDRAM_REG_HPCR_USB2, reg_value);
205 err = device_probe_and_attach(sc->sc_bus.bdev);
208 device_printf(self, "USB init failed err=%d\n", err);
214 a10_ehci_detach(self);
219 a10_ehci_detach(device_t self)
221 ehci_softc_t *sc = device_get_softc(self);
224 uint32_t reg_value = 0;
226 if (sc->sc_bus.bdev) {
227 bdev = sc->sc_bus.bdev;
229 device_delete_child(self, bdev);
231 /* during module unload there are lots of children leftover */
232 device_delete_children(self);
234 if (sc->sc_irq_res && sc->sc_intr_hdl) {
236 * only call ehci_detach() after ehci_init()
240 err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
243 /* XXX or should we panic? */
244 device_printf(self, "Could not tear down irq, %d\n",
246 sc->sc_intr_hdl = NULL;
249 if (sc->sc_irq_res) {
250 bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res);
251 sc->sc_irq_res = NULL;
254 bus_release_resource(self, SYS_RES_MEMORY, 0,
256 sc->sc_io_res = NULL;
258 usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc);
260 /* Disable configure port */
261 reg_value = A10_READ_4(sc, SW_SDRAM_REG_HPCR_USB2);
262 reg_value &= ~SW_SDRAM_BP_HPCR_ACCESS;
263 A10_WRITE_4(sc, SW_SDRAM_REG_HPCR_USB2, reg_value);
266 reg_value = A10_READ_4(sc, SW_USB_PMU_IRQ_ENABLE);
267 reg_value &= ~SW_AHB_INCR8; /* AHB INCR8 disable */
268 reg_value &= ~SW_AHB_INCR4; /* AHB burst type INCR4 disable */
269 reg_value &= ~SW_AHB_INCRX_ALIGN; /* AHB INCRX align disable */
270 reg_value &= ~SW_ULPI_BYPASS; /* ULPI bypass disable */
271 A10_WRITE_4(sc, SW_USB_PMU_IRQ_ENABLE, reg_value);
273 /* Disable clock for USB */
274 a10_clk_usb_deactivate();
279 static device_method_t ehci_methods[] = {
280 /* Device interface */
281 DEVMETHOD(device_probe, a10_ehci_probe),
282 DEVMETHOD(device_attach, a10_ehci_attach),
283 DEVMETHOD(device_detach, a10_ehci_detach),
284 DEVMETHOD(device_suspend, bus_generic_suspend),
285 DEVMETHOD(device_resume, bus_generic_resume),
286 DEVMETHOD(device_shutdown, bus_generic_shutdown),
291 static driver_t ehci_driver = {
293 .methods = ehci_methods,
294 .size = sizeof(ehci_softc_t),
297 static devclass_t ehci_devclass;
299 DRIVER_MODULE(ehci, simplebus, ehci_driver, ehci_devclass, 0, 0);
300 MODULE_DEPEND(ehci, usb, 1, 1, 1);