2 * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
19 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
20 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
21 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
22 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/kernel.h>
35 #include <sys/types.h>
37 #include <arm/allwinner/allwinner_pinctrl.h>
41 #ifdef SOC_ALLWINNER_A64
43 static const struct allwinner_pins a64_pins[] = {
44 { "PB0", 1, 0, { "gpio_in", "gpio_out", "uart2", NULL, "jtag", NULL, "pb_eint0" }, 6, 0},
45 { "PB1", 1, 1, { "gpio_in", "gpio_out", "uart2", NULL, "jtag", "sim", "pb_eint1" }, 6, 1},
46 { "PB2", 1, 2, { "gpio_in", "gpio_out", "uart2", NULL, "jtag", "sim", "pb_eint2" }, 6, 2},
47 { "PB3", 1, 3, { "gpio_in", "gpio_out", "uart2", "i2s0", "jtag", "sim", "pb_eint3" }, 6, 3},
48 { "PB4", 1, 4, { "gpio_in", "gpio_out", "aif2", "pcm0", NULL, "sim", "pb_eint4" }, 6, 4},
49 { "PB5", 1, 5, { "gpio_in", "gpio_out", "aif2", "pcm0", NULL, "sim", "pb_eint5" }, 6, 5},
50 { "PB6", 1, 6, { "gpio_in", "gpio_out", "aif2", "pcm0", NULL, "sim", "pb_eint6" }, 6, 6},
51 { "PB7", 1, 7, { "gpio_in", "gpio_out", "aif2", "pcm0", NULL, "sim", "pb_eint7" }, 6, 7},
52 { "PB8", 1, 8, { "gpio_in", "gpio_out", NULL, NULL, "uart0", NULL, "pb_eint8" }, 6, 8},
53 { "PB9", 1, 9, { "gpio_in", "gpio_out", NULL, NULL, "uart0", NULL, "pb_eint9" }, 6, 9},
55 { "PC0", 2, 0, { "gpio_in", "gpio_out", "nand", NULL, "spi0" } },
56 { "PC1", 2, 1, { "gpio_in", "gpio_out", "nand", "mmc2", "spi0" } },
57 { "PC2", 2, 2, { "gpio_in", "gpio_out", "nand", NULL, "spi0" } },
58 { "PC3", 2, 3, { "gpio_in", "gpio_out", "nand", NULL, "spi0" } },
59 { "PC4", 2, 4, { "gpio_in", "gpio_out", "nand" } },
60 { "PC5", 2, 5, { "gpio_in", "gpio_out", "nand", "mmc2" } },
61 { "PC6", 2, 6, { "gpio_in", "gpio_out", "nand", "mmc2" } },
62 { "PC7", 2, 7, { "gpio_in", "gpio_out", "nand" } },
63 { "PC8", 2, 8, { "gpio_in", "gpio_out", "nand", "mmc2" } },
64 { "PC9", 2, 9, { "gpio_in", "gpio_out", "nand", "mmc2" } },
65 { "PC10", 2, 10, { "gpio_in", "gpio_out", "nand", "mmc2" } },
66 { "PC11", 2, 11, { "gpio_in", "gpio_out", "nand", "mmc2" } },
67 { "PC12", 2, 12, { "gpio_in", "gpio_out", "nand", "mmc2" } },
68 { "PC13", 2, 13, { "gpio_in", "gpio_out", "nand", "mmc2" } },
69 { "PC14", 2, 14, { "gpio_in", "gpio_out", "nand", "mmc2" } },
70 { "PC15", 2, 15, { "gpio_in", "gpio_out", "nand", "mmc2" } },
71 { "PC16", 2, 16, { "gpio_in", "gpio_out", "nand", "mmc2" } },
73 { "PD0", 3, 0, { "gpio_in", "gpio_out", "lcd", "uart3", "spi1", "ccir" } },
74 { "PD1", 3, 1, { "gpio_in", "gpio_out", "lcd", "uart3", "spi1", "ccir" } },
75 { "PD2", 3, 2, { "gpio_in", "gpio_out", "lcd", "uart4", "spi1", "ccir" } },
76 { "PD3", 3, 3, { "gpio_in", "gpio_out", "lcd", "uart4", "spi1", "ccir" } },
77 { "PD4", 3, 4, { "gpio_in", "gpio_out", "lcd", "uart4", "spi1", "ccir" } },
78 { "PD5", 3, 5, { "gpio_in", "gpio_out", "lcd", "uart4", "spi1", "ccir" } },
79 { "PD6", 3, 6, { "gpio_in", "gpio_out", "lcd", NULL, NULL, "ccir" } },
80 { "PD7", 3, 7, { "gpio_in", "gpio_out", "lcd", NULL, NULL, "ccir" } },
81 { "PD8", 3, 8, { "gpio_in", "gpio_out", "lcd", NULL, "emac", "ccir" } },
82 { "PD9", 3, 9, { "gpio_in", "gpio_out", "lcd", NULL, "emac", "ccir" } },
83 { "PD10", 3, 10, { "gpio_in", "gpio_out", "lcd", NULL, "emac" } },
84 { "PD11", 3, 11, { "gpio_in", "gpio_out", "lcd", NULL, "emac" } },
85 { "PD12", 3, 12, { "gpio_in", "gpio_out", "lcd", "lvds", "emac" } },
86 { "PD13", 3, 13, { "gpio_in", "gpio_out", "lcd", "lvds", "emac" } },
87 { "PD14", 3, 14, { "gpio_in", "gpio_out", "lcd", "lvds", "emac" } },
88 { "PD15", 3, 15, { "gpio_in", "gpio_out", "lcd", "lvds", "emac", "ccir" } },
89 { "PD16", 3, 16, { "gpio_in", "gpio_out", "lcd", "lvds", "emac", "ccir" } },
90 { "PD17", 3, 17, { "gpio_in", "gpio_out", "lcd", "lvds", "emac" } },
91 { "PD18", 3, 18, { "gpio_in", "gpio_out", "lcd", "lvds", "emac" } },
92 { "PD19", 3, 19, { "gpio_in", "gpio_out", "lcd", "lvds", "emac" } },
93 { "PD20", 3, 20, { "gpio_in", "gpio_out", "lcd", "lvds", "emac" } },
94 { "PD21", 3, 21, { "gpio_in", "gpio_out", "lcd", "lvds", "emac" } },
95 { "PD22", 3, 22, { "gpio_in", "gpio_out", "pwm0", NULL, "emac" } },
96 { "PD23", 3, 23, { "gpio_in", "gpio_out", NULL, NULL, "emac" } },
97 { "PD24", 3, 24, { "gpio_in", "gpio_out" } },
99 { "PE0", 4, 0, { "gpio_in", "gpio_out", "csi", NULL, "ts" } },
100 { "PE1", 4, 1, { "gpio_in", "gpio_out", "csi", NULL, "ts" } },
101 { "PE2", 4, 2, { "gpio_in", "gpio_out", "csi", NULL, "ts" } },
102 { "PE3", 4, 3, { "gpio_in", "gpio_out", "csi", NULL, "ts" } },
103 { "PE4", 4, 4, { "gpio_in", "gpio_out", "csi", NULL, "ts" } },
104 { "PE5", 4, 5, { "gpio_in", "gpio_out", "csi", NULL, "ts" } },
105 { "PE6", 4, 6, { "gpio_in", "gpio_out", "csi", NULL, "ts" } },
106 { "PE7", 4, 7, { "gpio_in", "gpio_out", "csi", NULL, "ts" } },
107 { "PE8", 4, 8, { "gpio_in", "gpio_out", "csi", NULL, "ts" } },
108 { "PE9", 4, 9, { "gpio_in", "gpio_out", "csi", NULL, "ts" } },
109 { "PE10", 4, 10, { "gpio_in", "gpio_out", "csi", NULL, "ts" } },
110 { "PE11", 4, 11, { "gpio_in", "gpio_out", "csi", NULL, "ts" } },
111 { "PE12", 4, 12, { "gpio_in", "gpio_out", "csi" } },
112 { "PE13", 4, 13, { "gpio_in", "gpio_out", "csi" } },
113 { "PE14", 4, 14, { "gpio_in", "gpio_out", "pll_lock", "twi2" } },
114 { "PE15", 4, 15, { "gpio_in", "gpio_out", NULL, "twi2" } },
115 { "PE16", 4, 16, { "gpio_in", "gpio_out" } },
116 { "PE17", 4, 17, { "gpio_in", "gpio_out" } },
118 { "PF0", 5, 0, { "gpio_in", "gpio_out", "mmc0", "jtag" } },
119 { "PF1", 5, 1, { "gpio_in", "gpio_out", "mmc0", "jtag" } },
120 { "PF2", 5, 2, { "gpio_in", "gpio_out", "mmc0", "uart0" } },
121 { "PF3", 5, 3, { "gpio_in", "gpio_out", "mmc0", "jtag" } },
122 { "PF4", 5, 4, { "gpio_in", "gpio_out", "mmc0", "uart0" } },
123 { "PF5", 5, 5, { "gpio_in", "gpio_out", "mmc0", "jtag" } },
124 { "PF6", 5, 6, { "gpio_in", "gpio_out" } },
126 { "PG0", 6, 0, { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "pg_eint0" }, 6, 0},
127 { "PG1", 6, 1, { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "pg_eint1" }, 6, 1},
128 { "PG2", 6, 2, { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "pg_eint2" }, 6, 2},
129 { "PG3", 6, 3, { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "pg_eint3" }, 6, 3},
130 { "PG4", 6, 4, { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "pg_eint4" }, 6, 4},
131 { "PG5", 6, 5, { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "pg_eint5" }, 6, 5},
132 { "PG6", 6, 6, { "gpio_in", "gpio_out", "uart1", NULL, NULL, NULL, "pg_eint6" }, 6, 6},
133 { "PG7", 6, 7, { "gpio_in", "gpio_out", "uart1", NULL, NULL, NULL, "pg_eint7" }, 6, 7},
134 { "PG8", 6, 8, { "gpio_in", "gpio_out", "uart1", NULL, NULL, NULL, "pg_eint8" }, 6, 8},
135 { "PG9", 6, 9, { "gpio_in", "gpio_out", "uart1", NULL, NULL, NULL, "pg_eint9" }, 6, 9},
136 { "PG10", 6, 10, { "gpio_in", "gpio_out", "aif3", "pcm1", NULL, NULL, "pg_eint10" }, 6, 10},
137 { "PG11", 6, 11, { "gpio_in", "gpio_out", "aif3", "pcm1", NULL, NULL, "pg_eint11" }, 6, 11},
138 { "PG12", 6, 12, { "gpio_in", "gpio_out", "aif3", "pcm1", NULL, NULL, "pg_eint12" }, 6, 12},
139 { "PG13", 6, 13, { "gpio_in", "gpio_out", "aif3", "pcm1", NULL, NULL, "pg_eint13" }, 6, 13},
141 { "PH0", 7, 0, { "gpio_in", "gpio_out", "i2c0", NULL, NULL, NULL, "ph_eint0" }, 6, 0},
142 { "PH1", 7, 1, { "gpio_in", "gpio_out", "i2c0", NULL, NULL, NULL, "ph_eint1" }, 6, 1},
143 { "PH2", 7, 2, { "gpio_in", "gpio_out", "i2c1", NULL, NULL, NULL, "ph_eint2" }, 6, 2},
144 { "PH3", 7, 3, { "gpio_in", "gpio_out", "i2c1", NULL, NULL, NULL, "ph_eint3" }, 6, 3},
145 { "PH4", 7, 4, { "gpio_in", "gpio_out", "uart3", NULL, NULL, NULL, "ph_eint4" }, 6, 4},
146 { "PH5", 7, 5, { "gpio_in", "gpio_out", "uart3", NULL, NULL, NULL, "ph_eint5" }, 6, 5},
147 { "PH6", 7, 6, { "gpio_in", "gpio_out", "uart3", NULL, NULL, NULL, "ph_eint6" }, 6, 6},
148 { "PH7", 7, 7, { "gpio_in", "gpio_out", "uart3", NULL, NULL, NULL, "ph_eint7" }, 6, 7},
149 { "PH8", 7, 8, { "gpio_in", "gpio_out", "owa", NULL, NULL, NULL, "ph_eint8" }, 6, 8},
150 { "PH9", 7, 9, { "gpio_in", "gpio_out", NULL, NULL, NULL, NULL, "ph_eint9" }, 6, 9},
151 { "PH10", 7, 10, { "gpio_in", "gpio_out", "mic", NULL, NULL, NULL, "ph_eint10" }, 6, 10},
152 { "PH11", 7, 11, { "gpio_in", "gpio_out", "mic", NULL, NULL, NULL, "ph_eint11" }, 6, 11},
155 const struct allwinner_padconf a64_padconf = {
156 .npins = nitems(a64_pins),
160 #endif /* !SOC_ALLWINNER_A64 */