2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2018 Emmanuel Vadot <manu@FreeBSD.org>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
20 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
21 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
22 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
23 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
33 #include <sys/param.h>
34 #include <sys/systm.h>
36 #include <sys/kernel.h>
37 #include <sys/module.h>
39 #include <sys/resource.h>
40 #include <machine/bus.h>
42 #include <dev/ofw/ofw_bus.h>
43 #include <dev/ofw/ofw_bus_subr.h>
45 #include <dev/extres/clk/clk.h>
47 #include "pwmbus_if.h"
49 #define AW_PWM_CTRL 0x00
50 #define AW_PWM_CTRL_PRESCALE_MASK 0xF
51 #define AW_PWM_CTRL_EN (1 << 4)
52 #define AW_PWM_CTRL_ACTIVE_LEVEL_HIGH (1 << 5)
53 #define AW_PWM_CTRL_GATE (1 << 6)
54 #define AW_PWM_CTRL_MODE_MASK 0x80
55 #define AW_PWM_CTRL_PULSE_MODE (1 << 7)
56 #define AW_PWM_CTRL_CYCLE_MODE (0 << 7)
57 #define AW_PWM_CTRL_PULSE_START (1 << 8)
58 #define AW_PWM_CTRL_CLK_BYPASS (1 << 9)
59 #define AW_PWM_CTRL_PERIOD_BUSY (1 << 28)
61 #define AW_PWM_PERIOD 0x04
62 #define AW_PWM_PERIOD_TOTAL_MASK 0xFFFF
63 #define AW_PWM_PERIOD_TOTAL_SHIFT 16
64 #define AW_PWM_PERIOD_ACTIVE_MASK 0xFFFF
65 #define AW_PWM_PERIOD_ACTIVE_SHIFT 0
67 #define AW_PWM_MAX_FREQ 24000000
69 #define NS_PER_SEC 1000000000
71 static struct ofw_compat_data compat_data[] = {
72 { "allwinner,sun5i-a13-pwm", 1 },
73 { "allwinner,sun8i-h3-pwm", 1 },
77 static struct resource_spec aw_pwm_spec[] = {
78 { SYS_RES_MEMORY, 0, RF_ACTIVE },
95 static uint32_t aw_pwm_clk_prescaler[] = {
114 #define AW_PWM_READ(sc, reg) bus_read_4((sc)->res, (reg))
115 #define AW_PWM_WRITE(sc, reg, val) bus_write_4((sc)->res, (reg), (val))
117 static int aw_pwm_probe(device_t dev);
118 static int aw_pwm_attach(device_t dev);
119 static int aw_pwm_detach(device_t dev);
122 aw_pwm_probe(device_t dev)
124 if (!ofw_bus_status_okay(dev))
127 if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data)
130 device_set_desc(dev, "Allwinner PWM");
131 return (BUS_PROBE_DEFAULT);
135 aw_pwm_attach(device_t dev)
137 struct aw_pwm_softc *sc;
143 sc = device_get_softc(dev);
146 error = clk_get_by_ofw_index(dev, 0, 0, &sc->clk);
148 device_printf(dev, "cannot get clock\n");
151 error = clk_enable(sc->clk);
153 device_printf(dev, "cannot enable clock\n");
157 error = clk_get_freq(sc->clk, &sc->clk_freq);
159 device_printf(dev, "cannot get clock frequency\n");
163 if (bus_alloc_resources(dev, aw_pwm_spec, &sc->res) != 0) {
164 device_printf(dev, "cannot allocate resources for device\n");
169 /* Read the configuration left by U-Boot */
170 reg = AW_PWM_READ(sc, AW_PWM_CTRL);
171 if (reg & (AW_PWM_CTRL_GATE | AW_PWM_CTRL_EN))
174 reg = AW_PWM_READ(sc, AW_PWM_CTRL);
175 reg &= AW_PWM_CTRL_PRESCALE_MASK;
176 if (reg > nitems(aw_pwm_clk_prescaler)) {
177 device_printf(dev, "Bad prescaler %x, cannot guess current settings\n", reg);
180 clk_freq = sc->clk_freq / aw_pwm_clk_prescaler[reg];
182 reg = AW_PWM_READ(sc, AW_PWM_PERIOD);
183 sc->period = NS_PER_SEC /
184 (clk_freq / ((reg >> AW_PWM_PERIOD_TOTAL_SHIFT) & AW_PWM_PERIOD_TOTAL_MASK));
185 sc->duty = NS_PER_SEC /
186 (clk_freq / ((reg >> AW_PWM_PERIOD_ACTIVE_SHIFT) & AW_PWM_PERIOD_ACTIVE_MASK));
190 * Note that we don't check for failure to attach pwmbus -- even without
191 * it we can still service clients who connect via fdt xref data.
193 node = ofw_bus_get_node(dev);
194 OF_device_register_xref(OF_xref_from_node(node), dev);
196 sc->busdev = device_add_child(dev, "pwmbus", -1);
198 return (bus_generic_attach(dev));
206 aw_pwm_detach(device_t dev)
208 struct aw_pwm_softc *sc;
211 sc = device_get_softc(dev);
213 if ((error = bus_generic_detach(sc->dev)) != 0) {
214 device_printf(sc->dev, "cannot detach child devices\n");
218 if (sc->busdev != NULL)
219 device_delete_child(dev, sc->busdev);
222 bus_release_resources(dev, aw_pwm_spec, &sc->res);
228 aw_pwm_get_node(device_t bus, device_t dev)
232 * Share our controller node with our pwmbus child; it instantiates
233 * devices by walking the children contained within our node.
235 return ofw_bus_get_node(bus);
239 aw_pwm_channel_count(device_t dev, u_int *nchannel)
248 aw_pwm_channel_config(device_t dev, u_int channel, u_int period, u_int duty)
250 struct aw_pwm_softc *sc;
251 uint64_t period_freq, duty_freq;
252 uint64_t clk_rate, div;
257 sc = device_get_softc(dev);
259 period_freq = NS_PER_SEC / period;
260 if (period_freq > AW_PWM_MAX_FREQ)
262 duty_freq = NS_PER_SEC / duty;
263 if (duty_freq < period_freq) {
264 device_printf(sc->dev, "duty < period\n");
268 /* First test without prescaler */
269 clk_rate = AW_PWM_MAX_FREQ;
270 prescaler = AW_PWM_CTRL_PRESCALE_MASK;
271 div = AW_PWM_MAX_FREQ / period_freq;
272 if ((div - 1) > AW_PWM_PERIOD_TOTAL_MASK) {
273 /* Test all prescaler */
274 for (i = 0; i < nitems(aw_pwm_clk_prescaler); i++) {
275 if (aw_pwm_clk_prescaler[i] == 0)
277 div = AW_PWM_MAX_FREQ / aw_pwm_clk_prescaler[i] / period_freq;
278 if ((div - 1) < AW_PWM_PERIOD_TOTAL_MASK ) {
280 clk_rate = AW_PWM_MAX_FREQ / aw_pwm_clk_prescaler[i];
284 if (prescaler == AW_PWM_CTRL_PRESCALE_MASK)
288 reg = AW_PWM_READ(sc, AW_PWM_CTRL);
290 /* Write the prescalar */
291 reg &= ~AW_PWM_CTRL_PRESCALE_MASK;
293 AW_PWM_WRITE(sc, AW_PWM_CTRL, reg);
295 /* Write the total/active cycles */
296 reg = ((clk_rate / period_freq - 1) << AW_PWM_PERIOD_TOTAL_SHIFT) |
297 ((clk_rate / duty_freq) << AW_PWM_PERIOD_ACTIVE_SHIFT);
298 AW_PWM_WRITE(sc, AW_PWM_PERIOD, reg);
307 aw_pwm_channel_get_config(device_t dev, u_int channel, u_int *period, u_int *duty)
309 struct aw_pwm_softc *sc;
311 sc = device_get_softc(dev);
313 *period = sc->period;
320 aw_pwm_channel_enable(device_t dev, u_int channel, bool enable)
322 struct aw_pwm_softc *sc;
325 sc = device_get_softc(dev);
327 if (enable && sc->enabled)
330 reg = AW_PWM_READ(sc, AW_PWM_CTRL);
332 reg |= AW_PWM_CTRL_GATE | AW_PWM_CTRL_EN;
334 reg &= ~(AW_PWM_CTRL_GATE | AW_PWM_CTRL_EN);
336 AW_PWM_WRITE(sc, AW_PWM_CTRL, reg);
338 sc->enabled = enable;
344 aw_pwm_channel_is_enabled(device_t dev, u_int channel, bool *enabled)
346 struct aw_pwm_softc *sc;
348 sc = device_get_softc(dev);
350 *enabled = sc->enabled;
355 static device_method_t aw_pwm_methods[] = {
356 /* Device interface */
357 DEVMETHOD(device_probe, aw_pwm_probe),
358 DEVMETHOD(device_attach, aw_pwm_attach),
359 DEVMETHOD(device_detach, aw_pwm_detach),
361 /* ofw_bus interface */
362 DEVMETHOD(ofw_bus_get_node, aw_pwm_get_node),
364 /* pwmbus interface */
365 DEVMETHOD(pwmbus_channel_count, aw_pwm_channel_count),
366 DEVMETHOD(pwmbus_channel_config, aw_pwm_channel_config),
367 DEVMETHOD(pwmbus_channel_get_config, aw_pwm_channel_get_config),
368 DEVMETHOD(pwmbus_channel_enable, aw_pwm_channel_enable),
369 DEVMETHOD(pwmbus_channel_is_enabled, aw_pwm_channel_is_enabled),
374 static driver_t aw_pwm_driver = {
377 sizeof(struct aw_pwm_softc),
380 static devclass_t aw_pwm_devclass;
382 DRIVER_MODULE(aw_pwm, simplebus, aw_pwm_driver, aw_pwm_devclass, 0, 0);
383 MODULE_VERSION(aw_pwm, 1);
384 SIMPLEBUS_PNP_INFO(compat_data);