2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2018 Emmanuel Vadot <manu@FreeBSD.org>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
20 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
21 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
22 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
23 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
33 #include <sys/param.h>
34 #include <sys/systm.h>
36 #include <sys/kernel.h>
37 #include <sys/module.h>
39 #include <sys/resource.h>
40 #include <machine/bus.h>
42 #include <dev/ofw/ofw_bus.h>
43 #include <dev/ofw/ofw_bus_subr.h>
45 #include <dev/extres/clk/clk.h>
47 #include <dev/pwm/pwmbus.h>
51 #define AW_PWM_CTRL 0x00
52 #define AW_PWM_CTRL_PRESCALE_MASK 0xF
53 #define AW_PWM_CTRL_EN (1 << 4)
54 #define AW_PWM_CTRL_ACTIVE_LEVEL_HIGH (1 << 5)
55 #define AW_PWM_CTRL_GATE (1 << 6)
56 #define AW_PWM_CTRL_MODE_MASK 0x80
57 #define AW_PWM_CTRL_PULSE_MODE (1 << 7)
58 #define AW_PWM_CTRL_CYCLE_MODE (0 << 7)
59 #define AW_PWM_CTRL_PULSE_START (1 << 8)
60 #define AW_PWM_CTRL_CLK_BYPASS (1 << 9)
61 #define AW_PWM_CTRL_PERIOD_BUSY (1 << 28)
63 #define AW_PWM_PERIOD 0x04
64 #define AW_PWM_PERIOD_TOTAL_MASK 0xFFFF
65 #define AW_PWM_PERIOD_TOTAL_SHIFT 16
66 #define AW_PWM_PERIOD_ACTIVE_MASK 0xFFFF
67 #define AW_PWM_PERIOD_ACTIVE_SHIFT 0
69 #define AW_PWM_MAX_FREQ 24000000
71 #define NS_PER_SEC 1000000000
73 static struct ofw_compat_data compat_data[] = {
74 { "allwinner,sun5i-a13-pwm", 1 },
78 static struct resource_spec aw_pwm_spec[] = {
79 { SYS_RES_MEMORY, 0, RF_ACTIVE },
96 static uint32_t aw_pwm_clk_prescaler[] = {
115 #define AW_PWM_READ(sc, reg) bus_read_4((sc)->res, (reg))
116 #define AW_PWM_WRITE(sc, reg, val) bus_write_4((sc)->res, (reg), (val))
118 static int aw_pwm_probe(device_t dev);
119 static int aw_pwm_attach(device_t dev);
120 static int aw_pwm_detach(device_t dev);
123 aw_pwm_probe(device_t dev)
125 if (!ofw_bus_status_okay(dev))
128 if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data)
131 device_set_desc(dev, "Allwinner PWM");
132 return (BUS_PROBE_DEFAULT);
136 aw_pwm_attach(device_t dev)
138 struct aw_pwm_softc *sc;
143 sc = device_get_softc(dev);
146 error = clk_get_by_ofw_index(dev, 0, 0, &sc->clk);
148 device_printf(dev, "cannot get clock\n");
151 error = clk_enable(sc->clk);
153 error = clk_get_freq(sc->clk, &sc->clk_freq);
155 if (bus_alloc_resources(dev, aw_pwm_spec, &sc->res) != 0) {
156 device_printf(dev, "cannot allocate resources for device\n");
161 if ((sc->busdev = pwmbus_attach_bus(dev)) == NULL)
162 device_printf(dev, "Cannot attach pwm bus\n");
164 /* Read the configuration left by U-Boot */
165 reg = AW_PWM_READ(sc, AW_PWM_CTRL);
166 if (reg & (AW_PWM_CTRL_GATE | AW_PWM_CTRL_EN))
169 reg = AW_PWM_READ(sc, AW_PWM_CTRL);
170 reg &= AW_PWM_CTRL_PRESCALE_MASK;
171 if (reg > nitems(aw_pwm_clk_prescaler)) {
172 device_printf(dev, "Bad prescaler %x, cannot guess current settings\n", reg);
175 clk_freq = sc->clk_freq / aw_pwm_clk_prescaler[reg];
177 reg = AW_PWM_READ(sc, AW_PWM_PERIOD);
178 sc->period = NS_PER_SEC /
179 (clk_freq / ((reg >> AW_PWM_PERIOD_TOTAL_SHIFT) & AW_PWM_PERIOD_TOTAL_MASK));
180 sc->duty = NS_PER_SEC /
181 (clk_freq / ((reg >> AW_PWM_PERIOD_ACTIVE_SHIFT) & AW_PWM_PERIOD_ACTIVE_MASK));
192 aw_pwm_detach(device_t dev)
194 struct aw_pwm_softc *sc;
196 sc = device_get_softc(dev);
198 bus_generic_detach(sc->dev);
200 bus_release_resources(dev, aw_pwm_spec, &sc->res);
206 aw_pwm_channel_max(device_t dev, int *nchannel)
215 aw_pwm_channel_config(device_t dev, int channel, unsigned int period, unsigned int duty)
217 struct aw_pwm_softc *sc;
218 uint64_t period_freq, duty_freq;
219 uint64_t clk_rate, div;
224 sc = device_get_softc(dev);
226 period_freq = NS_PER_SEC / period;
227 if (period_freq > AW_PWM_MAX_FREQ)
229 duty_freq = NS_PER_SEC / duty;
230 if (duty_freq < period_freq) {
231 device_printf(sc->dev, "duty < period\n");
235 /* First test without prescaler */
236 clk_rate = AW_PWM_MAX_FREQ;
237 prescaler = AW_PWM_CTRL_PRESCALE_MASK;
238 div = AW_PWM_MAX_FREQ / period_freq;
239 if ((div - 1) > AW_PWM_PERIOD_TOTAL_MASK) {
240 /* Test all prescaler */
241 for (i = 0; i < nitems(aw_pwm_clk_prescaler); i++) {
242 if (aw_pwm_clk_prescaler[i] == 0)
244 div = (AW_PWM_MAX_FREQ * aw_pwm_clk_prescaler[i]) / period_freq;
245 if ((div - 1) < AW_PWM_PERIOD_TOTAL_MASK ) {
247 clk_rate = AW_PWM_MAX_FREQ / aw_pwm_clk_prescaler[i];
251 if (prescaler == AW_PWM_CTRL_PRESCALE_MASK)
255 reg = AW_PWM_READ(sc, AW_PWM_CTRL);
256 if (reg & AW_PWM_CTRL_PERIOD_BUSY) {
257 device_printf(sc->dev, "pwm busy\n");
261 /* Write the prescalar */
262 reg &= ~AW_PWM_CTRL_PRESCALE_MASK;
264 AW_PWM_WRITE(sc, AW_PWM_CTRL, reg);
266 /* Write the total/active cycles */
267 reg = ((clk_rate / period_freq) << AW_PWM_PERIOD_TOTAL_SHIFT) |
268 ((clk_rate / duty_freq) << AW_PWM_PERIOD_ACTIVE_SHIFT);
269 AW_PWM_WRITE(sc, AW_PWM_PERIOD, reg);
278 aw_pwm_channel_get_config(device_t dev, int channel, unsigned int *period, unsigned int *duty)
280 struct aw_pwm_softc *sc;
282 sc = device_get_softc(dev);
284 *period = sc->period;
291 aw_pwm_channel_enable(device_t dev, int channel, bool enable)
293 struct aw_pwm_softc *sc;
296 sc = device_get_softc(dev);
298 if (enable && sc->enabled)
301 reg = AW_PWM_READ(sc, AW_PWM_CTRL);
303 reg |= AW_PWM_CTRL_GATE | AW_PWM_CTRL_EN;
305 reg &= ~(AW_PWM_CTRL_GATE | AW_PWM_CTRL_EN);
307 AW_PWM_WRITE(sc, AW_PWM_CTRL, reg);
309 sc->enabled = enable;
315 aw_pwm_channel_is_enabled(device_t dev, int channel, bool *enabled)
317 struct aw_pwm_softc *sc;
319 sc = device_get_softc(dev);
321 *enabled = sc->enabled;
327 aw_pwm_get_bus(device_t dev)
329 struct aw_pwm_softc *sc;
331 sc = device_get_softc(dev);
335 static device_method_t aw_pwm_methods[] = {
336 /* Device interface */
337 DEVMETHOD(device_probe, aw_pwm_probe),
338 DEVMETHOD(device_attach, aw_pwm_attach),
339 DEVMETHOD(device_detach, aw_pwm_detach),
342 DEVMETHOD(pwm_get_bus, aw_pwm_get_bus),
343 DEVMETHOD(pwm_channel_max, aw_pwm_channel_max),
344 DEVMETHOD(pwm_channel_config, aw_pwm_channel_config),
345 DEVMETHOD(pwm_channel_get_config, aw_pwm_channel_get_config),
346 DEVMETHOD(pwm_channel_enable, aw_pwm_channel_enable),
347 DEVMETHOD(pwm_channel_is_enabled, aw_pwm_channel_is_enabled),
352 static driver_t aw_pwm_driver = {
355 sizeof(struct aw_pwm_softc),
358 static devclass_t aw_pwm_devclass;
360 DRIVER_MODULE(aw_pwm, simplebus, aw_pwm_driver, aw_pwm_devclass, 0, 0);
361 SIMPLEBUS_PNP_INFO(compat_data);