2 * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
19 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
20 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
21 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
22 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD$");
36 #include <sys/param.h>
37 #include <sys/systm.h>
40 #include <sys/kernel.h>
41 #include <sys/module.h>
43 #include <machine/bus.h>
45 #include <dev/ofw/ofw_bus.h>
46 #include <dev/ofw/ofw_bus_subr.h>
47 #include <dev/gpio/gpiobusvar.h>
49 #include <dev/extres/clk/clk.h>
50 #include <dev/extres/hwreset/hwreset.h>
51 #include <dev/extres/regulator/regulator.h>
52 #include <dev/extres/phy/phy_usb.h>
54 #include "phynode_if.h"
57 AWUSBPHY_TYPE_A10 = 1,
66 struct aw_usbphy_conf {
68 enum awusbphy_type phy_type;
73 static const struct aw_usbphy_conf a10_usbphy_conf = {
75 .phy_type = AWUSBPHY_TYPE_A10,
80 static const struct aw_usbphy_conf a13_usbphy_conf = {
82 .phy_type = AWUSBPHY_TYPE_A13,
87 static const struct aw_usbphy_conf a20_usbphy_conf = {
89 .phy_type = AWUSBPHY_TYPE_A20,
94 static const struct aw_usbphy_conf a31_usbphy_conf = {
96 .phy_type = AWUSBPHY_TYPE_A31,
101 static const struct aw_usbphy_conf h3_usbphy_conf = {
103 .phy_type = AWUSBPHY_TYPE_H3,
108 static const struct aw_usbphy_conf a64_usbphy_conf = {
110 .phy_type = AWUSBPHY_TYPE_A64,
115 static const struct aw_usbphy_conf a83t_usbphy_conf = {
117 .phy_type = AWUSBPHY_TYPE_A83T,
122 static struct ofw_compat_data compat_data[] = {
123 { "allwinner,sun4i-a10-usb-phy", (uintptr_t)&a10_usbphy_conf },
124 { "allwinner,sun5i-a13-usb-phy", (uintptr_t)&a13_usbphy_conf },
125 { "allwinner,sun6i-a31-usb-phy", (uintptr_t)&a31_usbphy_conf },
126 { "allwinner,sun7i-a20-usb-phy", (uintptr_t)&a20_usbphy_conf },
127 { "allwinner,sun8i-h3-usb-phy", (uintptr_t)&h3_usbphy_conf },
128 { "allwinner,sun50i-a64-usb-phy", (uintptr_t)&a64_usbphy_conf },
129 { "allwinner,sun8i-a83t-usb-phy", (uintptr_t)&a83t_usbphy_conf },
133 struct awusbphy_softc {
134 struct resource * phy_ctrl;
135 struct resource ** pmu;
137 gpio_pin_t id_det_pin;
139 gpio_pin_t vbus_det_pin;
141 struct aw_usbphy_conf *phy_conf;
145 /* Phy class and methods. */
146 static int awusbphy_phy_enable(struct phynode *phy, bool enable);
147 static int awusbphy_get_mode(struct phynode *phy, int *mode);
148 static int awusbphy_set_mode(struct phynode *phy, int mode);
149 static phynode_usb_method_t awusbphy_phynode_methods[] = {
150 PHYNODEMETHOD(phynode_enable, awusbphy_phy_enable),
151 PHYNODEMETHOD(phynode_usb_get_mode, awusbphy_get_mode),
152 PHYNODEMETHOD(phynode_usb_set_mode, awusbphy_set_mode),
156 DEFINE_CLASS_1(awusbphy_phynode, awusbphy_phynode_class, awusbphy_phynode_methods,
157 sizeof(struct phynode_usb_sc), phynode_usb_class);
159 #define RD4(res, o) bus_read_4(res, (o))
160 #define WR4(res, o, v) bus_write_4(res, (o), (v))
161 #define CLR4(res, o, m) WR4(res, o, RD4(res, o) & ~(m))
162 #define SET4(res, o, m) WR4(res, o, RD4(res, o) | (m))
164 #define OTG_PHY_CFG 0x20
165 #define OTG_PHY_ROUTE_OTG (1 << 0)
166 #define PMU_IRQ_ENABLE 0x00
167 #define PMU_AHB_INCR8 (1 << 10)
168 #define PMU_AHB_INCR4 (1 << 9)
169 #define PMU_AHB_INCRX_ALIGN (1 << 8)
170 #define PMU_ULPI_BYPASS (1 << 0)
171 #define PMU_UNK_H3 0x10
172 #define PMU_UNK_H3_CLR 0x2
174 #define ID_PULLUP_EN (1 << 17)
175 #define DPDM_PULLUP_EN (1 << 16)
176 #define FORCE_ID (0x3 << 14)
177 #define FORCE_ID_SHIFT 14
178 #define FORCE_ID_LOW 2
179 #define FORCE_VBUS_VALID (0x3 << 12)
180 #define FORCE_VBUS_VALID_SHIFT 12
181 #define FORCE_VBUS_VALID_HIGH 3
182 #define VBUS_CHANGE_DET (1 << 6)
183 #define ID_CHANGE_DET (1 << 5)
184 #define DPDM_CHANGE_DET (1 << 4)
187 awusbphy_configure(device_t dev, int phyno)
189 struct awusbphy_softc *sc;
191 sc = device_get_softc(dev);
193 if (sc->pmu[phyno] == NULL)
196 if (sc->phy_conf->pmu_unk1 == true)
197 CLR4(sc->pmu[phyno], PMU_UNK_H3, PMU_UNK_H3_CLR);
199 SET4(sc->pmu[phyno], PMU_IRQ_ENABLE, PMU_ULPI_BYPASS |
200 PMU_AHB_INCR8 | PMU_AHB_INCR4 | PMU_AHB_INCRX_ALIGN);
204 awusbphy_init(device_t dev)
206 struct awusbphy_softc *sc;
214 sc = device_get_softc(dev);
215 node = ofw_bus_get_node(dev);
217 sc->phy_conf = (struct aw_usbphy_conf *)ofw_bus_search_compatible(dev, compat_data)->ocd_data;
219 /* Get phy_ctrl region */
220 if (ofw_bus_find_string_index(node, "reg-names", "phy_ctrl", &rid) != 0) {
221 device_printf(dev, "Cannot locate phy control resource\n");
224 sc->phy_ctrl = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
226 if (sc->phy_ctrl == NULL) {
227 device_printf(dev, "Cannot allocate resource\n");
232 for (off = 0; clk_get_by_ofw_index(dev, 0, off, &clk) == 0; off++) {
233 error = clk_enable(clk);
235 device_printf(dev, "couldn't enable clock %s\n",
241 /* De-assert resets */
242 for (off = 0; hwreset_get_by_ofw_idx(dev, 0, off, &rst) == 0; off++) {
243 error = hwreset_deassert(rst);
245 device_printf(dev, "couldn't de-assert reset %d\n",
252 error = gpio_pin_get_by_ofw_property(dev, node, "usb0_id_det-gpios",
255 sc->id_det_valid = 1;
256 error = gpio_pin_get_by_ofw_property(dev, node, "usb0_vbus_det-gpios",
259 sc->vbus_det_valid = 1;
261 sc->reg = malloc(sizeof(*(sc->reg)) * sc->phy_conf->num_phys, M_DEVBUF,
263 sc->pmu = malloc(sizeof(*(sc->pmu)) * sc->phy_conf->num_phys, M_DEVBUF,
266 for (off = 0; off < sc->phy_conf->num_phys; off++) {
267 snprintf(pname, sizeof(pname), "usb%d_vbus-supply", off);
268 if (regulator_get_by_ofw_property(dev, 0, pname, ®) == 0)
271 snprintf(pname, sizeof(pname), "pmu%d", off);
272 if (ofw_bus_find_string_index(node, "reg-names",
276 sc->pmu[off] = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
278 if (sc->pmu[off] == NULL) {
279 device_printf(dev, "Cannot allocate resource\n");
288 awusbphy_vbus_detect(device_t dev, int *val)
290 struct awusbphy_softc *sc;
294 sc = device_get_softc(dev);
296 if (sc->vbus_det_valid) {
297 error = gpio_pin_is_active(sc->vbus_det_pin, &active);
299 device_printf(dev, "Cannot get status of id pin %d\n",
312 awusbphy_phy_enable(struct phynode *phynode, bool enable)
316 struct awusbphy_softc *sc;
320 dev = phynode_get_device(phynode);
321 phy = phynode_get_id(phynode);
322 sc = device_get_softc(dev);
324 if (phy < 0 || phy >= sc->phy_conf->num_phys)
328 awusbphy_configure(dev, phy);
330 /* Regulators are optional. If not found, return success. */
336 /* If an external vbus is detected, do not enable phy 0 */
337 error = awusbphy_vbus_detect(dev, &vbus_det);
343 device_printf(dev, "External VBUS detected, not enabling the regulator\n");
349 /* Depending on the PHY we need to route OTG to OHCI/EHCI */
350 error = regulator_enable(reg);
352 error = regulator_disable(reg);
357 "couldn't %s regulator for phy %jd\n",
358 enable ? "enable" : "disable", (intmax_t)phy);
366 awusbphy_get_mode(struct phynode *phynode, int *mode)
368 struct awusbphy_softc *sc;
371 dev = phynode_get_device(phynode);
372 sc = device_get_softc(dev);
380 awusbphy_set_mode(struct phynode *phynode, int mode)
384 struct awusbphy_softc *sc;
388 dev = phynode_get_device(phynode);
389 phy = phynode_get_id(phynode);
390 sc = device_get_softc(dev);
393 if (mode != PHY_USB_MODE_HOST)
399 case PHY_USB_MODE_HOST:
400 val = bus_read_4(sc->phy_ctrl, PHY_CSR);
401 val &= ~(VBUS_CHANGE_DET | ID_CHANGE_DET | DPDM_CHANGE_DET);
402 val |= (ID_PULLUP_EN | DPDM_PULLUP_EN);
404 val |= (FORCE_ID_LOW << FORCE_ID_SHIFT);
405 val &= ~FORCE_VBUS_VALID;
406 val |= (FORCE_VBUS_VALID_HIGH << FORCE_VBUS_VALID_SHIFT);
407 bus_write_4(sc->phy_ctrl, PHY_CSR, val);
408 if (sc->phy_conf->phy0_route == true) {
409 error = awusbphy_vbus_detect(dev, &vbus_det);
413 CLR4(sc->phy_ctrl, OTG_PHY_CFG,
416 SET4(sc->phy_ctrl, OTG_PHY_CFG,
420 case PHY_USB_MODE_OTG:
433 awusbphy_probe(device_t dev)
435 if (!ofw_bus_status_okay(dev))
438 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
441 device_set_desc(dev, "Allwinner USB PHY");
442 return (BUS_PROBE_DEFAULT);
446 awusbphy_attach(device_t dev)
449 struct phynode *phynode;
450 struct phynode_init_def phy_init;
451 struct awusbphy_softc *sc;
454 sc = device_get_softc(dev);
455 error = awusbphy_init(dev);
457 device_printf(dev, "failed to initialize USB PHY, error %d\n",
462 /* Create and register phys. */
463 for (i = 0; i < sc->phy_conf->num_phys; i++) {
464 bzero(&phy_init, sizeof(phy_init));
466 phy_init.ofw_node = ofw_bus_get_node(dev);
467 phynode = phynode_create(dev, &awusbphy_phynode_class,
469 if (phynode == NULL) {
470 device_printf(dev, "failed to create USB PHY\n");
473 if (phynode_register(phynode) == NULL) {
474 device_printf(dev, "failed to create USB PHY\n");
482 static device_method_t awusbphy_methods[] = {
483 /* Device interface */
484 DEVMETHOD(device_probe, awusbphy_probe),
485 DEVMETHOD(device_attach, awusbphy_attach),
490 static driver_t awusbphy_driver = {
493 sizeof(struct awusbphy_softc)
496 static devclass_t awusbphy_devclass;
497 /* aw_usbphy needs to come up after regulators/gpio/etc, but before ehci/ohci */
498 EARLY_DRIVER_MODULE(awusbphy, simplebus, awusbphy_driver, awusbphy_devclass,
499 0, 0, BUS_PASS_SUPPORTDEV + BUS_PASS_ORDER_MIDDLE);
500 MODULE_VERSION(awusbphy, 1);