2 * Copyright (c) 2018 Emmanuel Vadot <manu@freebsd.org>
3 * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
20 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
21 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
22 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
23 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * X-Powers AXP803/813/818 PMU for Allwinner SoCs
34 #include <sys/cdefs.h>
35 __FBSDID("$FreeBSD$");
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/eventhandler.h>
42 #include <sys/kernel.h>
43 #include <sys/reboot.h>
45 #include <sys/module.h>
46 #include <machine/bus.h>
48 #include <dev/iicbus/iicbus.h>
49 #include <dev/iicbus/iiconf.h>
51 #include <dev/gpio/gpiobusvar.h>
53 #include <dev/ofw/ofw_bus.h>
54 #include <dev/ofw/ofw_bus_subr.h>
56 #include <dev/extres/regulator/regulator.h>
59 #include "iicbus_if.h"
60 #include "regdev_if.h"
62 MALLOC_DEFINE(M_AXP8XX_REG, "AXP8xx regulator", "AXP8xx power regulator");
64 #define AXP_POWERSRC 0x00
65 #define AXP_POWERSRC_ACIN (1 << 7)
66 #define AXP_POWERSRC_VBUS (1 << 5)
67 #define AXP_POWERSRC_VBAT (1 << 3)
68 #define AXP_POWERSRC_CHARING (1 << 2)
69 #define AXP_POWERSRC_SHORTED (1 << 1)
70 #define AXP_POWERSRC_STARTUP (1 << 0)
71 #define AXP_ICTYPE 0x03
72 #define AXP_POWERCTL1 0x10
73 #define AXP_POWERCTL1_DCDC7 (1 << 6) /* AXP813/818 only */
74 #define AXP_POWERCTL1_DCDC6 (1 << 5)
75 #define AXP_POWERCTL1_DCDC5 (1 << 4)
76 #define AXP_POWERCTL1_DCDC4 (1 << 3)
77 #define AXP_POWERCTL1_DCDC3 (1 << 2)
78 #define AXP_POWERCTL1_DCDC2 (1 << 1)
79 #define AXP_POWERCTL1_DCDC1 (1 << 0)
80 #define AXP_POWERCTL2 0x12
81 #define AXP_POWERCTL2_DC1SW (1 << 7) /* AXP803 only */
82 #define AXP_POWERCTL2_DLDO4 (1 << 6)
83 #define AXP_POWERCTL2_DLDO3 (1 << 5)
84 #define AXP_POWERCTL2_DLDO2 (1 << 4)
85 #define AXP_POWERCTL2_DLDO1 (1 << 3)
86 #define AXP_POWERCTL2_ELDO3 (1 << 2)
87 #define AXP_POWERCTL2_ELDO2 (1 << 1)
88 #define AXP_POWERCTL2_ELDO1 (1 << 0)
89 #define AXP_POWERCTL3 0x13
90 #define AXP_POWERCTL3_ALDO3 (1 << 7)
91 #define AXP_POWERCTL3_ALDO2 (1 << 6)
92 #define AXP_POWERCTL3_ALDO1 (1 << 5)
93 #define AXP_POWERCTL3_FLDO3 (1 << 4) /* AXP813/818 only */
94 #define AXP_POWERCTL3_FLDO2 (1 << 3)
95 #define AXP_POWERCTL3_FLDO1 (1 << 2)
96 #define AXP_VOLTCTL_DLDO1 0x15
97 #define AXP_VOLTCTL_DLDO2 0x16
98 #define AXP_VOLTCTL_DLDO3 0x17
99 #define AXP_VOLTCTL_DLDO4 0x18
100 #define AXP_VOLTCTL_ELDO1 0x19
101 #define AXP_VOLTCTL_ELDO2 0x1A
102 #define AXP_VOLTCTL_ELDO3 0x1B
103 #define AXP_VOLTCTL_FLDO1 0x1C
104 #define AXP_VOLTCTL_FLDO2 0x1D
105 #define AXP_VOLTCTL_DCDC1 0x20
106 #define AXP_VOLTCTL_DCDC2 0x21
107 #define AXP_VOLTCTL_DCDC3 0x22
108 #define AXP_VOLTCTL_DCDC4 0x23
109 #define AXP_VOLTCTL_DCDC5 0x24
110 #define AXP_VOLTCTL_DCDC6 0x25
111 #define AXP_VOLTCTL_DCDC7 0x26
112 #define AXP_VOLTCTL_ALDO1 0x28
113 #define AXP_VOLTCTL_ALDO2 0x29
114 #define AXP_VOLTCTL_ALDO3 0x2A
115 #define AXP_VOLTCTL_STATUS (1 << 7)
116 #define AXP_VOLTCTL_MASK 0x7f
117 #define AXP_POWERBAT 0x32
118 #define AXP_POWERBAT_SHUTDOWN (1 << 7)
119 #define AXP_IRQEN1 0x40
120 #define AXP_IRQEN2 0x41
121 #define AXP_IRQEN3 0x42
122 #define AXP_IRQEN4 0x43
123 #define AXP_IRQEN5 0x44
124 #define AXP_IRQEN5_POKSIRQ (1 << 4)
125 #define AXP_IRQEN6 0x45
126 #define AXP_IRQSTAT5 0x4c
127 #define AXP_IRQSTAT5_POKSIRQ (1 << 4)
128 #define AXP_GPIO0_CTRL 0x90
129 #define AXP_GPIO0LDO_CTRL 0x91
130 #define AXP_GPIO1_CTRL 0x92
131 #define AXP_GPIO1LDO_CTRL 0x93
132 #define AXP_GPIO_FUNC (0x7 << 0)
133 #define AXP_GPIO_FUNC_SHIFT 0
134 #define AXP_GPIO_FUNC_DRVLO 0
135 #define AXP_GPIO_FUNC_DRVHI 1
136 #define AXP_GPIO_FUNC_INPUT 2
137 #define AXP_GPIO_FUNC_LDO_ON 3
138 #define AXP_GPIO_FUNC_LDO_OFF 4
139 #define AXP_GPIO_SIGBIT 0x94
140 #define AXP_GPIO_PD 0x97
142 static const struct {
146 { "GPIO0", AXP_GPIO0_CTRL },
147 { "GPIO1", AXP_GPIO1_CTRL },
155 static struct ofw_compat_data compat_data[] = {
156 { "x-powers,axp803", AXP803 },
157 { "x-powers,axp813", AXP813 },
158 { "x-powers,axp818", AXP813 },
162 static struct resource_spec axp8xx_spec[] = {
163 { SYS_RES_IRQ, 0, RF_ACTIVE },
167 struct axp8xx_regdef {
173 uint8_t enable_value;
174 uint8_t disable_value;
185 AXP8XX_REG_ID_DCDC1 = 100,
206 AXP8XX_REG_ID_GPIO0_LDO,
207 AXP8XX_REG_ID_GPIO1_LDO,
210 static struct axp8xx_regdef axp803_regdefs[] = {
212 .id = AXP803_REG_ID_DC1SW,
214 .enable_reg = AXP_POWERCTL2,
215 .enable_mask = (uint8_t) AXP_POWERCTL2_DC1SW,
216 .enable_value = AXP_POWERCTL2_DC1SW,
220 static struct axp8xx_regdef axp813_regdefs[] = {
222 .id = AXP813_REG_ID_DCDC7,
224 .enable_reg = AXP_POWERCTL1,
225 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC7,
226 .enable_value = AXP_POWERCTL1_DCDC7,
227 .voltage_reg = AXP_VOLTCTL_DCDC7,
231 .voltage_nstep1 = 50,
233 .voltage_nstep2 = 21,
237 static struct axp8xx_regdef axp8xx_common_regdefs[] = {
239 .id = AXP8XX_REG_ID_DCDC1,
241 .enable_reg = AXP_POWERCTL1,
242 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC1,
243 .enable_value = AXP_POWERCTL1_DCDC1,
244 .voltage_reg = AXP_VOLTCTL_DCDC1,
247 .voltage_step1 = 100,
248 .voltage_nstep1 = 18,
251 .id = AXP8XX_REG_ID_DCDC2,
253 .enable_reg = AXP_POWERCTL1,
254 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC2,
255 .enable_value = AXP_POWERCTL1_DCDC2,
256 .voltage_reg = AXP_VOLTCTL_DCDC2,
260 .voltage_nstep1 = 70,
265 .id = AXP8XX_REG_ID_DCDC3,
267 .enable_reg = AXP_POWERCTL1,
268 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC3,
269 .enable_value = AXP_POWERCTL1_DCDC3,
270 .voltage_reg = AXP_VOLTCTL_DCDC3,
274 .voltage_nstep1 = 70,
279 .id = AXP8XX_REG_ID_DCDC4,
281 .enable_reg = AXP_POWERCTL1,
282 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC4,
283 .enable_value = AXP_POWERCTL1_DCDC4,
284 .voltage_reg = AXP_VOLTCTL_DCDC4,
288 .voltage_nstep1 = 70,
293 .id = AXP8XX_REG_ID_DCDC5,
295 .enable_reg = AXP_POWERCTL1,
296 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC5,
297 .enable_value = AXP_POWERCTL1_DCDC5,
298 .voltage_reg = AXP_VOLTCTL_DCDC5,
302 .voltage_nstep1 = 42,
304 .voltage_nstep2 = 36,
307 .id = AXP8XX_REG_ID_DCDC6,
309 .enable_reg = AXP_POWERCTL1,
310 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC6,
311 .enable_value = AXP_POWERCTL1_DCDC6,
312 .voltage_reg = AXP_VOLTCTL_DCDC6,
316 .voltage_nstep1 = 50,
318 .voltage_nstep2 = 21,
321 .id = AXP8XX_REG_ID_DLDO1,
323 .enable_reg = AXP_POWERCTL2,
324 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO1,
325 .enable_value = AXP_POWERCTL2_DLDO1,
326 .voltage_reg = AXP_VOLTCTL_DLDO1,
329 .voltage_step1 = 100,
330 .voltage_nstep1 = 26,
333 .id = AXP8XX_REG_ID_DLDO2,
335 .enable_reg = AXP_POWERCTL2,
336 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO2,
337 .enable_value = AXP_POWERCTL2_DLDO2,
338 .voltage_reg = AXP_VOLTCTL_DLDO2,
341 .voltage_step1 = 100,
342 .voltage_nstep1 = 27,
343 .voltage_step2 = 200,
347 .id = AXP8XX_REG_ID_DLDO3,
349 .enable_reg = AXP_POWERCTL2,
350 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO3,
351 .enable_value = AXP_POWERCTL2_DLDO3,
352 .voltage_reg = AXP_VOLTCTL_DLDO3,
355 .voltage_step1 = 100,
356 .voltage_nstep1 = 26,
359 .id = AXP8XX_REG_ID_DLDO4,
361 .enable_reg = AXP_POWERCTL2,
362 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO4,
363 .enable_value = AXP_POWERCTL2_DLDO4,
364 .voltage_reg = AXP_VOLTCTL_DLDO4,
367 .voltage_step1 = 100,
368 .voltage_nstep1 = 26,
371 .id = AXP8XX_REG_ID_ALDO1,
373 .enable_reg = AXP_POWERCTL3,
374 .enable_mask = (uint8_t) AXP_POWERCTL3_ALDO1,
375 .enable_value = AXP_POWERCTL3_ALDO1,
378 .voltage_step1 = 100,
379 .voltage_nstep1 = 26,
382 .id = AXP8XX_REG_ID_ALDO2,
384 .enable_reg = AXP_POWERCTL3,
385 .enable_mask = (uint8_t) AXP_POWERCTL3_ALDO2,
386 .enable_value = AXP_POWERCTL3_ALDO2,
389 .voltage_step1 = 100,
390 .voltage_nstep1 = 26,
393 .id = AXP8XX_REG_ID_ALDO3,
395 .enable_reg = AXP_POWERCTL3,
396 .enable_mask = (uint8_t) AXP_POWERCTL3_ALDO3,
397 .enable_value = AXP_POWERCTL3_ALDO3,
400 .voltage_step1 = 100,
401 .voltage_nstep1 = 26,
404 .id = AXP8XX_REG_ID_ELDO1,
406 .enable_reg = AXP_POWERCTL2,
407 .enable_mask = (uint8_t) AXP_POWERCTL2_ELDO1,
408 .enable_value = AXP_POWERCTL2_ELDO1,
412 .voltage_nstep1 = 24,
415 .id = AXP8XX_REG_ID_ELDO2,
417 .enable_reg = AXP_POWERCTL2,
418 .enable_mask = (uint8_t) AXP_POWERCTL2_ELDO2,
419 .enable_value = AXP_POWERCTL2_ELDO2,
423 .voltage_nstep1 = 24,
426 .id = AXP8XX_REG_ID_ELDO3,
428 .enable_reg = AXP_POWERCTL2,
429 .enable_mask = (uint8_t) AXP_POWERCTL2_ELDO3,
430 .enable_value = AXP_POWERCTL2_ELDO3,
434 .voltage_nstep1 = 24,
437 .id = AXP8XX_REG_ID_FLDO1,
439 .enable_reg = AXP_POWERCTL3,
440 .enable_mask = (uint8_t) AXP_POWERCTL3_FLDO1,
441 .enable_value = AXP_POWERCTL3_FLDO1,
445 .voltage_nstep1 = 15,
448 .id = AXP8XX_REG_ID_FLDO2,
450 .enable_reg = AXP_POWERCTL3,
451 .enable_mask = (uint8_t) AXP_POWERCTL3_FLDO2,
452 .enable_value = AXP_POWERCTL3_FLDO2,
456 .voltage_nstep1 = 15,
459 .id = AXP8XX_REG_ID_GPIO0_LDO,
461 .enable_reg = AXP_GPIO0_CTRL,
462 .enable_mask = (uint8_t) AXP_GPIO_FUNC,
463 .enable_value = AXP_GPIO_FUNC_LDO_ON,
464 .disable_value = AXP_GPIO_FUNC_LDO_OFF,
465 .voltage_reg = AXP_GPIO0LDO_CTRL,
468 .voltage_step1 = 100,
469 .voltage_nstep1 = 26,
472 .id = AXP8XX_REG_ID_GPIO1_LDO,
474 .enable_reg = AXP_GPIO1_CTRL,
475 .enable_mask = (uint8_t) AXP_GPIO_FUNC,
476 .enable_value = AXP_GPIO_FUNC_LDO_ON,
477 .disable_value = AXP_GPIO_FUNC_LDO_OFF,
478 .voltage_reg = AXP_GPIO1LDO_CTRL,
481 .voltage_step1 = 100,
482 .voltage_nstep1 = 26,
488 struct axp8xx_reg_sc {
489 struct regnode *regnode;
491 struct axp8xx_regdef *def;
493 struct regnode_std_param *param;
496 struct axp8xx_softc {
497 struct resource *res;
507 struct axp8xx_reg_sc **regs;
511 #define AXP_LOCK(sc) mtx_lock(&(sc)->mtx)
512 #define AXP_UNLOCK(sc) mtx_unlock(&(sc)->mtx)
515 axp8xx_read(device_t dev, uint8_t reg, uint8_t *data, uint8_t size)
517 struct axp8xx_softc *sc;
518 struct iic_msg msg[2];
520 sc = device_get_softc(dev);
522 msg[0].slave = sc->addr;
523 msg[0].flags = IIC_M_WR;
527 msg[1].slave = sc->addr;
528 msg[1].flags = IIC_M_RD;
532 return (iicbus_transfer(dev, msg, 2));
536 axp8xx_write(device_t dev, uint8_t reg, uint8_t val)
538 struct axp8xx_softc *sc;
539 struct iic_msg msg[2];
541 sc = device_get_softc(dev);
543 msg[0].slave = sc->addr;
544 msg[0].flags = IIC_M_WR;
548 msg[1].slave = sc->addr;
549 msg[1].flags = IIC_M_WR;
553 return (iicbus_transfer(dev, msg, 2));
557 axp8xx_regnode_init(struct regnode *regnode)
563 axp8xx_regnode_enable(struct regnode *regnode, bool enable, int *udelay)
565 struct axp8xx_reg_sc *sc;
568 sc = regnode_get_softc(regnode);
571 device_printf(sc->base_dev, "%sable %s (%s)\n",
572 enable ? "En" : "Dis",
573 regnode_get_name(regnode),
576 axp8xx_read(sc->base_dev, sc->def->enable_reg, &val, 1);
577 val &= ~sc->def->enable_mask;
579 val |= sc->def->enable_value;
581 if (sc->def->disable_value)
582 val |= sc->def->disable_value;
584 val &= ~sc->def->enable_value;
586 axp8xx_write(sc->base_dev, sc->def->enable_reg, val);
594 axp8xx_regnode_reg_to_voltage(struct axp8xx_reg_sc *sc, uint8_t val, int *uv)
596 if (val < sc->def->voltage_nstep1)
597 *uv = sc->def->voltage_min + val * sc->def->voltage_step1;
599 *uv = sc->def->voltage_min +
600 (sc->def->voltage_nstep1 * sc->def->voltage_step1) +
601 ((val - sc->def->voltage_nstep1) * sc->def->voltage_step2);
606 axp8xx_regnode_voltage_to_reg(struct axp8xx_reg_sc *sc, int min_uvolt,
607 int max_uvolt, uint8_t *val)
613 uvolt = sc->def->voltage_min * 1000;
615 for (nstep = 0; nstep < sc->def->voltage_nstep1 && uvolt < min_uvolt;
618 uvolt += (sc->def->voltage_step1 * 1000);
620 for (nstep = 0; nstep < sc->def->voltage_nstep2 && uvolt < min_uvolt;
623 uvolt += (sc->def->voltage_step2 * 1000);
625 if (uvolt > max_uvolt)
633 axp8xx_regnode_set_voltage(struct regnode *regnode, int min_uvolt,
634 int max_uvolt, int *udelay)
636 struct axp8xx_reg_sc *sc;
639 sc = regnode_get_softc(regnode);
642 device_printf(sc->base_dev, "Setting %s (%s) to %d<->%d\n",
643 regnode_get_name(regnode),
645 min_uvolt, max_uvolt);
647 if (sc->def->voltage_step1 == 0)
650 if (axp8xx_regnode_voltage_to_reg(sc, min_uvolt, max_uvolt, &val) != 0)
653 axp8xx_write(sc->base_dev, sc->def->voltage_reg, val);
661 axp8xx_regnode_get_voltage(struct regnode *regnode, int *uvolt)
663 struct axp8xx_reg_sc *sc;
666 sc = regnode_get_softc(regnode);
668 if (!sc->def->voltage_step1 || !sc->def->voltage_step2)
671 axp8xx_read(sc->base_dev, sc->def->voltage_reg, &val, 1);
672 axp8xx_regnode_reg_to_voltage(sc, val & AXP_VOLTCTL_MASK, uvolt);
677 static regnode_method_t axp8xx_regnode_methods[] = {
678 /* Regulator interface */
679 REGNODEMETHOD(regnode_init, axp8xx_regnode_init),
680 REGNODEMETHOD(regnode_enable, axp8xx_regnode_enable),
681 REGNODEMETHOD(regnode_set_voltage, axp8xx_regnode_set_voltage),
682 REGNODEMETHOD(regnode_get_voltage, axp8xx_regnode_get_voltage),
685 DEFINE_CLASS_1(axp8xx_regnode, axp8xx_regnode_class, axp8xx_regnode_methods,
686 sizeof(struct axp8xx_reg_sc), regnode_class);
689 axp8xx_shutdown(void *devp, int howto)
693 if ((howto & RB_POWEROFF) == 0)
699 device_printf(dev, "Shutdown Axp8xx\n");
701 axp8xx_write(dev, AXP_POWERBAT, AXP_POWERBAT_SHUTDOWN);
705 axp8xx_intr(void *arg)
713 error = axp8xx_read(dev, AXP_IRQSTAT5, &val, 1);
718 if ((val & AXP_IRQSTAT5_POKSIRQ) != 0) {
720 device_printf(dev, "Power button pressed\n");
721 shutdown_nice(RB_POWEROFF);
724 axp8xx_write(dev, AXP_IRQSTAT5, val);
729 axp8xx_gpio_get_bus(device_t dev)
731 struct axp8xx_softc *sc;
733 sc = device_get_softc(dev);
735 return (sc->gpiodev);
739 axp8xx_gpio_pin_max(device_t dev, int *maxpin)
741 *maxpin = nitems(axp8xx_pins) - 1;
747 axp8xx_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
749 if (pin >= nitems(axp8xx_pins))
752 snprintf(name, GPIOMAXNAME, "%s", axp8xx_pins[pin].name);
758 axp8xx_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
760 if (pin >= nitems(axp8xx_pins))
763 *caps = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT;
769 axp8xx_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
771 struct axp8xx_softc *sc;
775 if (pin >= nitems(axp8xx_pins))
778 sc = device_get_softc(dev);
781 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1);
783 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT;
784 if (func == AXP_GPIO_FUNC_INPUT)
785 *flags = GPIO_PIN_INPUT;
786 else if (func == AXP_GPIO_FUNC_DRVLO ||
787 func == AXP_GPIO_FUNC_DRVHI)
788 *flags = GPIO_PIN_OUTPUT;
798 axp8xx_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
800 struct axp8xx_softc *sc;
804 if (pin >= nitems(axp8xx_pins))
807 sc = device_get_softc(dev);
810 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1);
812 data &= ~AXP_GPIO_FUNC;
813 if ((flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) != 0) {
814 if ((flags & GPIO_PIN_OUTPUT) == 0)
815 data |= AXP_GPIO_FUNC_INPUT;
817 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data);
825 axp8xx_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
827 struct axp8xx_softc *sc;
831 if (pin >= nitems(axp8xx_pins))
834 sc = device_get_softc(dev);
837 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1);
839 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT;
841 case AXP_GPIO_FUNC_DRVLO:
844 case AXP_GPIO_FUNC_DRVHI:
847 case AXP_GPIO_FUNC_INPUT:
848 error = axp8xx_read(dev, AXP_GPIO_SIGBIT, &data, 1);
850 *val = (data & (1 << pin)) ? 1 : 0;
863 axp8xx_gpio_pin_set(device_t dev, uint32_t pin, unsigned int val)
865 struct axp8xx_softc *sc;
869 if (pin >= nitems(axp8xx_pins))
872 sc = device_get_softc(dev);
875 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1);
877 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT;
879 case AXP_GPIO_FUNC_DRVLO:
880 case AXP_GPIO_FUNC_DRVHI:
881 data &= ~AXP_GPIO_FUNC;
882 data |= (val << AXP_GPIO_FUNC_SHIFT);
890 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data);
898 axp8xx_gpio_pin_toggle(device_t dev, uint32_t pin)
900 struct axp8xx_softc *sc;
904 if (pin >= nitems(axp8xx_pins))
907 sc = device_get_softc(dev);
910 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1);
912 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT;
914 case AXP_GPIO_FUNC_DRVLO:
915 data &= ~AXP_GPIO_FUNC;
916 data |= (AXP_GPIO_FUNC_DRVHI << AXP_GPIO_FUNC_SHIFT);
918 case AXP_GPIO_FUNC_DRVHI:
919 data &= ~AXP_GPIO_FUNC;
920 data |= (AXP_GPIO_FUNC_DRVLO << AXP_GPIO_FUNC_SHIFT);
928 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data);
935 axp8xx_gpio_map_gpios(device_t bus, phandle_t dev, phandle_t gparent,
936 int gcells, pcell_t *gpios, uint32_t *pin, uint32_t *flags)
938 if (gpios[0] >= nitems(axp8xx_pins))
948 axp8xx_get_node(device_t dev, device_t bus)
950 return (ofw_bus_get_node(dev));
953 static struct axp8xx_reg_sc *
954 axp8xx_reg_attach(device_t dev, phandle_t node,
955 struct axp8xx_regdef *def)
957 struct axp8xx_reg_sc *reg_sc;
958 struct regnode_init_def initdef;
959 struct regnode *regnode;
961 memset(&initdef, 0, sizeof(initdef));
962 if (regulator_parse_ofw_stdparam(dev, node, &initdef) != 0)
964 if (initdef.std_param.min_uvolt == 0)
965 initdef.std_param.min_uvolt = def->voltage_min * 1000;
966 if (initdef.std_param.max_uvolt == 0)
967 initdef.std_param.max_uvolt = def->voltage_max * 1000;
968 initdef.id = def->id;
969 initdef.ofw_node = node;
970 regnode = regnode_create(dev, &axp8xx_regnode_class, &initdef);
971 if (regnode == NULL) {
972 device_printf(dev, "cannot create regulator\n");
976 reg_sc = regnode_get_softc(regnode);
977 reg_sc->regnode = regnode;
978 reg_sc->base_dev = dev;
980 reg_sc->xref = OF_xref_from_node(node);
981 reg_sc->param = regnode_get_stdparam(regnode);
983 regnode_register(regnode);
989 axp8xx_regdev_map(device_t dev, phandle_t xref, int ncells, pcell_t *cells,
992 struct axp8xx_softc *sc;
995 sc = device_get_softc(dev);
996 for (i = 0; i < sc->nregs; i++) {
997 if (sc->regs[i] == NULL)
999 if (sc->regs[i]->xref == xref) {
1000 *num = sc->regs[i]->def->id;
1009 axp8xx_probe(device_t dev)
1011 if (!ofw_bus_status_okay(dev))
1014 switch (ofw_bus_search_compatible(dev, compat_data)->ocd_data)
1017 device_set_desc(dev, "X-Powers AXP803 Power Management Unit");
1020 device_set_desc(dev, "X-Powers AXP813 Power Management Unit");
1026 return (BUS_PROBE_DEFAULT);
1030 axp8xx_attach(device_t dev)
1032 struct axp8xx_softc *sc;
1033 struct axp8xx_reg_sc *reg;
1035 phandle_t rnode, child;
1038 sc = device_get_softc(dev);
1040 sc->addr = iicbus_get_addr(dev);
1041 mtx_init(&sc->mtx, device_get_nameunit(dev), NULL, MTX_DEF);
1043 error = bus_alloc_resources(dev, axp8xx_spec, &sc->res);
1045 device_printf(dev, "cannot allocate resources for device\n");
1050 axp8xx_read(dev, AXP_ICTYPE, &chip_id, 1);
1051 device_printf(dev, "chip ID 0x%02x\n", chip_id);
1054 sc->nregs = nitems(axp8xx_common_regdefs);
1055 sc->type = ofw_bus_search_compatible(dev, compat_data)->ocd_data;
1058 sc->nregs += nitems(axp803_regdefs);
1061 sc->nregs += nitems(axp813_regdefs);
1064 sc->regs = malloc(sizeof(struct axp8xx_reg_sc *) * sc->nregs,
1065 M_AXP8XX_REG, M_WAITOK | M_ZERO);
1067 /* Attach known regulators that exist in the DT */
1068 rnode = ofw_bus_find_child(ofw_bus_get_node(dev), "regulators");
1070 for (i = 0; i < sc->nregs; i++) {
1072 struct axp8xx_regdef *regdef;
1074 if (i <= nitems(axp8xx_common_regdefs)) {
1075 regname = axp8xx_common_regdefs[i].name;
1076 regdef = &axp8xx_common_regdefs[i];
1080 off = i - nitems(axp8xx_common_regdefs);
1083 regname = axp803_regdefs[off].name;
1084 regdef = &axp803_regdefs[off];
1087 regname = axp813_regdefs[off].name;
1088 regdef = &axp813_regdefs[off];
1092 child = ofw_bus_find_child(rnode,
1096 reg = axp8xx_reg_attach(dev, child,
1100 "cannot attach regulator %s\n",
1108 /* Enable IRQ on short power key press */
1109 axp8xx_write(dev, AXP_IRQEN1, 0);
1110 axp8xx_write(dev, AXP_IRQEN2, 0);
1111 axp8xx_write(dev, AXP_IRQEN3, 0);
1112 axp8xx_write(dev, AXP_IRQEN4, 0);
1113 axp8xx_write(dev, AXP_IRQEN5, AXP_IRQEN5_POKSIRQ);
1114 axp8xx_write(dev, AXP_IRQEN6, 0);
1116 /* Install interrupt handler */
1117 error = bus_setup_intr(dev, sc->res, INTR_TYPE_MISC | INTR_MPSAFE,
1118 NULL, axp8xx_intr, dev, &sc->ih);
1120 device_printf(dev, "cannot setup interrupt handler\n");
1124 EVENTHANDLER_REGISTER(shutdown_final, axp8xx_shutdown, dev,
1127 sc->gpiodev = gpiobus_attach_bus(dev);
1132 static device_method_t axp8xx_methods[] = {
1133 /* Device interface */
1134 DEVMETHOD(device_probe, axp8xx_probe),
1135 DEVMETHOD(device_attach, axp8xx_attach),
1137 /* GPIO interface */
1138 DEVMETHOD(gpio_get_bus, axp8xx_gpio_get_bus),
1139 DEVMETHOD(gpio_pin_max, axp8xx_gpio_pin_max),
1140 DEVMETHOD(gpio_pin_getname, axp8xx_gpio_pin_getname),
1141 DEVMETHOD(gpio_pin_getcaps, axp8xx_gpio_pin_getcaps),
1142 DEVMETHOD(gpio_pin_getflags, axp8xx_gpio_pin_getflags),
1143 DEVMETHOD(gpio_pin_setflags, axp8xx_gpio_pin_setflags),
1144 DEVMETHOD(gpio_pin_get, axp8xx_gpio_pin_get),
1145 DEVMETHOD(gpio_pin_set, axp8xx_gpio_pin_set),
1146 DEVMETHOD(gpio_pin_toggle, axp8xx_gpio_pin_toggle),
1147 DEVMETHOD(gpio_map_gpios, axp8xx_gpio_map_gpios),
1149 /* Regdev interface */
1150 DEVMETHOD(regdev_map, axp8xx_regdev_map),
1152 /* OFW bus interface */
1153 DEVMETHOD(ofw_bus_get_node, axp8xx_get_node),
1158 static driver_t axp8xx_driver = {
1161 sizeof(struct axp8xx_softc),
1164 static devclass_t axp8xx_devclass;
1165 extern devclass_t ofwgpiobus_devclass, gpioc_devclass;
1166 extern driver_t ofw_gpiobus_driver, gpioc_driver;
1168 EARLY_DRIVER_MODULE(axp8xx, iicbus, axp8xx_driver, axp8xx_devclass, 0, 0,
1169 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST);
1170 EARLY_DRIVER_MODULE(ofw_gpiobus, axp8xx_pmu, ofw_gpiobus_driver,
1171 ofwgpiobus_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST);
1172 DRIVER_MODULE(gpioc, axp8xx_pmu, gpioc_driver, gpioc_devclass, 0, 0);
1173 MODULE_VERSION(axp8xx, 1);
1174 MODULE_DEPEND(axp8xx, iicbus, 1, 1, 1);