2 * Copyright (c) 2018 Emmanuel Vadot <manu@freebsd.org>
3 * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
20 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
21 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
22 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
23 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * X-Powers AXP803/813/818 PMU for Allwinner SoCs
34 #include <sys/cdefs.h>
35 __FBSDID("$FreeBSD$");
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/eventhandler.h>
42 #include <sys/kernel.h>
43 #include <sys/reboot.h>
45 #include <sys/module.h>
46 #include <machine/bus.h>
48 #include <dev/iicbus/iicbus.h>
49 #include <dev/iicbus/iiconf.h>
51 #include <dev/gpio/gpiobusvar.h>
53 #include <dev/ofw/ofw_bus.h>
54 #include <dev/ofw/ofw_bus_subr.h>
56 #include <dev/extres/regulator/regulator.h>
59 #include "iicbus_if.h"
60 #include "regdev_if.h"
62 MALLOC_DEFINE(M_AXP8XX_REG, "AXP8xx regulator", "AXP8xx power regulator");
64 #define AXP_POWERSRC 0x00
65 #define AXP_POWERSRC_ACIN (1 << 7)
66 #define AXP_POWERSRC_VBUS (1 << 5)
67 #define AXP_POWERSRC_VBAT (1 << 3)
68 #define AXP_POWERSRC_CHARING (1 << 2)
69 #define AXP_POWERSRC_SHORTED (1 << 1)
70 #define AXP_POWERSRC_STARTUP (1 << 0)
71 #define AXP_ICTYPE 0x03
72 #define AXP_POWERCTL1 0x10
73 #define AXP_POWERCTL1_DCDC7 (1 << 6) /* AXP813/818 only */
74 #define AXP_POWERCTL1_DCDC6 (1 << 5)
75 #define AXP_POWERCTL1_DCDC5 (1 << 4)
76 #define AXP_POWERCTL1_DCDC4 (1 << 3)
77 #define AXP_POWERCTL1_DCDC3 (1 << 2)
78 #define AXP_POWERCTL1_DCDC2 (1 << 1)
79 #define AXP_POWERCTL1_DCDC1 (1 << 0)
80 #define AXP_POWERCTL2 0x12
81 #define AXP_POWERCTL2_DC1SW (1 << 7) /* AXP803 only */
82 #define AXP_POWERCTL2_DLDO4 (1 << 6)
83 #define AXP_POWERCTL2_DLDO3 (1 << 5)
84 #define AXP_POWERCTL2_DLDO2 (1 << 4)
85 #define AXP_POWERCTL2_DLDO1 (1 << 3)
86 #define AXP_POWERCTL2_ELDO3 (1 << 2)
87 #define AXP_POWERCTL2_ELDO2 (1 << 1)
88 #define AXP_POWERCTL2_ELDO1 (1 << 0)
89 #define AXP_POWERCTL3 0x13
90 #define AXP_POWERCTL3_ALDO3 (1 << 7)
91 #define AXP_POWERCTL3_ALDO2 (1 << 6)
92 #define AXP_POWERCTL3_ALDO1 (1 << 5)
93 #define AXP_POWERCTL3_FLDO3 (1 << 4) /* AXP813/818 only */
94 #define AXP_POWERCTL3_FLDO2 (1 << 3)
95 #define AXP_POWERCTL3_FLDO1 (1 << 2)
96 #define AXP_VOLTCTL_DLDO1 0x15
97 #define AXP_VOLTCTL_DLDO2 0x16
98 #define AXP_VOLTCTL_DLDO3 0x17
99 #define AXP_VOLTCTL_DLDO4 0x18
100 #define AXP_VOLTCTL_ELDO1 0x19
101 #define AXP_VOLTCTL_ELDO2 0x1A
102 #define AXP_VOLTCTL_ELDO3 0x1B
103 #define AXP_VOLTCTL_FLDO1 0x1C
104 #define AXP_VOLTCTL_FLDO2 0x1D
105 #define AXP_VOLTCTL_DCDC1 0x20
106 #define AXP_VOLTCTL_DCDC2 0x21
107 #define AXP_VOLTCTL_DCDC3 0x22
108 #define AXP_VOLTCTL_DCDC4 0x23
109 #define AXP_VOLTCTL_DCDC5 0x24
110 #define AXP_VOLTCTL_DCDC6 0x25
111 #define AXP_VOLTCTL_DCDC7 0x26
112 #define AXP_VOLTCTL_ALDO1 0x28
113 #define AXP_VOLTCTL_ALDO2 0x29
114 #define AXP_VOLTCTL_ALDO3 0x2A
115 #define AXP_VOLTCTL_STATUS (1 << 7)
116 #define AXP_VOLTCTL_MASK 0x7f
117 #define AXP_POWERBAT 0x32
118 #define AXP_POWERBAT_SHUTDOWN (1 << 7)
119 #define AXP_IRQEN1 0x40
120 #define AXP_IRQEN2 0x41
121 #define AXP_IRQEN3 0x42
122 #define AXP_IRQEN4 0x43
123 #define AXP_IRQEN5 0x44
124 #define AXP_IRQEN5_POKSIRQ (1 << 4)
125 #define AXP_IRQEN6 0x45
126 #define AXP_IRQSTAT5 0x4c
127 #define AXP_IRQSTAT5_POKSIRQ (1 << 4)
128 #define AXP_GPIO0_CTRL 0x90
129 #define AXP_GPIO1_CTRL 0x92
130 #define AXP_GPIO_FUNC (0x7 << 0)
131 #define AXP_GPIO_FUNC_SHIFT 0
132 #define AXP_GPIO_FUNC_DRVLO 0
133 #define AXP_GPIO_FUNC_DRVHI 1
134 #define AXP_GPIO_FUNC_INPUT 2
135 #define AXP_GPIO_SIGBIT 0x94
136 #define AXP_GPIO_PD 0x97
138 static const struct {
142 { "GPIO0", AXP_GPIO0_CTRL },
143 { "GPIO1", AXP_GPIO1_CTRL },
151 static struct ofw_compat_data compat_data[] = {
152 { "x-powers,axp803", AXP803 },
153 { "x-powers,axp813", AXP813 },
154 { "x-powers,axp818", AXP813 },
158 static struct resource_spec axp8xx_spec[] = {
159 { SYS_RES_IRQ, 0, RF_ACTIVE },
163 struct axp8xx_regdef {
179 AXP8XX_REG_ID_DCDC1 = 100,
202 static struct axp8xx_regdef axp803_regdefs[] = {
204 .id = AXP803_REG_ID_DC1SW,
206 .enable_reg = AXP_POWERCTL2,
207 .enable_mask = AXP_POWERCTL2_DC1SW,
211 static struct axp8xx_regdef axp813_regdefs[] = {
213 .id = AXP813_REG_ID_DCDC7,
215 .enable_reg = AXP_POWERCTL1,
216 .enable_mask = AXP_POWERCTL1_DCDC7,
217 .voltage_reg = AXP_VOLTCTL_DCDC7,
221 .voltage_nstep1 = 50,
223 .voltage_nstep2 = 21,
227 static struct axp8xx_regdef axp8xx_common_regdefs[] = {
229 .id = AXP8XX_REG_ID_DCDC1,
231 .enable_reg = AXP_POWERCTL1,
232 .enable_mask = AXP_POWERCTL1_DCDC1,
233 .voltage_reg = AXP_VOLTCTL_DCDC1,
236 .voltage_step1 = 100,
237 .voltage_nstep1 = 18,
240 .id = AXP8XX_REG_ID_DCDC2,
242 .enable_reg = AXP_POWERCTL1,
243 .enable_mask = AXP_POWERCTL1_DCDC2,
244 .voltage_reg = AXP_VOLTCTL_DCDC2,
248 .voltage_nstep1 = 70,
253 .id = AXP8XX_REG_ID_DCDC3,
255 .enable_reg = AXP_POWERCTL1,
256 .enable_mask = AXP_POWERCTL1_DCDC3,
257 .voltage_reg = AXP_VOLTCTL_DCDC3,
261 .voltage_nstep1 = 70,
266 .id = AXP8XX_REG_ID_DCDC4,
268 .enable_reg = AXP_POWERCTL1,
269 .enable_mask = AXP_POWERCTL1_DCDC4,
270 .voltage_reg = AXP_VOLTCTL_DCDC4,
274 .voltage_nstep1 = 70,
279 .id = AXP8XX_REG_ID_DCDC5,
281 .enable_reg = AXP_POWERCTL1,
282 .enable_mask = AXP_POWERCTL1_DCDC5,
283 .voltage_reg = AXP_VOLTCTL_DCDC5,
287 .voltage_nstep1 = 42,
289 .voltage_nstep2 = 36,
292 .id = AXP8XX_REG_ID_DCDC6,
294 .enable_reg = AXP_POWERCTL1,
295 .enable_mask = AXP_POWERCTL1_DCDC6,
296 .voltage_reg = AXP_VOLTCTL_DCDC6,
300 .voltage_nstep1 = 50,
302 .voltage_nstep2 = 21,
305 .id = AXP8XX_REG_ID_DLDO1,
307 .enable_reg = AXP_POWERCTL2,
308 .enable_mask = AXP_POWERCTL2_DLDO1,
309 .voltage_reg = AXP_VOLTCTL_DLDO1,
312 .voltage_step1 = 100,
313 .voltage_nstep1 = 26,
316 .id = AXP8XX_REG_ID_DLDO2,
318 .enable_reg = AXP_POWERCTL2,
319 .enable_mask = AXP_POWERCTL2_DLDO2,
320 .voltage_reg = AXP_VOLTCTL_DLDO2,
323 .voltage_step1 = 100,
324 .voltage_nstep1 = 27,
325 .voltage_step2 = 200,
329 .id = AXP8XX_REG_ID_DLDO3,
331 .enable_reg = AXP_POWERCTL2,
332 .enable_mask = AXP_POWERCTL2_DLDO3,
333 .voltage_reg = AXP_VOLTCTL_DLDO3,
336 .voltage_step1 = 100,
337 .voltage_nstep1 = 26,
340 .id = AXP8XX_REG_ID_DLDO4,
342 .enable_reg = AXP_POWERCTL2,
343 .enable_mask = AXP_POWERCTL2_DLDO4,
344 .voltage_reg = AXP_VOLTCTL_DLDO4,
347 .voltage_step1 = 100,
348 .voltage_nstep1 = 26,
351 .id = AXP8XX_REG_ID_ALDO1,
353 .enable_reg = AXP_POWERCTL3,
354 .enable_mask = AXP_POWERCTL3_ALDO1,
357 .voltage_step1 = 100,
358 .voltage_nstep1 = 26,
361 .id = AXP8XX_REG_ID_ALDO2,
363 .enable_reg = AXP_POWERCTL3,
364 .enable_mask = AXP_POWERCTL3_ALDO2,
367 .voltage_step1 = 100,
368 .voltage_nstep1 = 26,
371 .id = AXP8XX_REG_ID_ALDO3,
373 .enable_reg = AXP_POWERCTL3,
374 .enable_mask = AXP_POWERCTL3_ALDO3,
377 .voltage_step1 = 100,
378 .voltage_nstep1 = 26,
381 .id = AXP8XX_REG_ID_ELDO1,
383 .enable_reg = AXP_POWERCTL2,
384 .enable_mask = AXP_POWERCTL2_ELDO1,
388 .voltage_nstep1 = 24,
391 .id = AXP8XX_REG_ID_ELDO2,
393 .enable_reg = AXP_POWERCTL2,
394 .enable_mask = AXP_POWERCTL2_ELDO2,
398 .voltage_nstep1 = 24,
401 .id = AXP8XX_REG_ID_ELDO3,
403 .enable_reg = AXP_POWERCTL2,
404 .enable_mask = AXP_POWERCTL2_ELDO3,
408 .voltage_nstep1 = 24,
411 .id = AXP8XX_REG_ID_FLDO1,
413 .enable_reg = AXP_POWERCTL3,
414 .enable_mask = AXP_POWERCTL3_FLDO1,
418 .voltage_nstep1 = 15,
421 .id = AXP8XX_REG_ID_FLDO2,
423 .enable_reg = AXP_POWERCTL3,
424 .enable_mask = AXP_POWERCTL3_FLDO2,
428 .voltage_nstep1 = 15,
434 struct axp8xx_reg_sc {
435 struct regnode *regnode;
437 struct axp8xx_regdef *def;
439 struct regnode_std_param *param;
442 struct axp8xx_softc {
443 struct resource *res;
453 struct axp8xx_reg_sc **regs;
457 #define AXP_LOCK(sc) mtx_lock(&(sc)->mtx)
458 #define AXP_UNLOCK(sc) mtx_unlock(&(sc)->mtx)
461 axp8xx_read(device_t dev, uint8_t reg, uint8_t *data, uint8_t size)
463 struct axp8xx_softc *sc;
464 struct iic_msg msg[2];
466 sc = device_get_softc(dev);
468 msg[0].slave = sc->addr;
469 msg[0].flags = IIC_M_WR;
473 msg[1].slave = sc->addr;
474 msg[1].flags = IIC_M_RD;
478 return (iicbus_transfer(dev, msg, 2));
482 axp8xx_write(device_t dev, uint8_t reg, uint8_t val)
484 struct axp8xx_softc *sc;
485 struct iic_msg msg[2];
487 sc = device_get_softc(dev);
489 msg[0].slave = sc->addr;
490 msg[0].flags = IIC_M_WR;
494 msg[1].slave = sc->addr;
495 msg[1].flags = IIC_M_WR;
499 return (iicbus_transfer(dev, msg, 2));
503 axp8xx_regnode_init(struct regnode *regnode)
509 axp8xx_regnode_enable(struct regnode *regnode, bool enable, int *udelay)
511 struct axp8xx_reg_sc *sc;
514 sc = regnode_get_softc(regnode);
517 device_printf(sc->base_dev, "%sable %s (%s)\n",
518 enable ? "En" : "Dis",
519 regnode_get_name(regnode),
522 axp8xx_read(sc->base_dev, sc->def->enable_reg, &val, 1);
524 val |= sc->def->enable_mask;
526 val &= ~sc->def->enable_mask;
527 axp8xx_write(sc->base_dev, sc->def->enable_reg, val);
535 axp8xx_regnode_reg_to_voltage(struct axp8xx_reg_sc *sc, uint8_t val, int *uv)
537 if (val < sc->def->voltage_nstep1)
538 *uv = sc->def->voltage_min + val * sc->def->voltage_step1;
540 *uv = sc->def->voltage_min +
541 (sc->def->voltage_nstep1 * sc->def->voltage_step1) +
542 ((val - sc->def->voltage_nstep1) * sc->def->voltage_step2);
547 axp8xx_regnode_voltage_to_reg(struct axp8xx_reg_sc *sc, int min_uvolt,
548 int max_uvolt, uint8_t *val)
554 uvolt = sc->def->voltage_min * 1000;
556 for (nstep = 0; nstep < sc->def->voltage_nstep1 && uvolt < min_uvolt;
559 uvolt += (sc->def->voltage_step1 * 1000);
561 for (nstep = 0; nstep < sc->def->voltage_nstep2 && uvolt < min_uvolt;
564 uvolt += (sc->def->voltage_step2 * 1000);
566 if (uvolt > max_uvolt)
574 axp8xx_regnode_set_voltage(struct regnode *regnode, int min_uvolt,
575 int max_uvolt, int *udelay)
577 struct axp8xx_reg_sc *sc;
580 sc = regnode_get_softc(regnode);
583 device_printf(sc->base_dev, "Setting %s (%s) to %d<->%d\n",
584 regnode_get_name(regnode),
586 min_uvolt, max_uvolt);
588 if (sc->def->voltage_step1 == 0)
591 if (axp8xx_regnode_voltage_to_reg(sc, min_uvolt, max_uvolt, &val) != 0)
594 axp8xx_write(sc->base_dev, sc->def->voltage_reg, val);
602 axp8xx_regnode_get_voltage(struct regnode *regnode, int *uvolt)
604 struct axp8xx_reg_sc *sc;
607 sc = regnode_get_softc(regnode);
609 if (!sc->def->voltage_step1 || !sc->def->voltage_step2)
612 axp8xx_read(sc->base_dev, sc->def->voltage_reg, &val, 1);
613 axp8xx_regnode_reg_to_voltage(sc, val & AXP_VOLTCTL_MASK, uvolt);
618 static regnode_method_t axp8xx_regnode_methods[] = {
619 /* Regulator interface */
620 REGNODEMETHOD(regnode_init, axp8xx_regnode_init),
621 REGNODEMETHOD(regnode_enable, axp8xx_regnode_enable),
622 REGNODEMETHOD(regnode_set_voltage, axp8xx_regnode_set_voltage),
623 REGNODEMETHOD(regnode_get_voltage, axp8xx_regnode_get_voltage),
626 DEFINE_CLASS_1(axp8xx_regnode, axp8xx_regnode_class, axp8xx_regnode_methods,
627 sizeof(struct axp8xx_reg_sc), regnode_class);
630 axp8xx_shutdown(void *devp, int howto)
634 if ((howto & RB_POWEROFF) == 0)
640 device_printf(dev, "Shutdown Axp8xx\n");
642 axp8xx_write(dev, AXP_POWERBAT, AXP_POWERBAT_SHUTDOWN);
646 axp8xx_intr(void *arg)
654 error = axp8xx_read(dev, AXP_IRQSTAT5, &val, 1);
659 if ((val & AXP_IRQSTAT5_POKSIRQ) != 0) {
661 device_printf(dev, "Power button pressed\n");
662 shutdown_nice(RB_POWEROFF);
665 axp8xx_write(dev, AXP_IRQSTAT5, val);
670 axp8xx_gpio_get_bus(device_t dev)
672 struct axp8xx_softc *sc;
674 sc = device_get_softc(dev);
676 return (sc->gpiodev);
680 axp8xx_gpio_pin_max(device_t dev, int *maxpin)
682 *maxpin = nitems(axp8xx_pins) - 1;
688 axp8xx_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
690 if (pin >= nitems(axp8xx_pins))
693 snprintf(name, GPIOMAXNAME, "%s", axp8xx_pins[pin].name);
699 axp8xx_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
701 if (pin >= nitems(axp8xx_pins))
704 *caps = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT;
710 axp8xx_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
712 struct axp8xx_softc *sc;
716 if (pin >= nitems(axp8xx_pins))
719 sc = device_get_softc(dev);
722 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1);
724 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT;
725 if (func == AXP_GPIO_FUNC_INPUT)
726 *flags = GPIO_PIN_INPUT;
727 else if (func == AXP_GPIO_FUNC_DRVLO ||
728 func == AXP_GPIO_FUNC_DRVHI)
729 *flags = GPIO_PIN_OUTPUT;
739 axp8xx_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
741 struct axp8xx_softc *sc;
745 if (pin >= nitems(axp8xx_pins))
748 sc = device_get_softc(dev);
751 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1);
753 data &= ~AXP_GPIO_FUNC;
754 if ((flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) != 0) {
755 if ((flags & GPIO_PIN_OUTPUT) == 0)
756 data |= AXP_GPIO_FUNC_INPUT;
758 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data);
766 axp8xx_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
768 struct axp8xx_softc *sc;
772 if (pin >= nitems(axp8xx_pins))
775 sc = device_get_softc(dev);
778 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1);
780 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT;
782 case AXP_GPIO_FUNC_DRVLO:
785 case AXP_GPIO_FUNC_DRVHI:
788 case AXP_GPIO_FUNC_INPUT:
789 error = axp8xx_read(dev, AXP_GPIO_SIGBIT, &data, 1);
791 *val = (data & (1 << pin)) ? 1 : 0;
804 axp8xx_gpio_pin_set(device_t dev, uint32_t pin, unsigned int val)
806 struct axp8xx_softc *sc;
810 if (pin >= nitems(axp8xx_pins))
813 sc = device_get_softc(dev);
816 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1);
818 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT;
820 case AXP_GPIO_FUNC_DRVLO:
821 case AXP_GPIO_FUNC_DRVHI:
822 data &= ~AXP_GPIO_FUNC;
823 data |= (val << AXP_GPIO_FUNC_SHIFT);
831 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data);
839 axp8xx_gpio_pin_toggle(device_t dev, uint32_t pin)
841 struct axp8xx_softc *sc;
845 if (pin >= nitems(axp8xx_pins))
848 sc = device_get_softc(dev);
851 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1);
853 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT;
855 case AXP_GPIO_FUNC_DRVLO:
856 data &= ~AXP_GPIO_FUNC;
857 data |= (AXP_GPIO_FUNC_DRVHI << AXP_GPIO_FUNC_SHIFT);
859 case AXP_GPIO_FUNC_DRVHI:
860 data &= ~AXP_GPIO_FUNC;
861 data |= (AXP_GPIO_FUNC_DRVLO << AXP_GPIO_FUNC_SHIFT);
869 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data);
876 axp8xx_gpio_map_gpios(device_t bus, phandle_t dev, phandle_t gparent,
877 int gcells, pcell_t *gpios, uint32_t *pin, uint32_t *flags)
879 if (gpios[0] >= nitems(axp8xx_pins))
889 axp8xx_get_node(device_t dev, device_t bus)
891 return (ofw_bus_get_node(dev));
894 static struct axp8xx_reg_sc *
895 axp8xx_reg_attach(device_t dev, phandle_t node,
896 struct axp8xx_regdef *def)
898 struct axp8xx_reg_sc *reg_sc;
899 struct regnode_init_def initdef;
900 struct regnode *regnode;
902 memset(&initdef, 0, sizeof(initdef));
903 if (regulator_parse_ofw_stdparam(dev, node, &initdef) != 0)
905 if (initdef.std_param.min_uvolt == 0)
906 initdef.std_param.min_uvolt = def->voltage_min * 1000;
907 if (initdef.std_param.max_uvolt == 0)
908 initdef.std_param.max_uvolt = def->voltage_max * 1000;
909 initdef.id = def->id;
910 initdef.ofw_node = node;
911 regnode = regnode_create(dev, &axp8xx_regnode_class, &initdef);
912 if (regnode == NULL) {
913 device_printf(dev, "cannot create regulator\n");
917 reg_sc = regnode_get_softc(regnode);
918 reg_sc->regnode = regnode;
919 reg_sc->base_dev = dev;
921 reg_sc->xref = OF_xref_from_node(node);
922 reg_sc->param = regnode_get_stdparam(regnode);
924 regnode_register(regnode);
930 axp8xx_regdev_map(device_t dev, phandle_t xref, int ncells, pcell_t *cells,
933 struct axp8xx_softc *sc;
936 sc = device_get_softc(dev);
937 for (i = 0; i < sc->nregs; i++) {
938 if (sc->regs[i] == NULL)
940 if (sc->regs[i]->xref == xref) {
941 *num = sc->regs[i]->def->id;
950 axp8xx_probe(device_t dev)
952 if (!ofw_bus_status_okay(dev))
955 switch (ofw_bus_search_compatible(dev, compat_data)->ocd_data)
958 device_set_desc(dev, "X-Powers AXP803 Power Management Unit");
961 device_set_desc(dev, "X-Powers AXP813 Power Management Unit");
967 return (BUS_PROBE_DEFAULT);
971 axp8xx_attach(device_t dev)
973 struct axp8xx_softc *sc;
974 struct axp8xx_reg_sc *reg;
976 phandle_t rnode, child;
979 sc = device_get_softc(dev);
981 sc->addr = iicbus_get_addr(dev);
982 mtx_init(&sc->mtx, device_get_nameunit(dev), NULL, MTX_DEF);
984 error = bus_alloc_resources(dev, axp8xx_spec, &sc->res);
986 device_printf(dev, "cannot allocate resources for device\n");
991 axp8xx_read(dev, AXP_ICTYPE, &chip_id, 1);
992 device_printf(dev, "chip ID 0x%02x\n", chip_id);
995 sc->nregs = nitems(axp8xx_common_regdefs);
996 sc->type = ofw_bus_search_compatible(dev, compat_data)->ocd_data;
999 sc->nregs += nitems(axp803_regdefs);
1002 sc->nregs += nitems(axp813_regdefs);
1005 sc->regs = malloc(sizeof(struct axp8xx_reg_sc *) * sc->nregs,
1006 M_AXP8XX_REG, M_WAITOK | M_ZERO);
1008 /* Attach known regulators that exist in the DT */
1009 rnode = ofw_bus_find_child(ofw_bus_get_node(dev), "regulators");
1011 for (i = 0; i < sc->nregs; i++) {
1013 struct axp8xx_regdef *regdef;
1015 if (i <= nitems(axp8xx_common_regdefs)) {
1016 regname = axp8xx_common_regdefs[i].name;
1017 regdef = &axp8xx_common_regdefs[i];
1021 off = i - nitems(axp8xx_common_regdefs);
1024 regname = axp803_regdefs[off].name;
1025 regdef = &axp803_regdefs[off];
1028 regname = axp813_regdefs[off].name;
1029 regdef = &axp813_regdefs[off];
1033 child = ofw_bus_find_child(rnode,
1037 reg = axp8xx_reg_attach(dev, child,
1041 "cannot attach regulator %s\n",
1049 /* Enable IRQ on short power key press */
1050 axp8xx_write(dev, AXP_IRQEN1, 0);
1051 axp8xx_write(dev, AXP_IRQEN2, 0);
1052 axp8xx_write(dev, AXP_IRQEN3, 0);
1053 axp8xx_write(dev, AXP_IRQEN4, 0);
1054 axp8xx_write(dev, AXP_IRQEN5, AXP_IRQEN5_POKSIRQ);
1055 axp8xx_write(dev, AXP_IRQEN6, 0);
1057 /* Install interrupt handler */
1058 error = bus_setup_intr(dev, sc->res, INTR_TYPE_MISC | INTR_MPSAFE,
1059 NULL, axp8xx_intr, dev, &sc->ih);
1061 device_printf(dev, "cannot setup interrupt handler\n");
1065 EVENTHANDLER_REGISTER(shutdown_final, axp8xx_shutdown, dev,
1068 sc->gpiodev = gpiobus_attach_bus(dev);
1073 static device_method_t axp8xx_methods[] = {
1074 /* Device interface */
1075 DEVMETHOD(device_probe, axp8xx_probe),
1076 DEVMETHOD(device_attach, axp8xx_attach),
1078 /* GPIO interface */
1079 DEVMETHOD(gpio_get_bus, axp8xx_gpio_get_bus),
1080 DEVMETHOD(gpio_pin_max, axp8xx_gpio_pin_max),
1081 DEVMETHOD(gpio_pin_getname, axp8xx_gpio_pin_getname),
1082 DEVMETHOD(gpio_pin_getcaps, axp8xx_gpio_pin_getcaps),
1083 DEVMETHOD(gpio_pin_getflags, axp8xx_gpio_pin_getflags),
1084 DEVMETHOD(gpio_pin_setflags, axp8xx_gpio_pin_setflags),
1085 DEVMETHOD(gpio_pin_get, axp8xx_gpio_pin_get),
1086 DEVMETHOD(gpio_pin_set, axp8xx_gpio_pin_set),
1087 DEVMETHOD(gpio_pin_toggle, axp8xx_gpio_pin_toggle),
1088 DEVMETHOD(gpio_map_gpios, axp8xx_gpio_map_gpios),
1090 /* Regdev interface */
1091 DEVMETHOD(regdev_map, axp8xx_regdev_map),
1093 /* OFW bus interface */
1094 DEVMETHOD(ofw_bus_get_node, axp8xx_get_node),
1099 static driver_t axp8xx_driver = {
1102 sizeof(struct axp8xx_softc),
1105 static devclass_t axp8xx_devclass;
1106 extern devclass_t ofwgpiobus_devclass, gpioc_devclass;
1107 extern driver_t ofw_gpiobus_driver, gpioc_driver;
1109 EARLY_DRIVER_MODULE(axp8xx, iicbus, axp8xx_driver, axp8xx_devclass, 0, 0,
1110 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST);
1111 EARLY_DRIVER_MODULE(ofw_gpiobus, axp8xx_pmu, ofw_gpiobus_driver,
1112 ofwgpiobus_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST);
1113 DRIVER_MODULE(gpioc, axp8xx_pmu, gpioc_driver, gpioc_devclass, 0, 0);
1114 MODULE_VERSION(axp8xx, 1);
1115 MODULE_DEPEND(axp8xx, iicbus, 1, 1, 1);