2 * Copyright (c) 2018 Emmanuel Vadot <manu@freebsd.org>
3 * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
20 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
21 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
22 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
23 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * X-Powers AXP803/813/818 PMU for Allwinner SoCs
34 #include <sys/cdefs.h>
35 __FBSDID("$FreeBSD$");
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/eventhandler.h>
42 #include <sys/kernel.h>
43 #include <sys/reboot.h>
45 #include <sys/module.h>
46 #include <machine/bus.h>
48 #include <dev/iicbus/iicbus.h>
49 #include <dev/iicbus/iiconf.h>
51 #include <dev/gpio/gpiobusvar.h>
53 #include <dev/ofw/ofw_bus.h>
54 #include <dev/ofw/ofw_bus_subr.h>
56 #include <dev/extres/regulator/regulator.h>
59 #include "iicbus_if.h"
60 #include "regdev_if.h"
62 MALLOC_DEFINE(M_AXP8XX_REG, "AXP8xx regulator", "AXP8xx power regulator");
64 #define AXP_POWERSRC 0x00
65 #define AXP_POWERSRC_ACIN (1 << 7)
66 #define AXP_POWERSRC_VBUS (1 << 5)
67 #define AXP_POWERSRC_VBAT (1 << 3)
68 #define AXP_POWERSRC_CHARING (1 << 2) /* Charging Direction */
69 #define AXP_POWERSRC_SHORTED (1 << 1)
70 #define AXP_POWERSRC_STARTUP (1 << 0)
71 #define AXP_POWERMODE 0x01
72 #define AXP_POWERMODE_BAT_CHARGING (1 << 6)
73 #define AXP_POWERMODE_BAT_PRESENT (1 << 5)
74 #define AXP_POWERMODE_BAT_VALID (1 << 4)
75 #define AXP_ICTYPE 0x03
76 #define AXP_POWERCTL1 0x10
77 #define AXP_POWERCTL1_DCDC7 (1 << 6) /* AXP813/818 only */
78 #define AXP_POWERCTL1_DCDC6 (1 << 5)
79 #define AXP_POWERCTL1_DCDC5 (1 << 4)
80 #define AXP_POWERCTL1_DCDC4 (1 << 3)
81 #define AXP_POWERCTL1_DCDC3 (1 << 2)
82 #define AXP_POWERCTL1_DCDC2 (1 << 1)
83 #define AXP_POWERCTL1_DCDC1 (1 << 0)
84 #define AXP_POWERCTL2 0x12
85 #define AXP_POWERCTL2_DC1SW (1 << 7) /* AXP803 only */
86 #define AXP_POWERCTL2_DLDO4 (1 << 6)
87 #define AXP_POWERCTL2_DLDO3 (1 << 5)
88 #define AXP_POWERCTL2_DLDO2 (1 << 4)
89 #define AXP_POWERCTL2_DLDO1 (1 << 3)
90 #define AXP_POWERCTL2_ELDO3 (1 << 2)
91 #define AXP_POWERCTL2_ELDO2 (1 << 1)
92 #define AXP_POWERCTL2_ELDO1 (1 << 0)
93 #define AXP_POWERCTL3 0x13
94 #define AXP_POWERCTL3_ALDO3 (1 << 7)
95 #define AXP_POWERCTL3_ALDO2 (1 << 6)
96 #define AXP_POWERCTL3_ALDO1 (1 << 5)
97 #define AXP_POWERCTL3_FLDO3 (1 << 4) /* AXP813/818 only */
98 #define AXP_POWERCTL3_FLDO2 (1 << 3)
99 #define AXP_POWERCTL3_FLDO1 (1 << 2)
100 #define AXP_VOLTCTL_DLDO1 0x15
101 #define AXP_VOLTCTL_DLDO2 0x16
102 #define AXP_VOLTCTL_DLDO3 0x17
103 #define AXP_VOLTCTL_DLDO4 0x18
104 #define AXP_VOLTCTL_ELDO1 0x19
105 #define AXP_VOLTCTL_ELDO2 0x1A
106 #define AXP_VOLTCTL_ELDO3 0x1B
107 #define AXP_VOLTCTL_FLDO1 0x1C
108 #define AXP_VOLTCTL_FLDO2 0x1D
109 #define AXP_VOLTCTL_DCDC1 0x20
110 #define AXP_VOLTCTL_DCDC2 0x21
111 #define AXP_VOLTCTL_DCDC3 0x22
112 #define AXP_VOLTCTL_DCDC4 0x23
113 #define AXP_VOLTCTL_DCDC5 0x24
114 #define AXP_VOLTCTL_DCDC6 0x25
115 #define AXP_VOLTCTL_DCDC7 0x26
116 #define AXP_VOLTCTL_ALDO1 0x28
117 #define AXP_VOLTCTL_ALDO2 0x29
118 #define AXP_VOLTCTL_ALDO3 0x2A
119 #define AXP_VOLTCTL_STATUS (1 << 7)
120 #define AXP_VOLTCTL_MASK 0x7f
121 #define AXP_POWERBAT 0x32
122 #define AXP_POWERBAT_SHUTDOWN (1 << 7)
123 #define AXP_IRQEN1 0x40
124 #define AXP_IRQEN1_ACIN_HI (1 << 6)
125 #define AXP_IRQEN1_ACIN_LO (1 << 5)
126 #define AXP_IRQEN1_VBUS_HI (1 << 3)
127 #define AXP_IRQEN1_VBUS_LO (1 << 2)
128 #define AXP_IRQEN2 0x41
129 #define AXP_IRQEN2_BAT_IN (1 << 7)
130 #define AXP_IRQEN2_BAT_NO (1 << 6)
131 #define AXP_IRQEN2_BATCHGC (1 << 3)
132 #define AXP_IRQEN2_BATCHGD (1 << 2)
133 #define AXP_IRQEN3 0x42
134 #define AXP_IRQEN4 0x43
135 #define AXP_IRQEN4_BATLVL_LO1 (1 << 1)
136 #define AXP_IRQEN4_BATLVL_LO0 (1 << 0)
137 #define AXP_IRQEN5 0x44
138 #define AXP_IRQEN5_POKSIRQ (1 << 4)
139 #define AXP_IRQEN5_POKLIRQ (1 << 3)
140 #define AXP_IRQEN6 0x45
141 #define AXP_IRQSTAT1 0x48
142 #define AXP_IRQSTAT1_ACIN_HI (1 << 6)
143 #define AXP_IRQSTAT1_ACIN_LO (1 << 5)
144 #define AXP_IRQSTAT1_VBUS_HI (1 << 3)
145 #define AXP_IRQSTAT1_VBUS_LO (1 << 2)
146 #define AXP_IRQSTAT2 0x49
147 #define AXP_IRQSTAT2_BAT_IN (1 << 7)
148 #define AXP_IRQSTAT2_BAT_NO (1 << 6)
149 #define AXP_IRQSTAT2_BATCHGC (1 << 3)
150 #define AXP_IRQSTAT2_BATCHGD (1 << 2)
151 #define AXP_IRQSTAT3 0x4a
152 #define AXP_IRQSTAT4 0x4b
153 #define AXP_IRQSTAT4_BATLVL_LO1 (1 << 1)
154 #define AXP_IRQSTAT4_BATLVL_LO0 (1 << 0)
155 #define AXP_IRQSTAT5 0x4c
156 #define AXP_IRQSTAT5_POKSIRQ (1 << 4)
157 #define AXP_IRQEN5_POKLIRQ (1 << 3)
158 #define AXP_IRQSTAT6 0x4d
159 #define AXP_BATSENSE_HI 0x78
160 #define AXP_BATSENSE_LO 0x79
161 #define AXP_BATCHG_HI 0x7a
162 #define AXP_BATCHG_LO 0x7b
163 #define AXP_BATDISCHG_HI 0x7c
164 #define AXP_BATDISCHG_LO 0x7d
165 #define AXP_GPIO0_CTRL 0x90
166 #define AXP_GPIO0LDO_CTRL 0x91
167 #define AXP_GPIO1_CTRL 0x92
168 #define AXP_GPIO1LDO_CTRL 0x93
169 #define AXP_GPIO_FUNC (0x7 << 0)
170 #define AXP_GPIO_FUNC_SHIFT 0
171 #define AXP_GPIO_FUNC_DRVLO 0
172 #define AXP_GPIO_FUNC_DRVHI 1
173 #define AXP_GPIO_FUNC_INPUT 2
174 #define AXP_GPIO_FUNC_LDO_ON 3
175 #define AXP_GPIO_FUNC_LDO_OFF 4
176 #define AXP_GPIO_SIGBIT 0x94
177 #define AXP_GPIO_PD 0x97
178 #define AXP_FUEL_GAUGECTL 0xb8
179 #define AXP_FUEL_GAUGECTL_EN (1 << 7)
181 #define AXP_BAT_CAP 0xb9
182 #define AXP_BAT_CAP_VALID (1 << 7)
183 #define AXP_BAT_CAP_PERCENT 0x7f
185 #define AXP_BAT_MAX_CAP_HI 0xe0
186 #define AXP_BAT_MAX_CAP_VALID (1 << 7)
187 #define AXP_BAT_MAX_CAP_LO 0xe1
189 #define AXP_BAT_COULOMB_HI 0xe2
190 #define AXP_BAT_COULOMB_VALID (1 << 7)
191 #define AXP_BAT_COULOMB_LO 0xe3
193 #define AXP_BAT_CAP_WARN 0xe6
194 #define AXP_BAT_CAP_WARN_LV1 0xf0 /* Bits 4, 5, 6, 7 */
195 #define AXP_BAT_CAP_WARN_LV2 0xf /* Bits 0, 1, 2, 3 */
197 static const struct {
201 { "GPIO0", AXP_GPIO0_CTRL },
202 { "GPIO1", AXP_GPIO1_CTRL },
210 static struct ofw_compat_data compat_data[] = {
211 { "x-powers,axp803", AXP803 },
212 { "x-powers,axp813", AXP813 },
213 { "x-powers,axp818", AXP813 },
217 static struct resource_spec axp8xx_spec[] = {
218 { SYS_RES_IRQ, 0, RF_ACTIVE },
222 struct axp8xx_regdef {
228 uint8_t enable_value;
229 uint8_t disable_value;
240 AXP8XX_REG_ID_DCDC1 = 100,
261 AXP8XX_REG_ID_GPIO0_LDO,
262 AXP8XX_REG_ID_GPIO1_LDO,
265 static struct axp8xx_regdef axp803_regdefs[] = {
267 .id = AXP803_REG_ID_DC1SW,
269 .enable_reg = AXP_POWERCTL2,
270 .enable_mask = (uint8_t) AXP_POWERCTL2_DC1SW,
271 .enable_value = AXP_POWERCTL2_DC1SW,
275 static struct axp8xx_regdef axp813_regdefs[] = {
277 .id = AXP813_REG_ID_DCDC7,
279 .enable_reg = AXP_POWERCTL1,
280 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC7,
281 .enable_value = AXP_POWERCTL1_DCDC7,
282 .voltage_reg = AXP_VOLTCTL_DCDC7,
286 .voltage_nstep1 = 50,
288 .voltage_nstep2 = 21,
292 static struct axp8xx_regdef axp8xx_common_regdefs[] = {
294 .id = AXP8XX_REG_ID_DCDC1,
296 .enable_reg = AXP_POWERCTL1,
297 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC1,
298 .enable_value = AXP_POWERCTL1_DCDC1,
299 .voltage_reg = AXP_VOLTCTL_DCDC1,
302 .voltage_step1 = 100,
303 .voltage_nstep1 = 18,
306 .id = AXP8XX_REG_ID_DCDC2,
308 .enable_reg = AXP_POWERCTL1,
309 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC2,
310 .enable_value = AXP_POWERCTL1_DCDC2,
311 .voltage_reg = AXP_VOLTCTL_DCDC2,
315 .voltage_nstep1 = 70,
320 .id = AXP8XX_REG_ID_DCDC3,
322 .enable_reg = AXP_POWERCTL1,
323 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC3,
324 .enable_value = AXP_POWERCTL1_DCDC3,
325 .voltage_reg = AXP_VOLTCTL_DCDC3,
329 .voltage_nstep1 = 70,
334 .id = AXP8XX_REG_ID_DCDC4,
336 .enable_reg = AXP_POWERCTL1,
337 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC4,
338 .enable_value = AXP_POWERCTL1_DCDC4,
339 .voltage_reg = AXP_VOLTCTL_DCDC4,
343 .voltage_nstep1 = 70,
348 .id = AXP8XX_REG_ID_DCDC5,
350 .enable_reg = AXP_POWERCTL1,
351 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC5,
352 .enable_value = AXP_POWERCTL1_DCDC5,
353 .voltage_reg = AXP_VOLTCTL_DCDC5,
357 .voltage_nstep1 = 42,
359 .voltage_nstep2 = 36,
362 .id = AXP8XX_REG_ID_DCDC6,
364 .enable_reg = AXP_POWERCTL1,
365 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC6,
366 .enable_value = AXP_POWERCTL1_DCDC6,
367 .voltage_reg = AXP_VOLTCTL_DCDC6,
371 .voltage_nstep1 = 50,
373 .voltage_nstep2 = 21,
376 .id = AXP8XX_REG_ID_DLDO1,
378 .enable_reg = AXP_POWERCTL2,
379 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO1,
380 .enable_value = AXP_POWERCTL2_DLDO1,
381 .voltage_reg = AXP_VOLTCTL_DLDO1,
384 .voltage_step1 = 100,
385 .voltage_nstep1 = 26,
388 .id = AXP8XX_REG_ID_DLDO2,
390 .enable_reg = AXP_POWERCTL2,
391 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO2,
392 .enable_value = AXP_POWERCTL2_DLDO2,
393 .voltage_reg = AXP_VOLTCTL_DLDO2,
396 .voltage_step1 = 100,
397 .voltage_nstep1 = 27,
398 .voltage_step2 = 200,
402 .id = AXP8XX_REG_ID_DLDO3,
404 .enable_reg = AXP_POWERCTL2,
405 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO3,
406 .enable_value = AXP_POWERCTL2_DLDO3,
407 .voltage_reg = AXP_VOLTCTL_DLDO3,
410 .voltage_step1 = 100,
411 .voltage_nstep1 = 26,
414 .id = AXP8XX_REG_ID_DLDO4,
416 .enable_reg = AXP_POWERCTL2,
417 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO4,
418 .enable_value = AXP_POWERCTL2_DLDO4,
419 .voltage_reg = AXP_VOLTCTL_DLDO4,
422 .voltage_step1 = 100,
423 .voltage_nstep1 = 26,
426 .id = AXP8XX_REG_ID_ALDO1,
428 .enable_reg = AXP_POWERCTL3,
429 .enable_mask = (uint8_t) AXP_POWERCTL3_ALDO1,
430 .enable_value = AXP_POWERCTL3_ALDO1,
433 .voltage_step1 = 100,
434 .voltage_nstep1 = 26,
437 .id = AXP8XX_REG_ID_ALDO2,
439 .enable_reg = AXP_POWERCTL3,
440 .enable_mask = (uint8_t) AXP_POWERCTL3_ALDO2,
441 .enable_value = AXP_POWERCTL3_ALDO2,
444 .voltage_step1 = 100,
445 .voltage_nstep1 = 26,
448 .id = AXP8XX_REG_ID_ALDO3,
450 .enable_reg = AXP_POWERCTL3,
451 .enable_mask = (uint8_t) AXP_POWERCTL3_ALDO3,
452 .enable_value = AXP_POWERCTL3_ALDO3,
455 .voltage_step1 = 100,
456 .voltage_nstep1 = 26,
459 .id = AXP8XX_REG_ID_ELDO1,
461 .enable_reg = AXP_POWERCTL2,
462 .enable_mask = (uint8_t) AXP_POWERCTL2_ELDO1,
463 .enable_value = AXP_POWERCTL2_ELDO1,
467 .voltage_nstep1 = 24,
470 .id = AXP8XX_REG_ID_ELDO2,
472 .enable_reg = AXP_POWERCTL2,
473 .enable_mask = (uint8_t) AXP_POWERCTL2_ELDO2,
474 .enable_value = AXP_POWERCTL2_ELDO2,
478 .voltage_nstep1 = 24,
481 .id = AXP8XX_REG_ID_ELDO3,
483 .enable_reg = AXP_POWERCTL2,
484 .enable_mask = (uint8_t) AXP_POWERCTL2_ELDO3,
485 .enable_value = AXP_POWERCTL2_ELDO3,
489 .voltage_nstep1 = 24,
492 .id = AXP8XX_REG_ID_FLDO1,
494 .enable_reg = AXP_POWERCTL3,
495 .enable_mask = (uint8_t) AXP_POWERCTL3_FLDO1,
496 .enable_value = AXP_POWERCTL3_FLDO1,
500 .voltage_nstep1 = 15,
503 .id = AXP8XX_REG_ID_FLDO2,
505 .enable_reg = AXP_POWERCTL3,
506 .enable_mask = (uint8_t) AXP_POWERCTL3_FLDO2,
507 .enable_value = AXP_POWERCTL3_FLDO2,
511 .voltage_nstep1 = 15,
514 .id = AXP8XX_REG_ID_GPIO0_LDO,
516 .enable_reg = AXP_GPIO0_CTRL,
517 .enable_mask = (uint8_t) AXP_GPIO_FUNC,
518 .enable_value = AXP_GPIO_FUNC_LDO_ON,
519 .disable_value = AXP_GPIO_FUNC_LDO_OFF,
520 .voltage_reg = AXP_GPIO0LDO_CTRL,
523 .voltage_step1 = 100,
524 .voltage_nstep1 = 26,
527 .id = AXP8XX_REG_ID_GPIO1_LDO,
529 .enable_reg = AXP_GPIO1_CTRL,
530 .enable_mask = (uint8_t) AXP_GPIO_FUNC,
531 .enable_value = AXP_GPIO_FUNC_LDO_ON,
532 .disable_value = AXP_GPIO_FUNC_LDO_OFF,
533 .voltage_reg = AXP_GPIO1LDO_CTRL,
536 .voltage_step1 = 100,
537 .voltage_nstep1 = 26,
543 struct axp8xx_reg_sc {
544 struct regnode *regnode;
546 struct axp8xx_regdef *def;
548 struct regnode_std_param *param;
551 struct axp8xx_softc {
552 struct resource *res;
562 struct axp8xx_reg_sc **regs;
566 #define AXP_LOCK(sc) mtx_lock(&(sc)->mtx)
567 #define AXP_UNLOCK(sc) mtx_unlock(&(sc)->mtx)
570 axp8xx_read(device_t dev, uint8_t reg, uint8_t *data, uint8_t size)
572 struct axp8xx_softc *sc;
573 struct iic_msg msg[2];
575 sc = device_get_softc(dev);
577 msg[0].slave = sc->addr;
578 msg[0].flags = IIC_M_WR;
582 msg[1].slave = sc->addr;
583 msg[1].flags = IIC_M_RD;
587 return (iicbus_transfer(dev, msg, 2));
591 axp8xx_write(device_t dev, uint8_t reg, uint8_t val)
593 struct axp8xx_softc *sc;
594 struct iic_msg msg[2];
596 sc = device_get_softc(dev);
598 msg[0].slave = sc->addr;
599 msg[0].flags = IIC_M_WR;
603 msg[1].slave = sc->addr;
604 msg[1].flags = IIC_M_WR;
608 return (iicbus_transfer(dev, msg, 2));
612 axp8xx_regnode_init(struct regnode *regnode)
618 axp8xx_regnode_enable(struct regnode *regnode, bool enable, int *udelay)
620 struct axp8xx_reg_sc *sc;
623 sc = regnode_get_softc(regnode);
626 device_printf(sc->base_dev, "%sable %s (%s)\n",
627 enable ? "En" : "Dis",
628 regnode_get_name(regnode),
631 axp8xx_read(sc->base_dev, sc->def->enable_reg, &val, 1);
632 val &= ~sc->def->enable_mask;
634 val |= sc->def->enable_value;
636 if (sc->def->disable_value)
637 val |= sc->def->disable_value;
639 val &= ~sc->def->enable_value;
641 axp8xx_write(sc->base_dev, sc->def->enable_reg, val);
649 axp8xx_regnode_reg_to_voltage(struct axp8xx_reg_sc *sc, uint8_t val, int *uv)
651 if (val < sc->def->voltage_nstep1)
652 *uv = sc->def->voltage_min + val * sc->def->voltage_step1;
654 *uv = sc->def->voltage_min +
655 (sc->def->voltage_nstep1 * sc->def->voltage_step1) +
656 ((val - sc->def->voltage_nstep1) * sc->def->voltage_step2);
661 axp8xx_regnode_voltage_to_reg(struct axp8xx_reg_sc *sc, int min_uvolt,
662 int max_uvolt, uint8_t *val)
668 uvolt = sc->def->voltage_min * 1000;
670 for (nstep = 0; nstep < sc->def->voltage_nstep1 && uvolt < min_uvolt;
673 uvolt += (sc->def->voltage_step1 * 1000);
675 for (nstep = 0; nstep < sc->def->voltage_nstep2 && uvolt < min_uvolt;
678 uvolt += (sc->def->voltage_step2 * 1000);
680 if (uvolt > max_uvolt)
688 axp8xx_regnode_set_voltage(struct regnode *regnode, int min_uvolt,
689 int max_uvolt, int *udelay)
691 struct axp8xx_reg_sc *sc;
694 sc = regnode_get_softc(regnode);
697 device_printf(sc->base_dev, "Setting %s (%s) to %d<->%d\n",
698 regnode_get_name(regnode),
700 min_uvolt, max_uvolt);
702 if (sc->def->voltage_step1 == 0)
705 if (axp8xx_regnode_voltage_to_reg(sc, min_uvolt, max_uvolt, &val) != 0)
708 axp8xx_write(sc->base_dev, sc->def->voltage_reg, val);
716 axp8xx_regnode_get_voltage(struct regnode *regnode, int *uvolt)
718 struct axp8xx_reg_sc *sc;
721 sc = regnode_get_softc(regnode);
723 if (!sc->def->voltage_step1 || !sc->def->voltage_step2)
726 axp8xx_read(sc->base_dev, sc->def->voltage_reg, &val, 1);
727 axp8xx_regnode_reg_to_voltage(sc, val & AXP_VOLTCTL_MASK, uvolt);
732 static regnode_method_t axp8xx_regnode_methods[] = {
733 /* Regulator interface */
734 REGNODEMETHOD(regnode_init, axp8xx_regnode_init),
735 REGNODEMETHOD(regnode_enable, axp8xx_regnode_enable),
736 REGNODEMETHOD(regnode_set_voltage, axp8xx_regnode_set_voltage),
737 REGNODEMETHOD(regnode_get_voltage, axp8xx_regnode_get_voltage),
740 DEFINE_CLASS_1(axp8xx_regnode, axp8xx_regnode_class, axp8xx_regnode_methods,
741 sizeof(struct axp8xx_reg_sc), regnode_class);
744 axp8xx_shutdown(void *devp, int howto)
748 if ((howto & RB_POWEROFF) == 0)
754 device_printf(dev, "Shutdown Axp8xx\n");
756 axp8xx_write(dev, AXP_POWERBAT, AXP_POWERBAT_SHUTDOWN);
760 axp8xx_intr(void *arg)
768 error = axp8xx_read(dev, AXP_IRQSTAT1, &val, 1);
774 device_printf(dev, "AXP_IRQSTAT1 val: %x\n", val);
775 if (val & AXP_IRQSTAT1_ACIN_HI)
776 devctl_notify("PMU", "AC", "plugged", NULL);
777 if (val & AXP_IRQSTAT1_ACIN_LO)
778 devctl_notify("PMU", "AC", "unplugged", NULL);
779 if (val & AXP_IRQSTAT1_VBUS_HI)
780 devctl_notify("PMU", "USB", "plugged", NULL);
781 if (val & AXP_IRQSTAT1_VBUS_LO)
782 devctl_notify("PMU", "USB", "unplugged", NULL);
784 axp8xx_write(dev, AXP_IRQSTAT1, val);
787 error = axp8xx_read(dev, AXP_IRQSTAT2, &val, 1);
793 device_printf(dev, "AXP_IRQSTAT2 val: %x\n", val);
794 if (val & AXP_IRQSTAT2_BATCHGD)
795 devctl_notify("PMU", "Battery", "charged", NULL);
796 if (val & AXP_IRQSTAT2_BATCHGC)
797 devctl_notify("PMU", "Battery", "charging", NULL);
798 if (val & AXP_IRQSTAT2_BAT_NO)
799 devctl_notify("PMU", "Battery", "absent", NULL);
800 if (val & AXP_IRQSTAT2_BAT_IN)
801 devctl_notify("PMU", "Battery", "plugged", NULL);
803 axp8xx_write(dev, AXP_IRQSTAT2, val);
806 error = axp8xx_read(dev, AXP_IRQSTAT3, &val, 1);
812 axp8xx_write(dev, AXP_IRQSTAT3, val);
815 error = axp8xx_read(dev, AXP_IRQSTAT4, &val, 1);
821 device_printf(dev, "AXP_IRQSTAT4 val: %x\n", val);
822 if (val & AXP_IRQSTAT4_BATLVL_LO0)
823 devctl_notify("PMU", "Battery", "lower than level 2", NULL);
824 if (val & AXP_IRQSTAT4_BATLVL_LO1)
825 devctl_notify("PMU", "Battery", "lower than level 1", NULL);
827 axp8xx_write(dev, AXP_IRQSTAT4, val);
830 error = axp8xx_read(dev, AXP_IRQSTAT5, &val, 1);
835 if ((val & AXP_IRQSTAT5_POKSIRQ) != 0) {
837 device_printf(dev, "Power button pressed\n");
838 shutdown_nice(RB_POWEROFF);
841 axp8xx_write(dev, AXP_IRQSTAT5, val);
844 error = axp8xx_read(dev, AXP_IRQSTAT6, &val, 1);
850 axp8xx_write(dev, AXP_IRQSTAT6, val);
855 axp8xx_gpio_get_bus(device_t dev)
857 struct axp8xx_softc *sc;
859 sc = device_get_softc(dev);
861 return (sc->gpiodev);
865 axp8xx_gpio_pin_max(device_t dev, int *maxpin)
867 *maxpin = nitems(axp8xx_pins) - 1;
873 axp8xx_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
875 if (pin >= nitems(axp8xx_pins))
878 snprintf(name, GPIOMAXNAME, "%s", axp8xx_pins[pin].name);
884 axp8xx_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
886 if (pin >= nitems(axp8xx_pins))
889 *caps = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT;
895 axp8xx_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
897 struct axp8xx_softc *sc;
901 if (pin >= nitems(axp8xx_pins))
904 sc = device_get_softc(dev);
907 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1);
909 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT;
910 if (func == AXP_GPIO_FUNC_INPUT)
911 *flags = GPIO_PIN_INPUT;
912 else if (func == AXP_GPIO_FUNC_DRVLO ||
913 func == AXP_GPIO_FUNC_DRVHI)
914 *flags = GPIO_PIN_OUTPUT;
924 axp8xx_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
926 struct axp8xx_softc *sc;
930 if (pin >= nitems(axp8xx_pins))
933 sc = device_get_softc(dev);
936 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1);
938 data &= ~AXP_GPIO_FUNC;
939 if ((flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) != 0) {
940 if ((flags & GPIO_PIN_OUTPUT) == 0)
941 data |= AXP_GPIO_FUNC_INPUT;
943 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data);
951 axp8xx_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
953 struct axp8xx_softc *sc;
957 if (pin >= nitems(axp8xx_pins))
960 sc = device_get_softc(dev);
963 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1);
965 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT;
967 case AXP_GPIO_FUNC_DRVLO:
970 case AXP_GPIO_FUNC_DRVHI:
973 case AXP_GPIO_FUNC_INPUT:
974 error = axp8xx_read(dev, AXP_GPIO_SIGBIT, &data, 1);
976 *val = (data & (1 << pin)) ? 1 : 0;
989 axp8xx_gpio_pin_set(device_t dev, uint32_t pin, unsigned int val)
991 struct axp8xx_softc *sc;
995 if (pin >= nitems(axp8xx_pins))
998 sc = device_get_softc(dev);
1001 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1);
1003 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT;
1005 case AXP_GPIO_FUNC_DRVLO:
1006 case AXP_GPIO_FUNC_DRVHI:
1007 data &= ~AXP_GPIO_FUNC;
1008 data |= (val << AXP_GPIO_FUNC_SHIFT);
1016 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data);
1024 axp8xx_gpio_pin_toggle(device_t dev, uint32_t pin)
1026 struct axp8xx_softc *sc;
1030 if (pin >= nitems(axp8xx_pins))
1033 sc = device_get_softc(dev);
1036 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1);
1038 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT;
1040 case AXP_GPIO_FUNC_DRVLO:
1041 data &= ~AXP_GPIO_FUNC;
1042 data |= (AXP_GPIO_FUNC_DRVHI << AXP_GPIO_FUNC_SHIFT);
1044 case AXP_GPIO_FUNC_DRVHI:
1045 data &= ~AXP_GPIO_FUNC;
1046 data |= (AXP_GPIO_FUNC_DRVLO << AXP_GPIO_FUNC_SHIFT);
1054 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data);
1061 axp8xx_gpio_map_gpios(device_t bus, phandle_t dev, phandle_t gparent,
1062 int gcells, pcell_t *gpios, uint32_t *pin, uint32_t *flags)
1064 if (gpios[0] >= nitems(axp8xx_pins))
1074 axp8xx_get_node(device_t dev, device_t bus)
1076 return (ofw_bus_get_node(dev));
1079 static struct axp8xx_reg_sc *
1080 axp8xx_reg_attach(device_t dev, phandle_t node,
1081 struct axp8xx_regdef *def)
1083 struct axp8xx_reg_sc *reg_sc;
1084 struct regnode_init_def initdef;
1085 struct regnode *regnode;
1087 memset(&initdef, 0, sizeof(initdef));
1088 if (regulator_parse_ofw_stdparam(dev, node, &initdef) != 0)
1090 if (initdef.std_param.min_uvolt == 0)
1091 initdef.std_param.min_uvolt = def->voltage_min * 1000;
1092 if (initdef.std_param.max_uvolt == 0)
1093 initdef.std_param.max_uvolt = def->voltage_max * 1000;
1094 initdef.id = def->id;
1095 initdef.ofw_node = node;
1096 regnode = regnode_create(dev, &axp8xx_regnode_class, &initdef);
1097 if (regnode == NULL) {
1098 device_printf(dev, "cannot create regulator\n");
1102 reg_sc = regnode_get_softc(regnode);
1103 reg_sc->regnode = regnode;
1104 reg_sc->base_dev = dev;
1106 reg_sc->xref = OF_xref_from_node(node);
1107 reg_sc->param = regnode_get_stdparam(regnode);
1109 regnode_register(regnode);
1115 axp8xx_regdev_map(device_t dev, phandle_t xref, int ncells, pcell_t *cells,
1118 struct axp8xx_softc *sc;
1121 sc = device_get_softc(dev);
1122 for (i = 0; i < sc->nregs; i++) {
1123 if (sc->regs[i] == NULL)
1125 if (sc->regs[i]->xref == xref) {
1126 *num = sc->regs[i]->def->id;
1135 axp8xx_probe(device_t dev)
1137 if (!ofw_bus_status_okay(dev))
1140 switch (ofw_bus_search_compatible(dev, compat_data)->ocd_data)
1143 device_set_desc(dev, "X-Powers AXP803 Power Management Unit");
1146 device_set_desc(dev, "X-Powers AXP813 Power Management Unit");
1152 return (BUS_PROBE_DEFAULT);
1156 axp8xx_attach(device_t dev)
1158 struct axp8xx_softc *sc;
1159 struct axp8xx_reg_sc *reg;
1161 phandle_t rnode, child;
1164 sc = device_get_softc(dev);
1166 sc->addr = iicbus_get_addr(dev);
1167 mtx_init(&sc->mtx, device_get_nameunit(dev), NULL, MTX_DEF);
1169 error = bus_alloc_resources(dev, axp8xx_spec, &sc->res);
1171 device_printf(dev, "cannot allocate resources for device\n");
1176 axp8xx_read(dev, AXP_ICTYPE, &chip_id, 1);
1177 device_printf(dev, "chip ID 0x%02x\n", chip_id);
1180 sc->nregs = nitems(axp8xx_common_regdefs);
1181 sc->type = ofw_bus_search_compatible(dev, compat_data)->ocd_data;
1184 sc->nregs += nitems(axp803_regdefs);
1187 sc->nregs += nitems(axp813_regdefs);
1190 sc->regs = malloc(sizeof(struct axp8xx_reg_sc *) * sc->nregs,
1191 M_AXP8XX_REG, M_WAITOK | M_ZERO);
1193 /* Attach known regulators that exist in the DT */
1194 rnode = ofw_bus_find_child(ofw_bus_get_node(dev), "regulators");
1196 for (i = 0; i < sc->nregs; i++) {
1198 struct axp8xx_regdef *regdef;
1200 if (i <= nitems(axp8xx_common_regdefs)) {
1201 regname = axp8xx_common_regdefs[i].name;
1202 regdef = &axp8xx_common_regdefs[i];
1206 off = i - nitems(axp8xx_common_regdefs);
1209 regname = axp803_regdefs[off].name;
1210 regdef = &axp803_regdefs[off];
1213 regname = axp813_regdefs[off].name;
1214 regdef = &axp813_regdefs[off];
1218 child = ofw_bus_find_child(rnode,
1222 reg = axp8xx_reg_attach(dev, child,
1226 "cannot attach regulator %s\n",
1234 /* Enable interrupts */
1235 axp8xx_write(dev, AXP_IRQEN1,
1236 AXP_IRQEN1_VBUS_LO |
1237 AXP_IRQEN1_VBUS_HI |
1238 AXP_IRQEN1_ACIN_LO |
1239 AXP_IRQEN1_ACIN_HI);
1240 axp8xx_write(dev, AXP_IRQEN2,
1241 AXP_IRQEN2_BATCHGD |
1242 AXP_IRQEN2_BATCHGC |
1245 axp8xx_write(dev, AXP_IRQEN3, 0);
1246 axp8xx_write(dev, AXP_IRQEN4,
1247 AXP_IRQEN4_BATLVL_LO0 |
1248 AXP_IRQEN4_BATLVL_LO1);
1249 axp8xx_write(dev, AXP_IRQEN5,
1250 AXP_IRQEN5_POKSIRQ |
1251 AXP_IRQEN5_POKLIRQ);
1252 axp8xx_write(dev, AXP_IRQEN6, 0);
1254 /* Install interrupt handler */
1255 error = bus_setup_intr(dev, sc->res, INTR_TYPE_MISC | INTR_MPSAFE,
1256 NULL, axp8xx_intr, dev, &sc->ih);
1258 device_printf(dev, "cannot setup interrupt handler\n");
1262 EVENTHANDLER_REGISTER(shutdown_final, axp8xx_shutdown, dev,
1265 sc->gpiodev = gpiobus_attach_bus(dev);
1270 static device_method_t axp8xx_methods[] = {
1271 /* Device interface */
1272 DEVMETHOD(device_probe, axp8xx_probe),
1273 DEVMETHOD(device_attach, axp8xx_attach),
1275 /* GPIO interface */
1276 DEVMETHOD(gpio_get_bus, axp8xx_gpio_get_bus),
1277 DEVMETHOD(gpio_pin_max, axp8xx_gpio_pin_max),
1278 DEVMETHOD(gpio_pin_getname, axp8xx_gpio_pin_getname),
1279 DEVMETHOD(gpio_pin_getcaps, axp8xx_gpio_pin_getcaps),
1280 DEVMETHOD(gpio_pin_getflags, axp8xx_gpio_pin_getflags),
1281 DEVMETHOD(gpio_pin_setflags, axp8xx_gpio_pin_setflags),
1282 DEVMETHOD(gpio_pin_get, axp8xx_gpio_pin_get),
1283 DEVMETHOD(gpio_pin_set, axp8xx_gpio_pin_set),
1284 DEVMETHOD(gpio_pin_toggle, axp8xx_gpio_pin_toggle),
1285 DEVMETHOD(gpio_map_gpios, axp8xx_gpio_map_gpios),
1287 /* Regdev interface */
1288 DEVMETHOD(regdev_map, axp8xx_regdev_map),
1290 /* OFW bus interface */
1291 DEVMETHOD(ofw_bus_get_node, axp8xx_get_node),
1296 static driver_t axp8xx_driver = {
1299 sizeof(struct axp8xx_softc),
1302 static devclass_t axp8xx_devclass;
1303 extern devclass_t ofwgpiobus_devclass, gpioc_devclass;
1304 extern driver_t ofw_gpiobus_driver, gpioc_driver;
1306 EARLY_DRIVER_MODULE(axp8xx, iicbus, axp8xx_driver, axp8xx_devclass, 0, 0,
1307 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST);
1308 EARLY_DRIVER_MODULE(ofw_gpiobus, axp8xx_pmu, ofw_gpiobus_driver,
1309 ofwgpiobus_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST);
1310 DRIVER_MODULE(gpioc, axp8xx_pmu, gpioc_driver, gpioc_devclass, 0, 0);
1311 MODULE_VERSION(axp8xx, 1);
1312 MODULE_DEPEND(axp8xx, iicbus, 1, 1, 1);