2 * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
19 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
20 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
21 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
22 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD$");
36 #include <sys/param.h>
37 #include <sys/systm.h>
40 #include <sys/kernel.h>
41 #include <sys/module.h>
42 #include <machine/bus.h>
44 #include <dev/ofw/ofw_bus.h>
45 #include <dev/ofw/ofw_bus_subr.h>
46 #include <dev/ofw/ofw_subr.h>
48 #include <dev/extres/clk/clk_mux.h>
49 #include <dev/extres/clk/clk_gate.h>
51 #include "clkdev_if.h"
53 #define AXI_CLK_DIV_RATIO (0x3 << 0)
55 static struct ofw_compat_data compat_data[] = {
56 { "allwinner,sun4i-a10-axi-clk", 1 },
57 { "allwinner,sun8i-a23-axi-clk", 1 },
66 #define AXICLK_READ(sc, val) CLKDEV_READ_4((sc)->clkdev, (sc)->reg, (val))
67 #define AXICLK_WRITE(sc, val) CLKDEV_WRITE_4((sc)->clkdev, (sc)->reg, (val))
68 #define DEVICE_LOCK(sc) CLKDEV_DEVICE_LOCK((sc)->clkdev)
69 #define DEVICE_UNLOCK(sc) CLKDEV_DEVICE_UNLOCK((sc)->clkdev)
72 aw_axiclk_init(struct clknode *clk, device_t dev)
74 clknode_init_parent_idx(clk, 0);
79 aw_axiclk_recalc_freq(struct clknode *clk, uint64_t *freq)
81 struct aw_axiclk_sc *sc;
84 sc = clknode_get_softc(clk);
87 AXICLK_READ(sc, &val);
90 *freq = *freq / ((val & AXI_CLK_DIV_RATIO) + 1);
95 static clknode_method_t aw_axiclk_clknode_methods[] = {
96 /* Device interface */
97 CLKNODEMETHOD(clknode_init, aw_axiclk_init),
98 CLKNODEMETHOD(clknode_recalc_freq, aw_axiclk_recalc_freq),
101 DEFINE_CLASS_1(aw_axiclk_clknode, aw_axiclk_clknode_class,
102 aw_axiclk_clknode_methods, sizeof(struct aw_axiclk_sc), clknode_class);
105 aw_axiclk_probe(device_t dev)
107 if (!ofw_bus_status_okay(dev))
110 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
113 device_set_desc(dev, "Allwinner AXI Clock");
114 return (BUS_PROBE_DEFAULT);
118 aw_axiclk_attach(device_t dev)
120 struct clknode_init_def def;
121 struct aw_axiclk_sc *sc;
122 struct clkdom *clkdom;
130 node = ofw_bus_get_node(dev);
132 if (ofw_reg_to_paddr(node, 0, &paddr, &psize, NULL) != 0) {
133 device_printf(dev, "cannot parse 'reg' property\n");
137 clkdom = clkdom_create(dev);
139 error = clk_get_by_ofw_index(dev, 0, 0, &clk_parent);
141 device_printf(dev, "cannot parse clock parent\n");
145 memset(&def, 0, sizeof(def));
146 error = clk_parse_ofw_clk_name(dev, node, &def.name);
148 device_printf(dev, "cannot parse clock name\n");
153 def.parent_names = malloc(sizeof(char *), M_OFWPROP, M_WAITOK);
154 def.parent_names[0] = clk_get_name(clk_parent);
157 clk = clknode_create(clkdom, &aw_axiclk_clknode_class, &def);
159 device_printf(dev, "cannot create clknode\n");
164 sc = clknode_get_softc(clk);
166 sc->clkdev = device_get_parent(dev);
168 clknode_register(clkdom, clk);
170 if (clkdom_finit(clkdom) != 0) {
171 device_printf(dev, "cannot finalize clkdom initialization\n");
185 static device_method_t aw_axiclk_methods[] = {
186 /* Device interface */
187 DEVMETHOD(device_probe, aw_axiclk_probe),
188 DEVMETHOD(device_attach, aw_axiclk_attach),
193 static driver_t aw_axiclk_driver = {
199 static devclass_t aw_axiclk_devclass;
201 EARLY_DRIVER_MODULE(aw_axiclk, simplebus, aw_axiclk_driver,
202 aw_axiclk_devclass, 0, 0, BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE);