2 * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
19 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
20 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
21 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
22 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * Allwinner HDMI clock
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD$");
36 #include <sys/param.h>
37 #include <sys/systm.h>
40 #include <sys/kernel.h>
41 #include <sys/module.h>
42 #include <machine/bus.h>
44 #include <dev/ofw/ofw_bus.h>
45 #include <dev/ofw/ofw_bus_subr.h>
46 #include <dev/ofw/ofw_subr.h>
48 #include <dev/extres/clk/clk_mux.h>
49 #include <dev/extres/clk/clk_gate.h>
51 #include "clkdev_if.h"
53 #define SCLK_GATING (1 << 31)
54 #define CLK_SRC_SEL (0x3 << 24)
55 #define CLK_SRC_SEL_SHIFT 24
56 #define CLK_SRC_SEL_MAX 0x3
57 #define CLK_RATIO_N (0x3 << 16)
58 #define CLK_RATIO_N_SHIFT 16
59 #define CLK_RATIO_N_MAX 0x3
60 #define CLK_RATIO_M (0x1f << 0)
61 #define CLK_RATIO_M_SHIFT 0
62 #define CLK_RATIO_M_MAX 0x1f
64 #define CLK_IDX_PLL3_1X 0
66 static struct ofw_compat_data compat_data[] = {
67 { "allwinner,sun4i-a10-hdmi-clk", 1 },
71 struct aw_hdmiclk_sc {
76 #define HDMICLK_READ(sc, val) CLKDEV_READ_4((sc)->clkdev, (sc)->reg, (val))
77 #define HDMICLK_WRITE(sc, val) CLKDEV_WRITE_4((sc)->clkdev, (sc)->reg, (val))
78 #define DEVICE_LOCK(sc) CLKDEV_DEVICE_LOCK((sc)->clkdev)
79 #define DEVICE_UNLOCK(sc) CLKDEV_DEVICE_UNLOCK((sc)->clkdev)
82 aw_hdmiclk_init(struct clknode *clk, device_t dev)
84 struct aw_hdmiclk_sc *sc;
87 sc = clknode_get_softc(clk);
89 /* Select PLL3(1X) clock source */
90 index = CLK_IDX_PLL3_1X;
93 HDMICLK_READ(sc, &val);
95 val |= (index << CLK_SRC_SEL_SHIFT);
96 HDMICLK_WRITE(sc, val);
99 clknode_init_parent_idx(clk, index);
104 aw_hdmiclk_set_mux(struct clknode *clk, int index)
106 struct aw_hdmiclk_sc *sc;
109 sc = clknode_get_softc(clk);
111 if (index < 0 || index > CLK_SRC_SEL_MAX)
115 HDMICLK_READ(sc, &val);
117 val |= (index << CLK_SRC_SEL_SHIFT);
118 HDMICLK_WRITE(sc, val);
125 aw_hdmiclk_set_gate(struct clknode *clk, bool enable)
127 struct aw_hdmiclk_sc *sc;
130 sc = clknode_get_softc(clk);
133 HDMICLK_READ(sc, &val);
138 HDMICLK_WRITE(sc, val);
145 aw_hdmiclk_recalc_freq(struct clknode *clk, uint64_t *freq)
147 struct aw_hdmiclk_sc *sc;
150 sc = clknode_get_softc(clk);
153 HDMICLK_READ(sc, &val);
156 n = 1 << ((val & CLK_RATIO_N) >> CLK_RATIO_N_SHIFT);
157 m = ((val & CLK_RATIO_M) >> CLK_RATIO_M_SHIFT) + 1;
159 *freq = *freq / n / m;
165 aw_hdmiclk_set_freq(struct clknode *clk, uint64_t fin, uint64_t *fout,
166 int flags, int *stop)
168 struct aw_hdmiclk_sc *sc;
169 uint32_t val, m, n, best_m, best_n;
171 int64_t best_diff, cur_diff;
173 sc = clknode_get_softc(clk);
175 best_diff = (int64_t)*fout;
177 for (n = 0; n <= CLK_RATIO_N_MAX; n++)
178 for (m = 0; m <= CLK_RATIO_M_MAX; m++) {
179 cur_freq = fin / (1 << n) / (m + 1);
180 cur_diff = (int64_t)*fout - cur_freq;
181 if (cur_diff >= 0 && cur_diff < best_diff) {
182 best_diff = cur_diff;
188 if (best_diff == (int64_t)*fout)
192 HDMICLK_READ(sc, &val);
193 val &= ~(CLK_RATIO_N | CLK_RATIO_M);
194 val |= (best_n << CLK_RATIO_N_SHIFT);
195 val |= (best_m << CLK_RATIO_M_SHIFT);
196 HDMICLK_WRITE(sc, val);
199 *fout = fin / (1 << best_n) / (best_m + 1);
205 static clknode_method_t aw_hdmiclk_clknode_methods[] = {
206 /* Device interface */
207 CLKNODEMETHOD(clknode_init, aw_hdmiclk_init),
208 CLKNODEMETHOD(clknode_set_gate, aw_hdmiclk_set_gate),
209 CLKNODEMETHOD(clknode_set_mux, aw_hdmiclk_set_mux),
210 CLKNODEMETHOD(clknode_recalc_freq, aw_hdmiclk_recalc_freq),
211 CLKNODEMETHOD(clknode_set_freq, aw_hdmiclk_set_freq),
214 DEFINE_CLASS_1(aw_hdmiclk_clknode, aw_hdmiclk_clknode_class,
215 aw_hdmiclk_clknode_methods, sizeof(struct aw_hdmiclk_sc), clknode_class);
218 aw_hdmiclk_probe(device_t dev)
220 if (!ofw_bus_status_okay(dev))
223 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
226 device_set_desc(dev, "Allwinner HDMI Clock");
227 return (BUS_PROBE_DEFAULT);
231 aw_hdmiclk_attach(device_t dev)
233 struct clknode_init_def def;
234 struct aw_hdmiclk_sc *sc;
235 struct clkdom *clkdom;
243 node = ofw_bus_get_node(dev);
245 if (ofw_reg_to_paddr(node, 0, &paddr, &psize, NULL) != 0) {
246 device_printf(dev, "cannot parse 'reg' property\n");
250 clkdom = clkdom_create(dev);
252 error = clk_get_by_ofw_index(dev, 0, &clk_parent);
254 device_printf(dev, "cannot parse clock parent\n");
258 memset(&def, 0, sizeof(def));
259 error = clk_parse_ofw_clk_name(dev, node, &def.name);
261 device_printf(dev, "cannot parse clock name\n");
266 def.parent_names = malloc(sizeof(char *), M_OFWPROP, M_WAITOK);
267 def.parent_names[0] = clk_get_name(clk_parent);
270 clk = clknode_create(clkdom, &aw_hdmiclk_clknode_class, &def);
272 device_printf(dev, "cannot create clknode\n");
277 sc = clknode_get_softc(clk);
279 sc->clkdev = device_get_parent(dev);
281 clknode_register(clkdom, clk);
283 if (clkdom_finit(clkdom) != 0) {
284 device_printf(dev, "cannot finalize clkdom initialization\n");
298 static device_method_t aw_hdmiclk_methods[] = {
299 /* Device interface */
300 DEVMETHOD(device_probe, aw_hdmiclk_probe),
301 DEVMETHOD(device_attach, aw_hdmiclk_attach),
306 static driver_t aw_hdmiclk_driver = {
312 static devclass_t aw_hdmiclk_devclass;
314 EARLY_DRIVER_MODULE(aw_hdmiclk, simplebus, aw_hdmiclk_driver,
315 aw_hdmiclk_devclass, 0, 0, BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE);