sys/arm/allwinner/clkng/aw_ccung.c

   1 /*-
   2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
   3  *
   4  * Copyright (c) 2017,2018 Emmanuel Vadot <manu@freebsd.org>
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions and the following disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  *
  15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  20  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  21  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  22  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  23  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  25  * SUCH DAMAGE.
  26  *
  27  * $FreeBSD$
  28  */
  29
  30 /*
  31  * Allwinner Clock Control Unit
  32  */
  33
  34 #include <sys/cdefs.h>
  35 __FBSDID("$FreeBSD$");
  36
  37 #include <sys/param.h>
  38 #include <sys/systm.h>
  39 #include <sys/bus.h>
  40 #include <sys/rman.h>
  41 #include <sys/kernel.h>
  42 #include <sys/module.h>
  43 #include <machine/bus.h>
  44
  45 #include <dev/fdt/simplebus.h>
  46
  47 #include <dev/ofw/ofw_bus.h>
  48 #include <dev/ofw/ofw_bus_subr.h>
  49
  50 #include <dev/extres/clk/clk.h>
  51 #include <dev/extres/clk/clk_gate.h>
  52
  53 #include <dev/extres/hwreset/hwreset.h>
  54
  55 #include <arm/allwinner/clkng/aw_ccung.h>
  56 #include <arm/allwinner/clkng/aw_clk.h>
  57
  58 #ifdef __aarch64__
  59 #include "opt_soc.h"
  60 #endif
  61
  62 #include "clkdev_if.h"
  63 #include "hwreset_if.h"
  64
  65 static struct resource_spec aw_ccung_spec[] = {
  66         { SYS_RES_MEMORY,       0,      RF_ACTIVE },
  67         { -1, 0 }
  68 };
  69
  70 #define CCU_READ4(sc, reg)              bus_read_4((sc)->res, (reg))
  71 #define CCU_WRITE4(sc, reg, val)        bus_write_4((sc)->res, (reg), (val))
  72
  73 static int
  74 aw_ccung_write_4(device_t dev, bus_addr_t addr, uint32_t val)
  75 {
  76         struct aw_ccung_softc *sc;
  77
  78         sc = device_get_softc(dev);
  79         CCU_WRITE4(sc, addr, val);
  80         return (0);
  81 }
  82
  83 static int
  84 aw_ccung_read_4(device_t dev, bus_addr_t addr, uint32_t *val)
  85 {
  86         struct aw_ccung_softc *sc;
  87
  88         sc = device_get_softc(dev);
  89
  90         *val = CCU_READ4(sc, addr);
  91         return (0);
  92 }
  93
  94 static int
  95 aw_ccung_modify_4(device_t dev, bus_addr_t addr, uint32_t clr, uint32_t set)
  96 {
  97         struct aw_ccung_softc *sc;
  98         uint32_t reg;
  99
 100         sc = device_get_softc(dev);
 101
 102         reg = CCU_READ4(sc, addr);
 103         reg &= ~clr;
 104         reg |= set;
 105         CCU_WRITE4(sc, addr, reg);
 106
 107         return (0);
 108 }
 109
 110 static int
 111 aw_ccung_reset_assert(device_t dev, intptr_t id, bool reset)
 112 {
 113         struct aw_ccung_softc *sc;
 114         uint32_t val;
 115
 116         sc = device_get_softc(dev);
 117
 118         if (id >= sc->nresets || sc->resets[id].offset == 0)
 119                 return (0);
 120
 121         mtx_lock(&sc->mtx);
 122         val = CCU_READ4(sc, sc->resets[id].offset);
 123         if (reset)
 124                 val &= ~(1 << sc->resets[id].shift);
 125         else
 126                 val |= 1 << sc->resets[id].shift;
 127         CCU_WRITE4(sc, sc->resets[id].offset, val);
 128         mtx_unlock(&sc->mtx);
 129
 130         return (0);
 131 }
 132
 133 static int
 134 aw_ccung_reset_is_asserted(device_t dev, intptr_t id, bool *reset)
 135 {
 136         struct aw_ccung_softc *sc;
 137         uint32_t val;
 138
 139         sc = device_get_softc(dev);
 140
 141         if (id >= sc->nresets || sc->resets[id].offset == 0)
 142                 return (0);
 143
 144         mtx_lock(&sc->mtx);
 145         val = CCU_READ4(sc, sc->resets[id].offset);
 146         *reset = (val & (1 << sc->resets[id].shift)) != 0 ? false : true;
 147         mtx_unlock(&sc->mtx);
 148
 149         return (0);
 150 }
 151
 152 static void
 153 aw_ccung_device_lock(device_t dev)
 154 {
 155         struct aw_ccung_softc *sc;
 156
 157         sc = device_get_softc(dev);
 158         mtx_lock(&sc->mtx);
 159 }
 160
 161 static void
 162 aw_ccung_device_unlock(device_t dev)
 163 {
 164         struct aw_ccung_softc *sc;
 165
 166         sc = device_get_softc(dev);
 167         mtx_unlock(&sc->mtx);
 168 }
 169
 170 static int
 171 aw_ccung_register_gates(struct aw_ccung_softc *sc)
 172 {
 173         struct clk_gate_def def;
 174         int i;
 175
 176         for (i = 0; i < sc->ngates; i++) {
 177                 if (sc->gates[i].name == NULL)
 178                         continue;
 179                 memset(&def, 0, sizeof(def));
 180                 def.clkdef.id = i;
 181                 def.clkdef.name = sc->gates[i].name;
 182                 def.clkdef.parent_names = &sc->gates[i].parent_name;
 183                 def.clkdef.parent_cnt = 1;
 184                 def.offset = sc->gates[i].offset;
 185                 def.shift = sc->gates[i].shift;
 186                 def.mask = 1;
 187                 def.on_value = 1;
 188                 def.off_value = 0;
 189                 clknode_gate_register(sc->clkdom, &def);
 190         }
 191
 192         return (0);
 193 }
 194
 195 static void
 196 aw_ccung_init_clocks(struct aw_ccung_softc *sc)
 197 {
 198         struct clknode *clknode;
 199         int i, error;
 200
 201         for (i = 0; i < sc->n_clk_init; i++) {
 202                 clknode = clknode_find_by_name(sc->clk_init[i].name);
 203                 if (clknode == NULL) {
 204                         device_printf(sc->dev, "Cannot find clock %s\n",
 205                             sc->clk_init[i].name);
 206                         continue;
 207                 }
 208
 209                 if (sc->clk_init[i].parent_name != NULL) {
 210                         if (bootverbose)
 211                                 device_printf(sc->dev, "Setting %s as parent for %s\n",
 212                                     sc->clk_init[i].parent_name,
 213                                     sc->clk_init[i].name);
 214                         error = clknode_set_parent_by_name(clknode,
 215                             sc->clk_init[i].parent_name);
 216                         if (error != 0) {
 217                                 device_printf(sc->dev,
 218                                     "Cannot set parent to %s for %s\n",
 219                                     sc->clk_init[i].parent_name,
 220                                     sc->clk_init[i].name);
 221                                 continue;
 222                         }
 223                 }
 224                 if (sc->clk_init[i].default_freq != 0) {
 225                         error = clknode_set_freq(clknode,
 226                             sc->clk_init[i].default_freq, 0 , 0);
 227                         if (error != 0) {
 228                                 device_printf(sc->dev,
 229                                     "Cannot set frequency for %s to %ju\n",
 230                                     sc->clk_init[i].name,
 231                                     sc->clk_init[i].default_freq);
 232                                 continue;
 233                         }
 234                 }
 235                 if (sc->clk_init[i].enable) {
 236                         error = clknode_enable(clknode);
 237                         if (error != 0) {
 238                                 device_printf(sc->dev,
 239                                     "Cannot enable %s\n",
 240                                     sc->clk_init[i].name);
 241                                 continue;
 242                         }
 243                 }
 244         }
 245 }
 246
 247 int
 248 aw_ccung_attach(device_t dev)
 249 {
 250         struct aw_ccung_softc *sc;
 251         int i;
 252
 253         sc = device_get_softc(dev);
 254         sc->dev = dev;
 255
 256         if (bus_alloc_resources(dev, aw_ccung_spec, &sc->res) != 0) {
 257                 device_printf(dev, "cannot allocate resources for device\n");
 258                 return (ENXIO);
 259         }
 260
 261         mtx_init(&sc->mtx, device_get_nameunit(dev), NULL, MTX_DEF);
 262
 263         sc->clkdom = clkdom_create(dev);
 264         if (sc->clkdom == NULL)
 265                 panic("Cannot create clkdom\n");
 266
 267         for (i = 0; i < sc->nclks; i++) {
 268                 switch (sc->clks[i].type) {
 269                 case AW_CLK_UNDEFINED:
 270                         break;
 271                 case AW_CLK_MUX:
 272                         clknode_mux_register(sc->clkdom, sc->clks[i].clk.mux);
 273                         break;
 274                 case AW_CLK_DIV:
 275                         clknode_div_register(sc->clkdom, sc->clks[i].clk.div);
 276                         break;
 277                 case AW_CLK_FIXED:
 278                         clknode_fixed_register(sc->clkdom,
 279                             sc->clks[i].clk.fixed);
 280                         break;
 281                 case AW_CLK_NKMP:
 282                         aw_clk_nkmp_register(sc->clkdom, sc->clks[i].clk.nkmp);
 283                         break;
 284                 case AW_CLK_NM:
 285                         aw_clk_nm_register(sc->clkdom, sc->clks[i].clk.nm);
 286                         break;
 287                 case AW_CLK_PREDIV_MUX:
 288                         aw_clk_prediv_mux_register(sc->clkdom,
 289                             sc->clks[i].clk.prediv_mux);
 290                         break;
 291                 }
 292         }
 293
 294         if (sc->gates)
 295                 aw_ccung_register_gates(sc);
 296         if (clkdom_finit(sc->clkdom) != 0)
 297                 panic("cannot finalize clkdom initialization\n");
 298
 299         clkdom_xlock(sc->clkdom);
 300         aw_ccung_init_clocks(sc);
 301         clkdom_unlock(sc->clkdom);
 302
 303         if (bootverbose)
 304                 clkdom_dump(sc->clkdom);
 305
 306         /* If we have resets, register our self as a reset provider */
 307         if (sc->resets)
 308                 hwreset_register_ofw_provider(dev);
 309
 310         return (0);
 311 }
 312
 313 static device_method_t aw_ccung_methods[] = {
 314         /* clkdev interface */
 315         DEVMETHOD(clkdev_write_4,       aw_ccung_write_4),
 316         DEVMETHOD(clkdev_read_4,        aw_ccung_read_4),
 317         DEVMETHOD(clkdev_modify_4,      aw_ccung_modify_4),
 318         DEVMETHOD(clkdev_device_lock,   aw_ccung_device_lock),
 319         DEVMETHOD(clkdev_device_unlock, aw_ccung_device_unlock),
 320
 321         /* Reset interface */
 322         DEVMETHOD(hwreset_assert,       aw_ccung_reset_assert),
 323         DEVMETHOD(hwreset_is_asserted,  aw_ccung_reset_is_asserted),
 324
 325         DEVMETHOD_END
 326 };
 327
 328 DEFINE_CLASS_0(aw_ccung, aw_ccung_driver, aw_ccung_methods,
 329     sizeof(struct aw_ccung_softc));