2 * Copyright (c) 2019 Emmanuel Vadot <manu@freebsd.org>
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
18 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
19 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
20 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
21 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
31 #include <sys/param.h>
32 #include <sys/systm.h>
35 #include <dev/extres/clk/clk.h>
37 #include <arm/allwinner/clkng/aw_clk.h>
38 #include <arm/allwinner/clkng/aw_clk_m.h>
40 #include "clkdev_if.h"
43 * clknode for clocks matching the formula :
46 * And that needs to potentially :
47 * 1) Set the parent freq
48 * 2) Support Setting the parent to a multiple
55 struct aw_clk_factor m;
64 #define WRITE4(_clk, off, val) \
65 CLKDEV_WRITE_4(clknode_get_device(_clk), off, val)
66 #define READ4(_clk, off, val) \
67 CLKDEV_READ_4(clknode_get_device(_clk), off, val)
68 #define DEVICE_LOCK(_clk) \
69 CLKDEV_DEVICE_LOCK(clknode_get_device(_clk))
70 #define DEVICE_UNLOCK(_clk) \
71 CLKDEV_DEVICE_UNLOCK(clknode_get_device(_clk))
74 aw_clk_m_init(struct clknode *clk, device_t dev)
76 struct aw_clk_m_sc *sc;
79 sc = clknode_get_softc(clk);
82 if ((sc->flags & AW_CLK_HAS_MUX) != 0) {
84 READ4(clk, sc->offset, &val);
87 idx = (val & sc->mux_mask) >> sc->mux_shift;
90 clknode_init_parent_idx(clk, idx);
95 aw_clk_m_set_gate(struct clknode *clk, bool enable)
97 struct aw_clk_m_sc *sc;
100 sc = clknode_get_softc(clk);
102 if ((sc->flags & AW_CLK_HAS_GATE) == 0)
106 READ4(clk, sc->offset, &val);
108 val |= (1 << sc->gate_shift);
110 val &= ~(1 << sc->gate_shift);
111 WRITE4(clk, sc->offset, val);
118 aw_clk_m_set_mux(struct clknode *clk, int index)
120 struct aw_clk_m_sc *sc;
123 sc = clknode_get_softc(clk);
125 if ((sc->flags & AW_CLK_HAS_MUX) == 0)
129 READ4(clk, sc->offset, &val);
130 val &= ~sc->mux_mask;
131 val |= index << sc->mux_shift;
132 WRITE4(clk, sc->offset, val);
139 aw_clk_m_find_best(struct aw_clk_m_sc *sc, uint64_t fparent, uint64_t *fout,
143 uint32_t m, max_m, min_m;
147 max_m = aw_clk_factor_get_max(&sc->m);
148 min_m = aw_clk_factor_get_min(&sc->m);
150 for (m = min_m; m <= max_m; ) {
152 if (abs(*fout - cur) < abs(*fout - best)) {
156 if ((sc->m.flags & AW_CLK_FACTOR_POWER_OF_TWO) != 0)
166 aw_clk_m_set_freq(struct clknode *clk, uint64_t fparent, uint64_t *fout,
167 int flags, int *stop)
169 struct aw_clk_m_sc *sc;
170 struct clknode *p_clk;
172 uint32_t val, m, best_m;
174 sc = clknode_get_softc(clk);
178 if ((sc->flags & AW_CLK_SET_PARENT) != 0) {
179 p_clk = clknode_get_parent(clk);
181 printf("%s: Cannot get parent for clock %s\n",
183 clknode_get_name(clk));
186 clknode_set_freq(p_clk, *fout, CLK_SET_ROUND_MULTIPLE, 0);
187 clknode_get_freq(p_clk, &fparent);
188 best = aw_clk_m_find_best(sc, fparent, fout,
191 best = aw_clk_m_find_best(sc, fparent, fout,
195 if ((flags & CLK_SET_DRYRUN) != 0) {
201 if ((best < *fout) &&
202 ((flags & CLK_SET_ROUND_DOWN) == 0)) {
206 if ((best > *fout) &&
207 ((flags & CLK_SET_ROUND_UP) == 0)) {
213 READ4(clk, sc->offset, &val);
215 m = aw_clk_factor_get_value(&sc->m, best_m);
217 val |= m << sc->m.shift;
219 WRITE4(clk, sc->offset, val);
229 aw_clk_m_recalc(struct clknode *clk, uint64_t *freq)
231 struct aw_clk_m_sc *sc;
234 sc = clknode_get_softc(clk);
237 READ4(clk, sc->offset, &val);
240 m = aw_clk_get_factor(val, &sc->m);
247 static clknode_method_t aw_m_clknode_methods[] = {
248 /* Device interface */
249 CLKNODEMETHOD(clknode_init, aw_clk_m_init),
250 CLKNODEMETHOD(clknode_set_gate, aw_clk_m_set_gate),
251 CLKNODEMETHOD(clknode_set_mux, aw_clk_m_set_mux),
252 CLKNODEMETHOD(clknode_recalc_freq, aw_clk_m_recalc),
253 CLKNODEMETHOD(clknode_set_freq, aw_clk_m_set_freq),
257 DEFINE_CLASS_1(aw_m_clknode, aw_m_clknode_class, aw_m_clknode_methods,
258 sizeof(struct aw_clk_m_sc), clknode_class);
261 aw_clk_m_register(struct clkdom *clkdom, struct aw_clk_m_def *clkdef)
264 struct aw_clk_m_sc *sc;
266 clk = clknode_create(clkdom, &aw_m_clknode_class, &clkdef->clkdef);
270 sc = clknode_get_softc(clk);
272 sc->offset = clkdef->offset;
274 sc->m.shift = clkdef->m.shift;
275 sc->m.width = clkdef->m.width;
276 sc->m.mask = ((1 << sc->m.width) - 1) << sc->m.shift;
277 sc->m.value = clkdef->m.value;
278 sc->m.flags = clkdef->m.flags;
280 sc->mux_shift = clkdef->mux_shift;
281 sc->mux_mask = ((1 << clkdef->mux_width) - 1) << sc->mux_shift;
283 sc->gate_shift = clkdef->gate_shift;
285 sc->flags = clkdef->flags;
287 clknode_register(clkdom, clk);