2 * Copyright (c) 2013 Ruslan Bukin <br@bsdpad.com>
3 * Copyright (c) 2015 Semihalf
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
31 #include <sys/param.h>
32 #include <sys/systm.h>
35 #include <sys/mutex.h>
37 #include <sys/cpuset.h>
42 #include <machine/smp.h>
43 #include <machine/fdt.h>
44 #include <machine/intr.h>
45 #include <machine/cpu-v6.h>
47 #include <dev/fdt/fdt_common.h>
48 #include <dev/ofw/ofw_cpu.h>
49 #include <dev/ofw/ofw_bus_subr.h>
51 #define AL_CPU_RESUME_WATERMARK_REG 0x00
52 #define AL_CPU_RESUME_FLAGS_REG 0x04
53 #define AL_CPU_RESUME_PCPU_RADDR_REG(cpu) (0x08 + 0x04 + 8*(cpu))
54 #define AL_CPU_RESUME_PCPU_FLAGS(cpu) (0x08 + 8*(cpu))
57 #define AL_CPU_RESUME_FLG_PERCPU_DONT_RESUME (1 << 2)
59 /* The expected magic number for validating the resume addresses */
60 #define AL_CPU_RESUME_MAGIC_NUM 0xf0e1d200
61 #define AL_CPU_RESUME_MAGIC_NUM_MASK 0xffffff00
63 /* The expected minimal version number for validating the capabilities */
64 #define AL_CPU_RESUME_MIN_VER 0x000000c3
65 #define AL_CPU_RESUME_MIN_VER_MASK 0x000000ff
67 /* Field controlling the boot-up of companion cores */
68 #define AL_NB_INIT_CONTROL (0x8)
69 #define AL_NB_CONFIG_STATUS_PWR_CTRL(cpu) (0x2020 + (cpu)*0x100)
71 #define SERDES_NUM_GROUPS 4
72 #define SERDES_GROUP_SIZE 0x400
74 extern bus_addr_t al_devmap_pa;
75 extern bus_addr_t al_devmap_size;
77 extern void mpentry(void);
79 int alpine_serdes_resource_get(uint32_t group, bus_space_tag_t *tag,
81 static int platform_mp_get_core_cnt(void);
82 static int alpine_get_cpu_resume_base(u_long *pbase, u_long *psize);
83 static int alpine_get_nb_base(u_long *pbase, u_long *psize);
84 static int alpine_get_serdes_base(u_long *pbase, u_long *psize);
85 int alpine_serdes_resource_get(uint32_t group, bus_space_tag_t *tag,
87 static boolean_t alpine_validate_cpu(u_int, phandle_t, u_int, pcell_t *);
90 alpine_validate_cpu(u_int id, phandle_t child, u_int addr_cell, pcell_t *reg)
92 return fdt_is_compatible(child, "arm,cortex-a15");
96 platform_mp_get_core_cnt(void)
98 static int ncores = 0;
102 /* Calculate ncores value only once */
106 reg = cp15_l2ctlr_get();
107 ncores = CPUV7_L2CTLR_NPROC(reg);
109 nchilds = ofw_cpu_early_foreach(alpine_validate_cpu, false);
111 /* Limit CPUs if DTS has configured less than available */
112 if ((nchilds > 0) && (nchilds < ncores)) {
113 printf("SMP: limiting number of active CPUs to %d out of %d\n",
122 platform_mp_init_secondary(void)
125 arm_init_secondary_ic();
129 platform_mp_setmaxid(void)
133 core_cnt = platform_mp_get_core_cnt();
134 mp_maxid = core_cnt - 1;
138 platform_mp_probe(void)
140 mp_ncpus = platform_mp_get_core_cnt();
145 alpine_get_cpu_resume_base(u_long *pbase, u_long *psize)
151 if (pbase == NULL || psize == NULL)
154 if ((node = OF_finddevice("/")) == -1)
158 ofw_bus_find_compatible(node, "annapurna-labs,al-cpu-resume")) == 0)
161 if (fdt_regsize(node, &base, &size))
171 alpine_get_nb_base(u_long *pbase, u_long *psize)
177 if (pbase == NULL || psize == NULL)
180 if ((node = OF_finddevice("/")) == -1)
184 ofw_bus_find_compatible(node, "annapurna-labs,al-nb-service")) == 0)
187 if (fdt_regsize(node, &base, &size))
197 platform_mp_start_ap(void)
203 u_long cpu_resume_base;
205 u_long cpu_resume_size;
207 bus_addr_t cpu_resume_baddr;
211 if (alpine_get_cpu_resume_base(&cpu_resume_base, &cpu_resume_size))
212 panic("Couldn't resolve cpu_resume_base address\n");
214 if (alpine_get_nb_base(&nb_base, &nb_size))
215 panic("Couldn't resolve_nb_base address\n");
217 /* Proceed with start addresses for additional CPUs */
218 if (bus_space_map(fdtbus_bs_tag, al_devmap_pa + cpu_resume_base,
219 cpu_resume_size, 0, &cpu_resume_baddr))
220 panic("Couldn't map CPU-resume area");
221 if (bus_space_map(fdtbus_bs_tag, al_devmap_pa + nb_base,
222 nb_size, 0, &nb_baddr))
223 panic("Couldn't map NB-service area");
225 /* Proceed with start addresses for additional CPUs */
226 val = bus_space_read_4(fdtbus_bs_tag, cpu_resume_baddr,
227 AL_CPU_RESUME_WATERMARK_REG);
228 if (((val & AL_CPU_RESUME_MAGIC_NUM_MASK) != AL_CPU_RESUME_MAGIC_NUM) ||
229 ((val & AL_CPU_RESUME_MIN_VER_MASK) < AL_CPU_RESUME_MIN_VER)) {
230 panic("CPU-resume device is not compatible");
233 vaddr = (vm_offset_t)mpentry;
234 physaddr = pmap_kextract(vaddr);
236 for (a = 1; a < platform_mp_get_core_cnt(); a++) {
237 /* Power up the core */
238 bus_space_write_4(fdtbus_bs_tag, nb_baddr,
239 AL_NB_CONFIG_STATUS_PWR_CTRL(a), 0);
243 val = bus_space_read_4(fdtbus_bs_tag, cpu_resume_baddr,
244 AL_CPU_RESUME_PCPU_FLAGS(a));
245 val &= ~AL_CPU_RESUME_FLG_PERCPU_DONT_RESUME;
246 bus_space_write_4(fdtbus_bs_tag, cpu_resume_baddr,
247 AL_CPU_RESUME_PCPU_FLAGS(a), val);
250 /* Set resume physical address */
251 bus_space_write_4(fdtbus_bs_tag, cpu_resume_baddr,
252 AL_CPU_RESUME_PCPU_RADDR_REG(a), physaddr);
256 /* Release cores from reset */
257 if (bus_space_map(fdtbus_bs_tag, al_devmap_pa + nb_base,
258 nb_size, 0, &nb_baddr))
259 panic("Couldn't map NB-service area");
261 start_mask = (1 << platform_mp_get_core_cnt()) - 1;
263 /* Release cores from reset */
264 val = bus_space_read_4(fdtbus_bs_tag, nb_baddr, AL_NB_INIT_CONTROL);
266 bus_space_write_4(fdtbus_bs_tag, nb_baddr, AL_NB_INIT_CONTROL, val);
269 bus_space_unmap(fdtbus_bs_tag, nb_baddr, nb_size);
270 bus_space_unmap(fdtbus_bs_tag, cpu_resume_baddr, cpu_resume_size);
274 alpine_get_serdes_base(u_long *pbase, u_long *psize)
280 if (pbase == NULL || psize == NULL)
283 if ((node = OF_finddevice("/")) == -1)
287 ofw_bus_find_compatible(node, "annapurna-labs,al-serdes")) == 0)
290 if (fdt_regsize(node, &base, &size))
300 alpine_serdes_resource_get(uint32_t group, bus_space_tag_t *tag, bus_addr_t *baddr)
302 u_long serdes_base, serdes_size;
304 static bus_addr_t baddr_mapped[SERDES_NUM_GROUPS];
306 if (group >= SERDES_NUM_GROUPS)
309 if (baddr_mapped[group]) {
310 *tag = fdtbus_bs_tag;
311 *baddr = baddr_mapped[group];
315 ret = alpine_get_serdes_base(&serdes_base, &serdes_size);
319 ret = bus_space_map(fdtbus_bs_tag,
320 al_devmap_pa + serdes_base + group * SERDES_GROUP_SIZE,
321 (SERDES_NUM_GROUPS - group) * SERDES_GROUP_SIZE, 0, baddr);
325 baddr_mapped[group] = *baddr;
331 platform_ipi_send(cpuset_t cpus, u_int ipi)
334 pic_ipi_send(cpus, ipi);