1 /* $NetBSD: bcopyinout.S,v 1.11 2003/10/13 21:22:40 scw Exp $ */
4 * Copyright (c) 2002 Wasabi Systems, Inc.
7 * Written by Allen Briggs for Wasabi Systems, Inc.
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed for the NetBSD Project by
20 * Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 * or promote products derived from this software without specific prior
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
41 #include <machine/acle-compat.h>
42 #include <machine/asm.h>
43 #include <sys/errno.h>
46 .word _C_LABEL(_arm_memcpy)
48 .word _C_LABEL(_min_memcpy_size)
50 __FBSDID("$FreeBSD$");
52 #include <arm/arm/bcopyinout_xscale.S>
59 #define GET_PCB(tmp) \
60 mrc p15, 0, tmp, c13, c0, 4; \
61 add tmp, tmp, #(TD_PCB)
64 .word _C_LABEL(__pcpu) + PC_CURPCB
66 #define GET_PCB(tmp) \
71 #define SAVE_REGS stmfd sp!, {r4-r11}; _SAVE({r4-r11})
72 #define RESTORE_REGS ldmfd sp!, {r4-r11}
74 #if defined(_ARM_ARCH_5E)
76 #define PREFETCH(rx,o) pld [ rx , HELLOCPP (o) ]
78 #define PREFETCH(rx,o)
82 * r0 = user space address
83 * r1 = kernel space address
86 * Copies bytes from user space to kernel space
88 * We save/restore r4-r11:
92 /* Quick exit if length is zero */
101 ldr r12, =(VM_MAXUSER_ADDRESS + 1)
106 ldr r3, .L_arm_memcpy
110 ldr r3, .L_min_memcpy_size
114 stmfd sp!, {r0-r2, r4, lr}
118 mov r3, #2 /* SRC_IS_USER */
119 ldr r4, .L_arm_memcpy
123 ldmfd sp!, {r0-r2, r4, lr}
133 ldr r5, [r4, #PCB_ONFAULT]
135 str r3, [r4, #PCB_ONFAULT]
141 * If not too many bytes, take the slow path.
147 * Align destination to word boundary.
150 ldr pc, [pc, r6, lsl #2]
156 .Lial3: ldrbt r6, [r0], #1
159 .Lial2: ldrbt r7, [r0], #1
162 .Lial1: ldrbt r6, [r0], #1
168 * If few bytes left, finish slow.
174 * If source is not aligned, finish slow.
179 cmp r2, #0x60 /* Must be > 0x5f for unrolled cacheline */
183 * Align destination to cacheline boundary.
184 * If source and destination are nicely aligned, this can be a big
185 * win. If not, it's still cheaper to copy in groups of 32 even if
186 * we don't get the nice cacheline alignment.
199 .Lical28:ldrt r6, [r0], #4
202 .Lical24:ldrt r7, [r0], #4
205 .Lical20:ldrt r6, [r0], #4
208 .Lical16:ldrt r7, [r0], #4
211 .Lical12:ldrt r6, [r0], #4
214 .Lical8:ldrt r7, [r0], #4
217 .Lical4:ldrt r6, [r0], #4
222 * We start with > 0x40 bytes to copy (>= 0x60 got us into this
223 * part of the code, and we may have knocked that down by as much
224 * as 0x1c getting aligned).
226 * This loop basically works out to:
228 * prefetch-next-cacheline(s)
231 * } while (bytes >= 0x40);
241 /* Copy a cacheline */
258 /* Copy a cacheline */
283 * If we're done, bail.
290 ldr pc, [pc, r6, lsl #2]
296 .Lic4: ldrbt r6, [r0], #1
299 .Lic3: ldrbt r7, [r0], #1
302 .Lic2: ldrbt r6, [r0], #1
305 .Lic1: ldrbt r7, [r0], #1
314 str r5, [r4, #PCB_ONFAULT]
321 str r5, [r4, #PCB_ONFAULT]
328 * r0 = kernel space address
329 * r1 = user space address
332 * Copies bytes from kernel space to user space
334 * We save/restore r4-r11:
339 /* Quick exit if length is zero */
348 ldr r12, =(VM_MAXUSER_ADDRESS + 1)
353 ldr r3, .L_arm_memcpy
357 ldr r3, .L_min_memcpy_size
361 stmfd sp!, {r0-r2, r4, lr}
362 _SAVE({r0-r2, r4, lr})
366 mov r3, #1 /* DST_IS_USER */
367 ldr r4, .L_arm_memcpy
371 ldmfd sp!, {r0-r2, r4, lr}
380 ldr r5, [r4, #PCB_ONFAULT]
382 str r3, [r4, #PCB_ONFAULT]
388 * If not too many bytes, take the slow path.
394 * Align destination to word boundary.
397 ldr pc, [pc, r6, lsl #2]
403 .Lal3: ldrb r6, [r0], #1
406 .Lal2: ldrb r7, [r0], #1
409 .Lal1: ldrb r6, [r0], #1
415 * If few bytes left, finish slow.
421 * If source is not aligned, finish slow.
426 cmp r2, #0x60 /* Must be > 0x5f for unrolled cacheline */
430 * Align source & destination to cacheline boundary.
443 .Lcal28:ldr r6, [r0], #4
446 .Lcal24:ldr r7, [r0], #4
449 .Lcal20:ldr r6, [r0], #4
452 .Lcal16:ldr r7, [r0], #4
455 .Lcal12:ldr r6, [r0], #4
458 .Lcal8: ldr r7, [r0], #4
461 .Lcal4: ldr r6, [r0], #4
466 * We start with > 0x40 bytes to copy (>= 0x60 got us into this
467 * part of the code, and we may have knocked that down by as much
468 * as 0x1c getting aligned).
470 * This loop basically works out to:
472 * prefetch-next-cacheline(s)
475 * } while (bytes >= 0x40);
485 /* Copy a cacheline */
502 /* Copy a cacheline */
527 * If we're done, bail.
534 ldr pc, [pc, r6, lsl #2]
540 .Lc4: ldrb r6, [r0], #1
543 .Lc3: ldrb r7, [r0], #1
546 .Lc2: ldrb r6, [r0], #1
549 .Lc1: ldrb r7, [r0], #1
558 str r5, [r4, #PCB_ONFAULT]
566 * int badaddr_read_1(const uint8_t *src, uint8_t *dest)
568 * Copies a single 8-bit value from src to dest, returning 0 on success,
569 * else EFAULT if a page fault occurred.
571 ENTRY(badaddr_read_1)
575 ldr ip, [r2, #PCB_ONFAULT]
577 str r3, [r2, #PCB_ONFAULT]
586 mov r0, #0 /* No fault */
587 1: str ip, [r2, #PCB_ONFAULT]
592 * int badaddr_read_2(const uint16_t *src, uint16_t *dest)
594 * Copies a single 16-bit value from src to dest, returning 0 on success,
595 * else EFAULT if a page fault occurred.
597 ENTRY(badaddr_read_2)
601 ldr ip, [r2, #PCB_ONFAULT]
603 str r3, [r2, #PCB_ONFAULT]
612 mov r0, #0 /* No fault */
613 1: str ip, [r2, #PCB_ONFAULT]
618 * int badaddr_read_4(const uint32_t *src, uint32_t *dest)
620 * Copies a single 32-bit value from src to dest, returning 0 on success,
621 * else EFAULT if a page fault occurred.
623 ENTRY(badaddr_read_4)
627 ldr ip, [r2, #PCB_ONFAULT]
629 str r3, [r2, #PCB_ONFAULT]
638 mov r0, #0 /* No fault */
639 1: str ip, [r2, #PCB_ONFAULT]