1 /* $NetBSD: bcopyinout.S,v 1.11 2003/10/13 21:22:40 scw Exp $ */
4 * Copyright (c) 2002 Wasabi Systems, Inc.
7 * Written by Allen Briggs for Wasabi Systems, Inc.
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed for the NetBSD Project by
20 * Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 * or promote products derived from this software without specific prior
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
41 #include <machine/asm.h>
42 #include <sys/errno.h>
45 .word _C_LABEL(_arm_memcpy)
47 .word _C_LABEL(_min_memcpy_size)
49 __FBSDID("$FreeBSD$");
51 #include <arm/arm/bcopyinout_xscale.S>
58 #define GET_PCB(tmp) \
59 mrc p15, 0, tmp, c13, c0, 4; \
60 add tmp, tmp, #(TD_PCB)
63 .word _C_LABEL(__pcpu) + PC_CURPCB
65 #define GET_PCB(tmp) \
70 #define SAVE_REGS stmfd sp!, {r4-r11}; _SAVE({r4-r11})
71 #define RESTORE_REGS ldmfd sp!, {r4-r11}
73 #if defined(_ARM_ARCH_5E)
75 #define PREFETCH(rx,o) pld [ rx , HELLOCPP (o) ]
77 #define PREFETCH(rx,o)
81 * r0 = user space address
82 * r1 = kernel space address
85 * Copies bytes from user space to kernel space
87 * We save/restore r4-r11:
91 /* Quick exit if length is zero */
100 ldr r12, =(VM_MAXUSER_ADDRESS + 1)
105 ldr r3, .L_arm_memcpy
109 ldr r3, .L_min_memcpy_size
113 stmfd sp!, {r0-r2, r4, lr}
117 mov r3, #2 /* SRC_IS_USER */
118 ldr r4, .L_arm_memcpy
122 ldmfd sp!, {r0-r2, r4, lr}
132 ldr r5, [r4, #PCB_ONFAULT]
134 str r3, [r4, #PCB_ONFAULT]
140 * If not too many bytes, take the slow path.
146 * Align destination to word boundary.
149 ldr pc, [pc, r6, lsl #2]
155 .Lial3: ldrbt r6, [r0], #1
158 .Lial2: ldrbt r7, [r0], #1
161 .Lial1: ldrbt r6, [r0], #1
167 * If few bytes left, finish slow.
173 * If source is not aligned, finish slow.
178 cmp r2, #0x60 /* Must be > 0x5f for unrolled cacheline */
182 * Align destination to cacheline boundary.
183 * If source and destination are nicely aligned, this can be a big
184 * win. If not, it's still cheaper to copy in groups of 32 even if
185 * we don't get the nice cacheline alignment.
198 .Lical28:ldrt r6, [r0], #4
201 .Lical24:ldrt r7, [r0], #4
204 .Lical20:ldrt r6, [r0], #4
207 .Lical16:ldrt r7, [r0], #4
210 .Lical12:ldrt r6, [r0], #4
213 .Lical8:ldrt r7, [r0], #4
216 .Lical4:ldrt r6, [r0], #4
221 * We start with > 0x40 bytes to copy (>= 0x60 got us into this
222 * part of the code, and we may have knocked that down by as much
223 * as 0x1c getting aligned).
225 * This loop basically works out to:
227 * prefetch-next-cacheline(s)
230 * } while (bytes >= 0x40);
240 /* Copy a cacheline */
257 /* Copy a cacheline */
282 * If we're done, bail.
289 ldr pc, [pc, r6, lsl #2]
295 .Lic4: ldrbt r6, [r0], #1
298 .Lic3: ldrbt r7, [r0], #1
301 .Lic2: ldrbt r6, [r0], #1
304 .Lic1: ldrbt r7, [r0], #1
313 str r5, [r4, #PCB_ONFAULT]
320 str r5, [r4, #PCB_ONFAULT]
327 * r0 = kernel space address
328 * r1 = user space address
331 * Copies bytes from kernel space to user space
333 * We save/restore r4-r11:
338 /* Quick exit if length is zero */
347 ldr r12, =(VM_MAXUSER_ADDRESS + 1)
352 ldr r3, .L_arm_memcpy
356 ldr r3, .L_min_memcpy_size
360 stmfd sp!, {r0-r2, r4, lr}
361 _SAVE({r0-r2, r4, lr})
365 mov r3, #1 /* DST_IS_USER */
366 ldr r4, .L_arm_memcpy
370 ldmfd sp!, {r0-r2, r4, lr}
379 ldr r5, [r4, #PCB_ONFAULT]
381 str r3, [r4, #PCB_ONFAULT]
387 * If not too many bytes, take the slow path.
393 * Align destination to word boundary.
396 ldr pc, [pc, r6, lsl #2]
402 .Lal3: ldrb r6, [r0], #1
405 .Lal2: ldrb r7, [r0], #1
408 .Lal1: ldrb r6, [r0], #1
414 * If few bytes left, finish slow.
420 * If source is not aligned, finish slow.
425 cmp r2, #0x60 /* Must be > 0x5f for unrolled cacheline */
429 * Align source & destination to cacheline boundary.
442 .Lcal28:ldr r6, [r0], #4
445 .Lcal24:ldr r7, [r0], #4
448 .Lcal20:ldr r6, [r0], #4
451 .Lcal16:ldr r7, [r0], #4
454 .Lcal12:ldr r6, [r0], #4
457 .Lcal8: ldr r7, [r0], #4
460 .Lcal4: ldr r6, [r0], #4
465 * We start with > 0x40 bytes to copy (>= 0x60 got us into this
466 * part of the code, and we may have knocked that down by as much
467 * as 0x1c getting aligned).
469 * This loop basically works out to:
471 * prefetch-next-cacheline(s)
474 * } while (bytes >= 0x40);
484 /* Copy a cacheline */
501 /* Copy a cacheline */
526 * If we're done, bail.
533 ldr pc, [pc, r6, lsl #2]
539 .Lc4: ldrb r6, [r0], #1
542 .Lc3: ldrb r7, [r0], #1
545 .Lc2: ldrb r6, [r0], #1
548 .Lc1: ldrb r7, [r0], #1
557 str r5, [r4, #PCB_ONFAULT]
565 * int badaddr_read_1(const uint8_t *src, uint8_t *dest)
567 * Copies a single 8-bit value from src to dest, returning 0 on success,
568 * else EFAULT if a page fault occurred.
570 ENTRY(badaddr_read_1)
574 ldr ip, [r2, #PCB_ONFAULT]
576 str r3, [r2, #PCB_ONFAULT]
585 mov r0, #0 /* No fault */
586 1: str ip, [r2, #PCB_ONFAULT]
591 * int badaddr_read_2(const uint16_t *src, uint16_t *dest)
593 * Copies a single 16-bit value from src to dest, returning 0 on success,
594 * else EFAULT if a page fault occurred.
596 ENTRY(badaddr_read_2)
600 ldr ip, [r2, #PCB_ONFAULT]
602 str r3, [r2, #PCB_ONFAULT]
611 mov r0, #0 /* No fault */
612 1: str ip, [r2, #PCB_ONFAULT]
617 * int badaddr_read_4(const uint32_t *src, uint32_t *dest)
619 * Copies a single 32-bit value from src to dest, returning 0 on success,
620 * else EFAULT if a page fault occurred.
622 ENTRY(badaddr_read_4)
626 ldr ip, [r2, #PCB_ONFAULT]
628 str r3, [r2, #PCB_ONFAULT]
637 mov r0, #0 /* No fault */
638 1: str ip, [r2, #PCB_ONFAULT]