1 /* $NetBSD: bcopyinout.S,v 1.11 2003/10/13 21:22:40 scw Exp $ */
4 * Copyright (c) 2002 Wasabi Systems, Inc.
7 * Written by Allen Briggs for Wasabi Systems, Inc.
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed for the NetBSD Project by
20 * Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 * or promote products derived from this software without specific prior
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
41 #include <machine/acle-compat.h>
42 #include <machine/asm.h>
43 #include <sys/errno.h>
46 .word _C_LABEL(_arm_memcpy)
48 .word _C_LABEL(_min_memcpy_size)
50 __FBSDID("$FreeBSD$");
52 #include <arm/arm/bcopyinout_xscale.S>
59 #define GET_PCB(tmp) \
60 mrc p15, 0, tmp, c13, c0, 4; \
61 add tmp, tmp, #(TD_PCB)
64 .word _C_LABEL(__pcpu) + PC_CURPCB
66 #define GET_PCB(tmp) \
71 #define SAVE_REGS stmfd sp!, {r4-r11}
72 #define RESTORE_REGS ldmfd sp!, {r4-r11}
74 #if defined(_ARM_ARCH_5E)
76 #define PREFETCH(rx,o) pld [ rx , HELLOCPP (o) ]
78 #define PREFETCH(rx,o)
82 * r0 = user space address
83 * r1 = kernel space address
86 * Copies bytes from user space to kernel space
88 * We save/restore r4-r11:
92 /* Quick exit if length is zero */
101 ldr r3, .L_min_memcpy_size
105 stmfd sp!, {r0-r2, r4, lr}
109 mov r3, #2 /* SRC_IS_USER */
110 ldr r4, .L_arm_memcpy
114 ldmfd sp!, {r0-r2, r4, lr}
124 ldr r5, [r4, #PCB_ONFAULT]
126 str r3, [r4, #PCB_ONFAULT]
132 * If not too many bytes, take the slow path.
138 * Align destination to word boundary.
141 ldr pc, [pc, r6, lsl #2]
147 .Lial3: ldrbt r6, [r0], #1
150 .Lial2: ldrbt r7, [r0], #1
153 .Lial1: ldrbt r6, [r0], #1
159 * If few bytes left, finish slow.
165 * If source is not aligned, finish slow.
170 cmp r2, #0x60 /* Must be > 0x5f for unrolled cacheline */
174 * Align destination to cacheline boundary.
175 * If source and destination are nicely aligned, this can be a big
176 * win. If not, it's still cheaper to copy in groups of 32 even if
177 * we don't get the nice cacheline alignment.
190 .Lical28:ldrt r6, [r0], #4
193 .Lical24:ldrt r7, [r0], #4
196 .Lical20:ldrt r6, [r0], #4
199 .Lical16:ldrt r7, [r0], #4
202 .Lical12:ldrt r6, [r0], #4
205 .Lical8:ldrt r7, [r0], #4
208 .Lical4:ldrt r6, [r0], #4
213 * We start with > 0x40 bytes to copy (>= 0x60 got us into this
214 * part of the code, and we may have knocked that down by as much
215 * as 0x1c getting aligned).
217 * This loop basically works out to:
219 * prefetch-next-cacheline(s)
222 * } while (bytes >= 0x40);
232 /* Copy a cacheline */
249 /* Copy a cacheline */
274 * If we're done, bail.
281 ldr pc, [pc, r6, lsl #2]
287 .Lic4: ldrbt r6, [r0], #1
290 .Lic3: ldrbt r7, [r0], #1
293 .Lic2: ldrbt r6, [r0], #1
296 .Lic1: ldrbt r7, [r0], #1
305 str r5, [r4, #PCB_ONFAULT]
312 str r5, [r4, #PCB_ONFAULT]
319 * r0 = kernel space address
320 * r1 = user space address
323 * Copies bytes from kernel space to user space
325 * We save/restore r4-r11:
330 /* Quick exit if length is zero */
335 ldr r3, .L_arm_memcpy
339 ldr r3, .L_min_memcpy_size
343 stmfd sp!, {r0-r2, r4, lr}
347 mov r3, #1 /* DST_IS_USER */
348 ldr r4, .L_arm_memcpy
352 ldmfd sp!, {r0-r2, r4, lr}
361 ldr r5, [r4, #PCB_ONFAULT]
363 str r3, [r4, #PCB_ONFAULT]
369 * If not too many bytes, take the slow path.
375 * Align destination to word boundary.
378 ldr pc, [pc, r6, lsl #2]
384 .Lal3: ldrb r6, [r0], #1
387 .Lal2: ldrb r7, [r0], #1
390 .Lal1: ldrb r6, [r0], #1
396 * If few bytes left, finish slow.
402 * If source is not aligned, finish slow.
407 cmp r2, #0x60 /* Must be > 0x5f for unrolled cacheline */
411 * Align source & destination to cacheline boundary.
424 .Lcal28:ldr r6, [r0], #4
427 .Lcal24:ldr r7, [r0], #4
430 .Lcal20:ldr r6, [r0], #4
433 .Lcal16:ldr r7, [r0], #4
436 .Lcal12:ldr r6, [r0], #4
439 .Lcal8: ldr r7, [r0], #4
442 .Lcal4: ldr r6, [r0], #4
447 * We start with > 0x40 bytes to copy (>= 0x60 got us into this
448 * part of the code, and we may have knocked that down by as much
449 * as 0x1c getting aligned).
451 * This loop basically works out to:
453 * prefetch-next-cacheline(s)
456 * } while (bytes >= 0x40);
466 /* Copy a cacheline */
483 /* Copy a cacheline */
508 * If we're done, bail.
515 ldr pc, [pc, r6, lsl #2]
521 .Lc4: ldrb r6, [r0], #1
524 .Lc3: ldrb r7, [r0], #1
527 .Lc2: ldrb r6, [r0], #1
530 .Lc1: ldrb r7, [r0], #1
539 str r5, [r4, #PCB_ONFAULT]
547 * int badaddr_read_1(const uint8_t *src, uint8_t *dest)
549 * Copies a single 8-bit value from src to dest, returning 0 on success,
550 * else EFAULT if a page fault occurred.
552 ENTRY(badaddr_read_1)
556 ldr ip, [r2, #PCB_ONFAULT]
558 str r3, [r2, #PCB_ONFAULT]
567 mov r0, #0 /* No fault */
568 1: str ip, [r2, #PCB_ONFAULT]
573 * int badaddr_read_2(const uint16_t *src, uint16_t *dest)
575 * Copies a single 16-bit value from src to dest, returning 0 on success,
576 * else EFAULT if a page fault occurred.
578 ENTRY(badaddr_read_2)
582 ldr ip, [r2, #PCB_ONFAULT]
584 str r3, [r2, #PCB_ONFAULT]
593 mov r0, #0 /* No fault */
594 1: str ip, [r2, #PCB_ONFAULT]
599 * int badaddr_read_4(const uint32_t *src, uint32_t *dest)
601 * Copies a single 32-bit value from src to dest, returning 0 on success,
602 * else EFAULT if a page fault occurred.
604 ENTRY(badaddr_read_4)
608 ldr ip, [r2, #PCB_ONFAULT]
610 str r3, [r2, #PCB_ONFAULT]
619 mov r0, #0 /* No fault */
620 1: str ip, [r2, #PCB_ONFAULT]