1 /* $NetBSD: bus_space_asm_generic.S,v 1.3 2003/03/27 19:46:14 mycroft Exp $ */
4 * Copyright (c) 1997 Causality Limited.
5 * Copyright (c) 1997 Mark Brinicombe.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by Mark Brinicombe
19 * for the NetBSD Project.
20 * 4. The name of the company nor the name of the author may be used to
21 * endorse or promote products derived from this software without specific
22 * prior written permission.
24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
25 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
26 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
27 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
28 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 #include <machine/asm.h>
39 #include <machine/cpuconf.h>
40 __FBSDID("$FreeBSD$");
43 * Generic bus_space functions.
54 #if (ARM_ARCH_4 + ARM_ARCH_5) > 0
55 ENTRY(generic_armv4_bs_r_2)
72 #if (ARM_ARCH_4 + ARM_ARCH_5) > 0
73 ENTRY(generic_armv4_bs_w_2)
86 ENTRY(generic_bs_rm_1)
100 #if (ARM_ARCH_4 + ARM_ARCH_5) > 0
101 ENTRY(generic_armv4_bs_rm_2)
116 ENTRY(generic_bs_rm_4)
134 ENTRY(generic_bs_wm_1)
148 #if (ARM_ARCH_4 + ARM_ARCH_5) > 0
149 ENTRY(generic_armv4_bs_wm_2)
164 ENTRY(generic_bs_wm_4)
182 ENTRY(generic_bs_rr_1)
196 #if (ARM_ARCH_4 + ARM_ARCH_5) > 0
197 ENTRY(generic_armv4_bs_rr_2)
212 ENTRY(generic_bs_rr_4)
230 ENTRY(generic_bs_wr_1)
244 #if (ARM_ARCH_4 + ARM_ARCH_5) > 0
245 ENTRY(generic_armv4_bs_wr_2)
260 ENTRY(generic_bs_wr_4)
278 ENTRY(generic_bs_sr_1)
291 #if (ARM_ARCH_4 + ARM_ARCH_5) > 0
292 ENTRY(generic_armv4_bs_sr_2)
306 ENTRY(generic_bs_sr_4)
323 #if (ARM_ARCH_4 + ARM_ARCH_5) > 0
324 ENTRY(generic_armv4_bs_c_2)
342 2: add r0, r0, r2, lsl #1
343 add r1, r1, r2, lsl #1
347 3: ldrh r3, [r0], #-2